About the Execution of LoLa+red for SafeBus-PT-06
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1920.292 | 93790.00 | 111590.00 | 806.20 | FFTFFTFTTFTTFFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808700266.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SafeBus-PT-06, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808700266
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.4M
-rw-r--r-- 1 mcc users 13K Feb 26 01:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 26 01:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 30K Feb 26 01:30 CTLFireability.txt
-rw-r--r-- 1 mcc users 156K Feb 26 01:30 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.7K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 38K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 24K Feb 26 01:39 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 175K Feb 26 01:39 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 67K Feb 26 01:37 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 319K Feb 26 01:37 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 303K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-PT-06-CTLFireability-00
FORMULA_NAME SafeBus-PT-06-CTLFireability-01
FORMULA_NAME SafeBus-PT-06-CTLFireability-02
FORMULA_NAME SafeBus-PT-06-CTLFireability-03
FORMULA_NAME SafeBus-PT-06-CTLFireability-04
FORMULA_NAME SafeBus-PT-06-CTLFireability-05
FORMULA_NAME SafeBus-PT-06-CTLFireability-06
FORMULA_NAME SafeBus-PT-06-CTLFireability-07
FORMULA_NAME SafeBus-PT-06-CTLFireability-08
FORMULA_NAME SafeBus-PT-06-CTLFireability-09
FORMULA_NAME SafeBus-PT-06-CTLFireability-10
FORMULA_NAME SafeBus-PT-06-CTLFireability-11
FORMULA_NAME SafeBus-PT-06-CTLFireability-12
FORMULA_NAME SafeBus-PT-06-CTLFireability-13
FORMULA_NAME SafeBus-PT-06-CTLFireability-14
FORMULA_NAME SafeBus-PT-06-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679048099517
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-PT-06
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 10:15:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:15:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:15:03] [INFO ] Load time of PNML (sax parser for PT used): 190 ms
[2023-03-17 10:15:03] [INFO ] Transformed 144 places.
[2023-03-17 10:15:03] [INFO ] Transformed 451 transitions.
[2023-03-17 10:15:03] [INFO ] Parsed PT model containing 144 places and 451 transitions and 2968 arcs in 343 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 40 ms.
Reduce places removed 6 places and 0 transitions.
Support contains 138 out of 138 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 451/451 transitions.
Applied a total of 0 rules in 35 ms. Remains 138 /138 variables (removed 0) and now considering 451/451 (removed 0) transitions.
[2023-03-17 10:15:03] [INFO ] Flow matrix only has 242 transitions (discarded 209 similar events)
// Phase 1: matrix 242 rows 138 cols
[2023-03-17 10:15:03] [INFO ] Computed 29 place invariants in 37 ms
[2023-03-17 10:15:04] [INFO ] Implicit Places using invariants in 394 ms returned []
[2023-03-17 10:15:04] [INFO ] Flow matrix only has 242 transitions (discarded 209 similar events)
[2023-03-17 10:15:04] [INFO ] Invariant cache hit.
[2023-03-17 10:15:04] [INFO ] State equation strengthened by 43 read => feed constraints.
[2023-03-17 10:15:04] [INFO ] Implicit Places using invariants and state equation in 332 ms returned []
Implicit Place search using SMT with State Equation took 786 ms to find 0 implicit places.
[2023-03-17 10:15:04] [INFO ] Flow matrix only has 242 transitions (discarded 209 similar events)
[2023-03-17 10:15:04] [INFO ] Invariant cache hit.
[2023-03-17 10:15:05] [INFO ] Dead Transitions using invariants and state equation in 819 ms found 36 transitions.
Found 36 dead transitions using SMT.
Drop transitions removed 36 transitions
Dead transitions reduction (with SMT) removed 36 transitions
Starting structural reductions in LTL mode, iteration 1 : 138/138 places, 415/451 transitions.
Applied a total of 0 rules in 9 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1658 ms. Remains : 138/138 places, 415/451 transitions.
Support contains 138 out of 138 places after structural reductions.
[2023-03-17 10:15:05] [INFO ] Flatten gal took : 147 ms
[2023-03-17 10:15:06] [INFO ] Flatten gal took : 99 ms
[2023-03-17 10:15:06] [INFO ] Input system was already deterministic with 415 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 714 ms. (steps per millisecond=14 ) properties (out of 89) seen :80
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 102 ms. (steps per millisecond=98 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 116 ms. (steps per millisecond=86 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 149 ms. (steps per millisecond=67 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 174 ms. (steps per millisecond=57 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 162 ms. (steps per millisecond=61 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 90 ms. (steps per millisecond=111 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 85 ms. (steps per millisecond=117 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
[2023-03-17 10:15:08] [INFO ] Flow matrix only has 242 transitions (discarded 173 similar events)
// Phase 1: matrix 242 rows 138 cols
[2023-03-17 10:15:08] [INFO ] Computed 29 place invariants in 7 ms
[2023-03-17 10:15:08] [INFO ] [Real]Absence check using 14 positive place invariants in 12 ms returned sat
[2023-03-17 10:15:08] [INFO ] [Real]Absence check using 14 positive and 15 generalized place invariants in 13 ms returned sat
[2023-03-17 10:15:08] [INFO ] After 176ms SMT Verify possible using all constraints in real domain returned unsat :8 sat :0 real:1
[2023-03-17 10:15:08] [INFO ] [Nat]Absence check using 14 positive place invariants in 10 ms returned sat
[2023-03-17 10:15:08] [INFO ] [Nat]Absence check using 14 positive and 15 generalized place invariants in 9 ms returned sat
[2023-03-17 10:15:08] [INFO ] After 97ms SMT Verify possible using all constraints in natural domain returned unsat :9 sat :0
Fused 9 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 9 atomic propositions for a total of 16 simplifications.
[2023-03-17 10:15:08] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 83 ms
FORMULA SafeBus-PT-06-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 65 ms
[2023-03-17 10:15:09] [INFO ] Input system was already deterministic with 415 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 5 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 33 ms
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 30 ms
[2023-03-17 10:15:09] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 48 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 49 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 30 ms
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 37 ms
[2023-03-17 10:15:09] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 7 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 24 ms
[2023-03-17 10:15:09] [INFO ] Flatten gal took : 26 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 8 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 19 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 21 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 3 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 19 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 23 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 5 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 18 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 22 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 5 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 18 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 20 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 7 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 20 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 23 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 6 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 17 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 19 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 6 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 16 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 19 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 3 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 17 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 18 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 3 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 16 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 19 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 3 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 16 ms
[2023-03-17 10:15:10] [INFO ] Flatten gal took : 20 ms
[2023-03-17 10:15:10] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 25 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 25 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:11] [INFO ] Flatten gal took : 17 ms
[2023-03-17 10:15:11] [INFO ] Flatten gal took : 18 ms
[2023-03-17 10:15:11] [INFO ] Input system was already deterministic with 415 transitions.
Starting structural reductions in LTL mode, iteration 0 : 138/138 places, 415/415 transitions.
Applied a total of 0 rules in 2 ms. Remains 138 /138 variables (removed 0) and now considering 415/415 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 138/138 places, 415/415 transitions.
[2023-03-17 10:15:11] [INFO ] Flatten gal took : 17 ms
[2023-03-17 10:15:11] [INFO ] Flatten gal took : 18 ms
[2023-03-17 10:15:11] [INFO ] Input system was already deterministic with 415 transitions.
[2023-03-17 10:15:11] [INFO ] Flatten gal took : 32 ms
[2023-03-17 10:15:11] [INFO ] Flatten gal took : 31 ms
[2023-03-17 10:15:11] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 16 ms.
[2023-03-17 10:15:11] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 138 places, 415 transitions and 2620 arcs took 4 ms.
Total runtime 8287 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SafeBus-PT-06
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA SafeBus-PT-06-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA SafeBus-PT-06-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679048193307
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 55 (type EXCL) for 54 SafeBus-PT-06-CTLFireability-15
lola: time limit : 138 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 55 (type EXCL) for SafeBus-PT-06-CTLFireability-15
lola: result : false
lola: markings : 2752
lola: fired transitions : 6528
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 28 (type EXCL) for 27 SafeBus-PT-06-CTLFireability-10
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 28 (type EXCL) for SafeBus-PT-06-CTLFireability-10
lola: result : true
lola: markings : 10792
lola: fired transitions : 17697
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 SafeBus-PT-06-CTLFireability-11
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for SafeBus-PT-06-CTLFireability-11
lola: result : true
lola: markings : 91
lola: fired transitions : 92
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 SafeBus-PT-06-CTLFireability-09
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 25 (type EXCL) for SafeBus-PT-06-CTLFireability-09
lola: result : false
lola: markings : 44984
lola: fired transitions : 176136
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 SafeBus-PT-06-CTLFireability-13
lola: time limit : 256 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for SafeBus-PT-06-CTLFireability-13
lola: result : false
lola: markings : 10406
lola: fired transitions : 17629
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 33 SafeBus-PT-06-CTLFireability-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for SafeBus-PT-06-CTLFireability-12
lola: result : false
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 33 SafeBus-PT-06-CTLFireability-12
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for SafeBus-PT-06-CTLFireability-12
lola: result : false
lola: markings : 6
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 SafeBus-PT-06-CTLFireability-08
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for SafeBus-PT-06-CTLFireability-08
lola: result : true
lola: markings : 90
lola: fired transitions : 90
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 SafeBus-PT-06-CTLFireability-07
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for SafeBus-PT-06-CTLFireability-07
lola: result : true
lola: markings : 551
lola: fired transitions : 757
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 SafeBus-PT-06-CTLFireability-05
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for SafeBus-PT-06-CTLFireability-05
lola: result : true
lola: markings : 22
lola: fired transitions : 39
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 SafeBus-PT-06-CTLFireability-04
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SafeBus-PT-06-CTLFireability-04
lola: result : false
lola: markings : 218
lola: fired transitions : 230
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 SafeBus-PT-06-CTLFireability-03
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for SafeBus-PT-06-CTLFireability-03
lola: result : false
lola: markings : 18892
lola: fired transitions : 53673
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 SafeBus-PT-06-CTLFireability-02
lola: time limit : 719 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SafeBus-PT-06-CTLFireability-03: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-04: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-05: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-07: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-08: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-09: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-10: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-11: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-13: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SafeBus-PT-06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SafeBus-PT-06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
SafeBus-PT-06-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
SafeBus-PT-06-CTLFireability-12: DISJ 0 1 0 0 6 0 0 1
SafeBus-PT-06-CTLFireability-14: AGAF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 3/719 3/32 SafeBus-PT-06-CTLFireability-02 565434 m, 113086 m/sec, 1928780 t fired, .
Time elapsed: 8 secs. Pages in use: 3
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SafeBus-PT-06-CTLFireability-03: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-04: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-05: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-07: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-08: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-09: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-10: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-11: CTL true CTL model checker
SafeBus-PT-06-CTLFireability-13: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
SafeBus-PT-06-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
SafeBus-PT-06-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
SafeBus-PT-06-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
SafeBus-PT-06-CTLFireability-12: DISJ 0 1 0 0 6 0 0 1
SafeBus-PT-06-CTLFireability-14: AGAF 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 8/719 6/32 SafeBus-PT-06-CTLFireability-02 1245236 m, 135960 m/sec, 4560227 t fired, .
Time elapsed: 13 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 15
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SafeBus-PT-06-CTLFireability-03: CTL false CTL model checker
SafeBus-PT-06-CTLFireability-04: CTL false CTL model checker
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lola: FINISHED task # 7 (type EXCL) for SafeBus-PT-06-CTLFireability-02
lola: result : true
lola: markings : 6816756
lola: fired transitions : 37985587
lola: time used : 76.000000
lola: memory pages used : 32
lola: LAUNCH task # 1 (type EXCL) for 0 SafeBus-PT-06-CTLFireability-00
lola: time limit : 879 sec
lola: memory limit: 32 pages
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lola: result : false
lola: markings : 91
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lola: time used : 0.000000
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lola: result : true
lola: markings : 126
lola: fired transitions : 126
lola: time used : 0.000000
lola: memory pages used : 1
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lola: memory limit: 32 pages
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lola: result : true
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lola: time used : 0.000000
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lola: result : false
lola: markings : 121
lola: fired transitions : 352
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-PT-06"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SafeBus-PT-06, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808700266"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-PT-06.tgz
mv SafeBus-PT-06 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;