Execution Chart

Sorry, for this execution, no execution chart could be reported.

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808600226.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SafeBus-COL-15, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808600226
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 508K
-rw-r--r-- 1 mcc users 5.9K Feb 26 02:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 57K Feb 26 02:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 02:07 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 02:07 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 26 02:44 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 168K Feb 26 02:44 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 26 02:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 52K Feb 26 02:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-15-CTLFireability-00
FORMULA_NAME SafeBus-COL-15-CTLFireability-01
FORMULA_NAME SafeBus-COL-15-CTLFireability-02
FORMULA_NAME SafeBus-COL-15-CTLFireability-03
FORMULA_NAME SafeBus-COL-15-CTLFireability-04
FORMULA_NAME SafeBus-COL-15-CTLFireability-05
FORMULA_NAME SafeBus-COL-15-CTLFireability-06
FORMULA_NAME SafeBus-COL-15-CTLFireability-07
FORMULA_NAME SafeBus-COL-15-CTLFireability-08
FORMULA_NAME SafeBus-COL-15-CTLFireability-09
FORMULA_NAME SafeBus-COL-15-CTLFireability-10
FORMULA_NAME SafeBus-COL-15-CTLFireability-11
FORMULA_NAME SafeBus-COL-15-CTLFireability-12
FORMULA_NAME SafeBus-COL-15-CTLFireability-13
FORMULA_NAME SafeBus-COL-15-CTLFireability-14
FORMULA_NAME SafeBus-COL-15-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679013335640

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-COL-15
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 00:35:39] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 00:35:39] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 00:35:39] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-17 00:35:39] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-17 00:35:40] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1044 ms
[2023-03-17 00:35:40] [INFO ] Detected 1 constant HL places corresponding to 15 PT places.
[2023-03-17 00:35:40] [INFO ] Imported 20 HL places and 14 HL transitions for a total of 636 PT places and 59206.0 transition bindings in 40 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 25 ms.
[2023-03-17 00:35:40] [INFO ] Built PT skeleton of HLPN with 20 places and 14 transitions 68 arcs in 8 ms.
[2023-03-17 00:35:40] [INFO ] Skeletonized 3 HLPN properties in 3 ms. Removed 13 properties that had guard overlaps.
Computed a total of 3 stabilizing places and 0 stable transitions
Remains 3 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Incomplete random walk after 10000 steps, including 2 resets, run finished after 174 ms. (steps per millisecond=57 ) properties (out of 3) seen :2
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 14 rows 17 cols
[2023-03-17 00:35:40] [INFO ] Computed 7 place invariants in 5 ms
[2023-03-17 00:35:41] [INFO ] [Real]Absence check using 4 positive place invariants in 7 ms returned sat
[2023-03-17 00:35:41] [INFO ] [Real]Absence check using 4 positive and 3 generalized place invariants in 2 ms returned sat
[2023-03-17 00:35:41] [INFO ] After 213ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 3 simplifications.
FORMULA SafeBus-COL-15-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 00:35:41] [INFO ] Flatten gal took : 20 ms
[2023-03-17 00:35:41] [INFO ] Flatten gal took : 5 ms
Domain [It(15), It(15)] of place AMC breaks symmetries in sort It
[2023-03-17 00:35:41] [INFO ] Unfolded HLPN to a Petri net with 636 places and 4801 transitions 34264 arcs in 144 ms.
[2023-03-17 00:35:41] [INFO ] Unfolded 15 HLPN properties in 22 ms.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
[2023-03-17 00:35:41] [INFO ] Reduced 195 identical enabling conditions.
Deduced a syphon composed of 15 places in 18 ms
Reduce places removed 30 places and 30 transitions.
Support contains 606 out of 606 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4771/4771 transitions.
Applied a total of 0 rules in 39 ms. Remains 606 /606 variables (removed 0) and now considering 4771/4771 (removed 0) transitions.
[2023-03-17 00:35:43] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
// Phase 1: matrix 1412 rows 606 cols
[2023-03-17 00:35:43] [INFO ] Computed 65 place invariants in 117 ms
[2023-03-17 00:35:43] [INFO ] Implicit Places using invariants in 392 ms returned []
[2023-03-17 00:35:43] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2023-03-17 00:35:43] [INFO ] Invariant cache hit.
[2023-03-17 00:35:44] [INFO ] State equation strengthened by 241 read => feed constraints.
[2023-03-17 00:35:45] [INFO ] Implicit Places using invariants and state equation in 1082 ms returned []
Implicit Place search using SMT with State Equation took 1479 ms to find 0 implicit places.
[2023-03-17 00:35:45] [INFO ] Flow matrix only has 1412 transitions (discarded 3359 similar events)
[2023-03-17 00:35:45] [INFO ] Invariant cache hit.
[2023-03-17 00:35:51] [INFO ] Dead Transitions using invariants and state equation in 6231 ms found 225 transitions.
Found 225 dead transitions using SMT.
Drop transitions removed 225 transitions
Dead transitions reduction (with SMT) removed 225 transitions
Starting structural reductions in LTL mode, iteration 1 : 606/606 places, 4546/4771 transitions.
Applied a total of 0 rules in 24 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 7787 ms. Remains : 606/606 places, 4546/4771 transitions.
Support contains 606 out of 606 places after structural reductions.
[2023-03-17 00:35:53] [INFO ] Flatten gal took : 918 ms
[2023-03-17 00:35:58] [INFO ] Flatten gal took : 1074 ms
[2023-03-17 00:36:03] [INFO ] Input system was already deterministic with 4546 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1358 ms. (steps per millisecond=7 ) properties (out of 46) seen :40
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 515 ms. (steps per millisecond=19 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 231 ms. (steps per millisecond=43 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 464 ms. (steps per millisecond=21 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 447 ms. (steps per millisecond=22 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 191 ms. (steps per millisecond=52 ) properties (out of 6) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 143 ms. (steps per millisecond=69 ) properties (out of 6) seen :0
Running SMT prover for 6 properties.
[2023-03-17 00:36:07] [INFO ] Flow matrix only has 1412 transitions (discarded 3134 similar events)
[2023-03-17 00:36:07] [INFO ] Invariant cache hit.
[2023-03-17 00:36:09] [INFO ] [Real]Absence check using 31 positive place invariants in 26 ms returned sat
[2023-03-17 00:36:09] [INFO ] [Real]Absence check using 31 positive and 34 generalized place invariants in 49 ms returned sat
[2023-03-17 00:36:09] [INFO ] After 569ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:5
[2023-03-17 00:36:09] [INFO ] [Nat]Absence check using 31 positive place invariants in 15 ms returned sat
[2023-03-17 00:36:09] [INFO ] [Nat]Absence check using 31 positive and 34 generalized place invariants in 24 ms returned sat
[2023-03-17 00:36:09] [INFO ] After 295ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :0
Fused 6 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 6 atomic propositions for a total of 15 simplifications.
FORMULA SafeBus-COL-15-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 00:36:10] [INFO ] Flatten gal took : 521 ms
[2023-03-17 00:36:15] [INFO ] Flatten gal took : 708 ms
[2023-03-17 00:36:19] [INFO ] Input system was already deterministic with 4546 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 21 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:20] [INFO ] Flatten gal took : 188 ms
[2023-03-17 00:36:20] [INFO ] Flatten gal took : 236 ms
[2023-03-17 00:36:21] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 60 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 63 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:21] [INFO ] Flatten gal took : 171 ms
[2023-03-17 00:36:21] [INFO ] Flatten gal took : 189 ms
[2023-03-17 00:36:21] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 19 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 21 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:22] [INFO ] Flatten gal took : 175 ms
[2023-03-17 00:36:22] [INFO ] Flatten gal took : 218 ms
[2023-03-17 00:36:22] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 1559 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1562 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:24] [INFO ] Flatten gal took : 182 ms
[2023-03-17 00:36:24] [INFO ] Flatten gal took : 207 ms
[2023-03-17 00:36:24] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 12 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 13 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:25] [INFO ] Flatten gal took : 211 ms
[2023-03-17 00:36:25] [INFO ] Flatten gal took : 288 ms
[2023-03-17 00:36:26] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 1118 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1119 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:27] [INFO ] Flatten gal took : 158 ms
[2023-03-17 00:36:27] [INFO ] Flatten gal took : 181 ms
[2023-03-17 00:36:28] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 15 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:28] [INFO ] Flatten gal took : 161 ms
[2023-03-17 00:36:28] [INFO ] Flatten gal took : 186 ms
[2023-03-17 00:36:28] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 980 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 985 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:29] [INFO ] Flatten gal took : 157 ms
[2023-03-17 00:36:30] [INFO ] Flatten gal took : 177 ms
[2023-03-17 00:36:30] [INFO ] Input system was already deterministic with 4546 transitions.
Finished random walk after 16 steps, including 0 resets, run visited all 1 properties in 3 ms. (steps per millisecond=5 )
FORMULA SafeBus-COL-15-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 19 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 19 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:30] [INFO ] Flatten gal took : 255 ms
[2023-03-17 00:36:31] [INFO ] Flatten gal took : 256 ms
[2023-03-17 00:36:31] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 25 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:31] [INFO ] Flatten gal took : 155 ms
[2023-03-17 00:36:32] [INFO ] Flatten gal took : 179 ms
[2023-03-17 00:36:32] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 11 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:32] [INFO ] Flatten gal took : 209 ms
[2023-03-17 00:36:33] [INFO ] Flatten gal took : 288 ms
[2023-03-17 00:36:33] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 11 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:33] [INFO ] Flatten gal took : 185 ms
[2023-03-17 00:36:34] [INFO ] Flatten gal took : 237 ms
[2023-03-17 00:36:34] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 23 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:34] [INFO ] Flatten gal took : 179 ms
[2023-03-17 00:36:35] [INFO ] Flatten gal took : 173 ms
[2023-03-17 00:36:35] [INFO ] Input system was already deterministic with 4546 transitions.
Starting structural reductions in LTL mode, iteration 0 : 606/606 places, 4546/4546 transitions.
Applied a total of 0 rules in 10 ms. Remains 606 /606 variables (removed 0) and now considering 4546/4546 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 11 ms. Remains : 606/606 places, 4546/4546 transitions.
[2023-03-17 00:36:35] [INFO ] Flatten gal took : 214 ms
[2023-03-17 00:36:36] [INFO ] Flatten gal took : 290 ms
[2023-03-17 00:36:36] [INFO ] Input system was already deterministic with 4546 transitions.
[2023-03-17 00:36:37] [INFO ] Flatten gal took : 709 ms
[2023-03-17 00:36:41] [INFO ] Flatten gal took : 712 ms
[2023-03-17 00:36:45] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 195 ms.
[2023-03-17 00:36:45] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 606 places, 4546 transitions and 32329 arcs took 36 ms.
Total runtime 65945 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SafeBus-COL-15
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

BK_STOP 1679013624559

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 497 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-15"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SafeBus-COL-15, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808600226"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-15.tgz
mv SafeBus-COL-15 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;