Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808600202.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is SafeBus-COL-03, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808600202
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 516K
-rw-r--r-- 1 mcc users 7.8K Feb 26 01:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 83K Feb 26 01:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.7K Feb 26 01:28 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 26 01:28 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 01:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Feb 26 01:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 26 01:30 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 01:30 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 42K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SafeBus-COL-03-CTLFireability-00
FORMULA_NAME SafeBus-COL-03-CTLFireability-01
FORMULA_NAME SafeBus-COL-03-CTLFireability-02
FORMULA_NAME SafeBus-COL-03-CTLFireability-03
FORMULA_NAME SafeBus-COL-03-CTLFireability-04
FORMULA_NAME SafeBus-COL-03-CTLFireability-05
FORMULA_NAME SafeBus-COL-03-CTLFireability-06
FORMULA_NAME SafeBus-COL-03-CTLFireability-07
FORMULA_NAME SafeBus-COL-03-CTLFireability-08
FORMULA_NAME SafeBus-COL-03-CTLFireability-09
FORMULA_NAME SafeBus-COL-03-CTLFireability-10
FORMULA_NAME SafeBus-COL-03-CTLFireability-11
FORMULA_NAME SafeBus-COL-03-CTLFireability-12
FORMULA_NAME SafeBus-COL-03-CTLFireability-13
FORMULA_NAME SafeBus-COL-03-CTLFireability-14
FORMULA_NAME SafeBus-COL-03-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679004179776

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SafeBus-COL-03
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 22:03:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 22:03:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 22:03:03] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-16 22:03:03] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-16 22:03:04] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1106 ms
[2023-03-16 22:03:04] [INFO ] Detected 1 constant HL places corresponding to 3 PT places.
[2023-03-16 22:03:04] [INFO ] Imported 20 HL places and 14 HL transitions for a total of 60 PT places and 214.0 transition bindings in 43 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 26 ms.
[2023-03-16 22:03:04] [INFO ] Built PT skeleton of HLPN with 20 places and 14 transitions 68 arcs in 8 ms.
[2023-03-16 22:03:04] [INFO ] Skeletonized 5 HLPN properties in 2 ms. Removed 11 properties that had guard overlaps.
Computed a total of 3 stabilizing places and 0 stable transitions
Remains 4 properties that can be checked using skeleton over-approximation.
Reduce places removed 3 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Incomplete random walk after 10000 steps, including 2 resets, run finished after 188 ms. (steps per millisecond=53 ) properties (out of 7) seen :6
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
// Phase 1: matrix 14 rows 17 cols
[2023-03-16 22:03:05] [INFO ] Computed 7 place invariants in 6 ms
[2023-03-16 22:03:05] [INFO ] [Real]Absence check using 4 positive place invariants in 8 ms returned sat
[2023-03-16 22:03:05] [INFO ] [Real]Absence check using 4 positive and 3 generalized place invariants in 2 ms returned sat
[2023-03-16 22:03:05] [INFO ] After 241ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 4 simplifications.
FORMULA SafeBus-COL-03-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 22:03:05] [INFO ] Flatten gal took : 30 ms
[2023-03-16 22:03:05] [INFO ] Flatten gal took : 8 ms
Domain [It(3), It(3)] of place AMC breaks symmetries in sort It
[2023-03-16 22:03:05] [INFO ] Unfolded HLPN to a Petri net with 60 places and 97 transitions 556 arcs in 29 ms.
[2023-03-16 22:03:05] [INFO ] Unfolded 15 HLPN properties in 1 ms.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
[2023-03-16 22:03:05] [INFO ] Reduced 3 identical enabling conditions.
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 6 places and 6 transitions.
Support contains 54 out of 54 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 91/91 transitions.
Applied a total of 0 rules in 12 ms. Remains 54 /54 variables (removed 0) and now considering 91/91 (removed 0) transitions.
[2023-03-16 22:03:05] [INFO ] Flow matrix only has 68 transitions (discarded 23 similar events)
// Phase 1: matrix 68 rows 54 cols
[2023-03-16 22:03:05] [INFO ] Computed 17 place invariants in 20 ms
[2023-03-16 22:03:05] [INFO ] Implicit Places using invariants in 130 ms returned []
[2023-03-16 22:03:05] [INFO ] Flow matrix only has 68 transitions (discarded 23 similar events)
[2023-03-16 22:03:05] [INFO ] Invariant cache hit.
[2023-03-16 22:03:05] [INFO ] State equation strengthened by 13 read => feed constraints.
[2023-03-16 22:03:05] [INFO ] Implicit Places using invariants and state equation in 130 ms returned []
Implicit Place search using SMT with State Equation took 265 ms to find 0 implicit places.
[2023-03-16 22:03:05] [INFO ] Flow matrix only has 68 transitions (discarded 23 similar events)
[2023-03-16 22:03:05] [INFO ] Invariant cache hit.
[2023-03-16 22:03:06] [INFO ] Dead Transitions using invariants and state equation in 184 ms found 9 transitions.
Found 9 dead transitions using SMT.
Drop transitions removed 9 transitions
Dead transitions reduction (with SMT) removed 9 transitions
Starting structural reductions in LTL mode, iteration 1 : 54/54 places, 82/91 transitions.
Applied a total of 0 rules in 3 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 467 ms. Remains : 54/54 places, 82/91 transitions.
Support contains 54 out of 54 places after structural reductions.
[2023-03-16 22:03:06] [INFO ] Flatten gal took : 44 ms
[2023-03-16 22:03:06] [INFO ] Flatten gal took : 54 ms
[2023-03-16 22:03:06] [INFO ] Input system was already deterministic with 82 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 434 ms. (steps per millisecond=23 ) properties (out of 35) seen :33
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 137 ms. (steps per millisecond=72 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 98 ms. (steps per millisecond=102 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-16 22:03:07] [INFO ] Flow matrix only has 68 transitions (discarded 14 similar events)
[2023-03-16 22:03:07] [INFO ] Invariant cache hit.
[2023-03-16 22:03:07] [INFO ] [Real]Absence check using 7 positive place invariants in 3 ms returned sat
[2023-03-16 22:03:07] [INFO ] [Real]Absence check using 7 positive and 10 generalized place invariants in 4 ms returned sat
[2023-03-16 22:03:07] [INFO ] After 61ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 2 atomic propositions for a total of 15 simplifications.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 19 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 20 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 9 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 11 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 11 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 9 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 6 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 9 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 0 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:07] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:07] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 5 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 6 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 5 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 5 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 9 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 82/82 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 82/82 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 54/54 places, 82/82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 7 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 8 ms
[2023-03-16 22:03:08] [INFO ] Input system was already deterministic with 82 transitions.
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 28 ms
[2023-03-16 22:03:08] [INFO ] Flatten gal took : 18 ms
[2023-03-16 22:03:08] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 21 ms.
[2023-03-16 22:03:08] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 82 transitions and 457 arcs took 2 ms.
Total runtime 5141 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT SafeBus-COL-03
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA SafeBus-COL-03-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA SafeBus-COL-03-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679004190755

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 1 (type EXCL) for 0 SafeBus-COL-03-CTLFireability-00
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 1 (type EXCL) for SafeBus-COL-03-CTLFireability-00
lola: result : false
lola: markings : 109
lola: fired transitions : 338
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 25 (type EXCL) for 24 SafeBus-COL-03-CTLFireability-08
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 25 (type EXCL) for SafeBus-COL-03-CTLFireability-08
lola: result : true
lola: markings : 522
lola: fired transitions : 741
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 SafeBus-COL-03-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 40 (type EXCL) for SafeBus-COL-03-CTLFireability-13
lola: result : true
lola: markings : 4650
lola: fired transitions : 21761
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 SafeBus-COL-03-CTLFireability-14
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 43 (type EXCL) for SafeBus-COL-03-CTLFireability-14
lola: result : true
lola: markings : 4650
lola: fired transitions : 26117
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 SafeBus-COL-03-CTLFireability-12
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for SafeBus-COL-03-CTLFireability-12
lola: result : true
lola: markings : 1594
lola: fired transitions : 5574
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 SafeBus-COL-03-CTLFireability-11
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for SafeBus-COL-03-CTLFireability-11
lola: result : false
lola: markings : 109
lola: fired transitions : 218
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 SafeBus-COL-03-CTLFireability-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for SafeBus-COL-03-CTLFireability-10
lola: result : true
lola: markings : 255
lola: fired transitions : 396
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 SafeBus-COL-03-CTLFireability-09
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for SafeBus-COL-03-CTLFireability-09
lola: result : false
lola: markings : 692
lola: fired transitions : 2386
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 SafeBus-COL-03-CTLFireability-07
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for SafeBus-COL-03-CTLFireability-07
lola: result : true
lola: markings : 4650
lola: fired transitions : 21057
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 SafeBus-COL-03-CTLFireability-06
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for SafeBus-COL-03-CTLFireability-06
lola: result : false
lola: markings : 4650
lola: fired transitions : 95907
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 SafeBus-COL-03-CTLFireability-05
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for SafeBus-COL-03-CTLFireability-05
lola: result : false
lola: markings : 255
lola: fired transitions : 390
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 SafeBus-COL-03-CTLFireability-04
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for SafeBus-COL-03-CTLFireability-04
lola: result : false
lola: markings : 120
lola: fired transitions : 134
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 SafeBus-COL-03-CTLFireability-02
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for SafeBus-COL-03-CTLFireability-02
lola: result : false
lola: markings : 1136
lola: fired transitions : 1727
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 SafeBus-COL-03-CTLFireability-03
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for SafeBus-COL-03-CTLFireability-03
lola: result : false
lola: markings : 541
lola: fired transitions : 1036
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 SafeBus-COL-03-CTLFireability-01
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for SafeBus-COL-03-CTLFireability-01
lola: result : true
lola: markings : 4650
lola: fired transitions : 47751
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
SafeBus-COL-03-CTLFireability-00: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-01: CTL true CTL model checker
SafeBus-COL-03-CTLFireability-02: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-03: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-04: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-05: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-06: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-07: CTL true CTL model checker
SafeBus-COL-03-CTLFireability-08: CTL true CTL model checker
SafeBus-COL-03-CTLFireability-09: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-10: CTL true CTL model checker
SafeBus-COL-03-CTLFireability-11: CTL false CTL model checker
SafeBus-COL-03-CTLFireability-12: CTL true CTL model checker
SafeBus-COL-03-CTLFireability-13: CTL true CTL model checker
SafeBus-COL-03-CTLFireability-14: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SafeBus-COL-03"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is SafeBus-COL-03, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808600202"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SafeBus-COL-03.tgz
mv SafeBus-COL-03 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;