About the Execution of LoLa+red for RwMutex-PT-r0500w0010
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16222.163 | 311702.00 | 303498.00 | 18766.70 | ??FFFF????????T? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808600177.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RwMutex-PT-r0500w0010, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808600177
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 8.1K Feb 25 22:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 25 22:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 22:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 22:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 22:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Feb 25 22:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 22:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 124K Feb 25 22:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 1.1M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-00
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-01
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-02
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-03
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-04
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-05
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-06
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-07
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-08
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-09
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-10
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-11
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-12
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-13
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-14
FORMULA_NAME RwMutex-PT-r0500w0010-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678999411682
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0500w0010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 20:43:35] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-16 20:43:35] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 20:43:35] [INFO ] Load time of PNML (sax parser for PT used): 452 ms
[2023-03-16 20:43:35] [INFO ] Transformed 1520 places.
[2023-03-16 20:43:35] [INFO ] Transformed 1020 transitions.
[2023-03-16 20:43:35] [INFO ] Found NUPN structural information;
[2023-03-16 20:43:35] [INFO ] Parsed PT model containing 1520 places and 1020 transitions and 13040 arcs in 650 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 24 ms.
Support contains 134 out of 1520 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 290 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
// Phase 1: matrix 1020 rows 1520 cols
[2023-03-16 20:43:36] [INFO ] Computed 1010 place invariants in 66 ms
[2023-03-16 20:43:55] [INFO ] Implicit Places using invariants in 19252 ms returned []
[2023-03-16 20:43:55] [INFO ] Invariant cache hit.
[2023-03-16 20:44:14] [INFO ] Implicit Places using invariants and state equation in 18549 ms returned []
Implicit Place search using SMT with State Equation took 37859 ms to find 0 implicit places.
[2023-03-16 20:44:14] [INFO ] Invariant cache hit.
[2023-03-16 20:44:15] [INFO ] Dead Transitions using invariants and state equation in 1657 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 39817 ms. Remains : 1520/1520 places, 1020/1020 transitions.
Support contains 134 out of 1520 places after structural reductions.
[2023-03-16 20:44:17] [INFO ] Flatten gal took : 1074 ms
[2023-03-16 20:44:17] [INFO ] Flatten gal took : 754 ms
[2023-03-16 20:44:18] [INFO ] Input system was already deterministic with 1020 transitions.
Support contains 121 out of 1520 places (down from 134) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1331 ms. (steps per millisecond=7 ) properties (out of 73) seen :72
Finished Best-First random walk after 511 steps, including 0 resets, run visited all 1 properties in 12 ms. (steps per millisecond=42 )
[2023-03-16 20:44:19] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-16 20:44:20] [INFO ] Flatten gal took : 626 ms
FORMULA RwMutex-PT-r0500w0010-CTLCardinality-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 20:44:21] [INFO ] Flatten gal took : 660 ms
[2023-03-16 20:44:21] [INFO ] Input system was already deterministic with 1020 transitions.
Support contains 114 out of 1520 places (down from 121) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 67 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 69 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:22] [INFO ] Flatten gal took : 596 ms
[2023-03-16 20:44:22] [INFO ] Flatten gal took : 630 ms
[2023-03-16 20:44:22] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 66 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 68 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:23] [INFO ] Flatten gal took : 600 ms
[2023-03-16 20:44:24] [INFO ] Flatten gal took : 607 ms
[2023-03-16 20:44:24] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 63 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 65 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:24] [INFO ] Flatten gal took : 585 ms
[2023-03-16 20:44:25] [INFO ] Flatten gal took : 579 ms
[2023-03-16 20:44:25] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Drop transitions removed 494 transitions
Trivial Post-agglo rules discarded 494 transitions
Performed 494 trivial Post agglomeration. Transition count delta: 494
Iterating post reduction 0 with 494 rules applied. Total rules applied 494 place count 1520 transition count 526
Reduce places removed 988 places and 0 transitions.
Iterating post reduction 1 with 988 rules applied. Total rules applied 1482 place count 532 transition count 526
Applied a total of 1482 rules in 242 ms. Remains 532 /1520 variables (removed 988) and now considering 526/1020 (removed 494) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 243 ms. Remains : 532/1520 places, 526/1020 transitions.
[2023-03-16 20:44:26] [INFO ] Flatten gal took : 541 ms
[2023-03-16 20:44:27] [INFO ] Flatten gal took : 533 ms
[2023-03-16 20:44:27] [INFO ] Input system was already deterministic with 526 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Drop transitions removed 494 transitions
Trivial Post-agglo rules discarded 494 transitions
Performed 494 trivial Post agglomeration. Transition count delta: 494
Iterating post reduction 0 with 494 rules applied. Total rules applied 494 place count 1520 transition count 526
Reduce places removed 988 places and 0 transitions.
Iterating post reduction 1 with 988 rules applied. Total rules applied 1482 place count 532 transition count 526
Applied a total of 1482 rules in 177 ms. Remains 532 /1520 variables (removed 988) and now considering 526/1020 (removed 494) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 182 ms. Remains : 532/1520 places, 526/1020 transitions.
[2023-03-16 20:44:27] [INFO ] Flatten gal took : 557 ms
[2023-03-16 20:44:28] [INFO ] Flatten gal took : 598 ms
[2023-03-16 20:44:28] [INFO ] Input system was already deterministic with 526 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 60 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:29] [INFO ] Flatten gal took : 565 ms
[2023-03-16 20:44:29] [INFO ] Flatten gal took : 587 ms
[2023-03-16 20:44:30] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 59 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:30] [INFO ] Flatten gal took : 631 ms
[2023-03-16 20:44:31] [INFO ] Flatten gal took : 607 ms
[2023-03-16 20:44:31] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 57 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 57 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:32] [INFO ] Flatten gal took : 584 ms
[2023-03-16 20:44:33] [INFO ] Flatten gal took : 868 ms
[2023-03-16 20:44:33] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 57 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 61 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:33] [INFO ] Flatten gal took : 578 ms
[2023-03-16 20:44:34] [INFO ] Flatten gal took : 571 ms
[2023-03-16 20:44:34] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 98 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 98 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:35] [INFO ] Flatten gal took : 883 ms
[2023-03-16 20:44:36] [INFO ] Flatten gal took : 589 ms
[2023-03-16 20:44:36] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 59 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:37] [INFO ] Flatten gal took : 598 ms
[2023-03-16 20:44:37] [INFO ] Flatten gal took : 591 ms
[2023-03-16 20:44:37] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 73 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 73 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:38] [INFO ] Flatten gal took : 744 ms
[2023-03-16 20:44:39] [INFO ] Flatten gal took : 578 ms
[2023-03-16 20:44:39] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Drop transitions removed 496 transitions
Trivial Post-agglo rules discarded 496 transitions
Performed 496 trivial Post agglomeration. Transition count delta: 496
Iterating post reduction 0 with 496 rules applied. Total rules applied 496 place count 1520 transition count 524
Reduce places removed 992 places and 0 transitions.
Iterating post reduction 1 with 992 rules applied. Total rules applied 1488 place count 528 transition count 524
Applied a total of 1488 rules in 114 ms. Remains 528 /1520 variables (removed 992) and now considering 524/1020 (removed 496) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 114 ms. Remains : 528/1520 places, 524/1020 transitions.
[2023-03-16 20:44:40] [INFO ] Flatten gal took : 531 ms
[2023-03-16 20:44:40] [INFO ] Flatten gal took : 529 ms
[2023-03-16 20:44:40] [INFO ] Input system was already deterministic with 524 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 53 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 54 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:41] [INFO ] Flatten gal took : 559 ms
[2023-03-16 20:44:41] [INFO ] Flatten gal took : 573 ms
[2023-03-16 20:44:42] [INFO ] Input system was already deterministic with 1020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 1520/1520 places, 1020/1020 transitions.
Applied a total of 0 rules in 85 ms. Remains 1520 /1520 variables (removed 0) and now considering 1020/1020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 85 ms. Remains : 1520/1520 places, 1020/1020 transitions.
[2023-03-16 20:44:42] [INFO ] Flatten gal took : 656 ms
[2023-03-16 20:44:43] [INFO ] Flatten gal took : 563 ms
[2023-03-16 20:44:43] [INFO ] Input system was already deterministic with 1020 transitions.
[2023-03-16 20:44:44] [INFO ] Flatten gal took : 570 ms
[2023-03-16 20:44:44] [INFO ] Flatten gal took : 571 ms
[2023-03-16 20:44:44] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 3 ms.
[2023-03-16 20:44:44] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1520 places, 1020 transitions and 13040 arcs took 16 ms.
Total runtime 69653 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RwMutex-PT-r0500w0010
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/371
FORMULA RwMutex-PT-r0500w0010-CTLCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0500w0010-CTLCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0500w0010-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0500w0010-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678999723384
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/371/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/371/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/371/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 53 (type SKEL/SRCH) for 24 RwMutex-PT-r0500w0010-CTLCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 53 (type SKEL/SRCH) for RwMutex-PT-r0500w0010-CTLCardinality-09
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 54 (type SKEL/SRCH) for 24 RwMutex-PT-r0500w0010-CTLCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 54 (type SKEL/SRCH) for RwMutex-PT-r0500w0010-CTLCardinality-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 55 (type SKEL/SRCH) for 24 RwMutex-PT-r0500w0010-CTLCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type SKEL/SRCH) for RwMutex-PT-r0500w0010-CTLCardinality-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
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lola: RELEASE
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lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 13 (type EXCL) for 12 RwMutex-PT-r0500w0010-CTLCardinality-04
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 13 (type EXCL) for RwMutex-PT-r0500w0010-CTLCardinality-04
lola: result : false
lola: markings : 74
lola: fired transitions : 16517
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 RwMutex-PT-r0500w0010-CTLCardinality-03
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for RwMutex-PT-r0500w0010-CTLCardinality-03
lola: result : false
lola: markings : 36
lola: fired transitions : 3089
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 7 (type EXCL) for 6 RwMutex-PT-r0500w0010-CTLCardinality-02
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 7 (type EXCL) for RwMutex-PT-r0500w0010-CTLCardinality-02
lola: result : false
lola: markings : 65733
lola: fired transitions : 116642
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 RwMutex-PT-r0500w0010-CTLCardinality-15
lola: time limit : 256 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r0500w0010-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 1/256 1/32 RwMutex-PT-r0500w0010-CTLCardinality-15 37680 m, 7536 m/sec, 183945 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 6/256 2/32 RwMutex-PT-r0500w0010-CTLCardinality-15 202862 m, 33036 m/sec, 1094414 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 11/256 3/32 RwMutex-PT-r0500w0010-CTLCardinality-15 369739 m, 33375 m/sec, 1999560 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 16/256 4/32 RwMutex-PT-r0500w0010-CTLCardinality-15 533781 m, 32808 m/sec, 2907003 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 21/256 5/32 RwMutex-PT-r0500w0010-CTLCardinality-15 688490 m, 30941 m/sec, 3810620 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
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51 CTL EXCL 26/256 7/32 RwMutex-PT-r0500w0010-CTLCardinality-15 850222 m, 32346 m/sec, 4700326 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 31/256 8/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1008841 m, 31723 m/sec, 5596571 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 36/256 9/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1161259 m, 30483 m/sec, 6474381 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 41/256 10/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1307938 m, 29335 m/sec, 7354254 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 46/256 11/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1470713 m, 32555 m/sec, 8263722 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 51/256 12/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1630537 m, 31964 m/sec, 9177020 t fired, .
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51 CTL EXCL 56/256 13/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1785015 m, 30895 m/sec, 10093468 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 61/256 15/32 RwMutex-PT-r0500w0010-CTLCardinality-15 1952578 m, 33512 m/sec, 11004911 t fired, .
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51 CTL EXCL 66/256 16/32 RwMutex-PT-r0500w0010-CTLCardinality-15 2116334 m, 32751 m/sec, 11919063 t fired, .
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51 CTL EXCL 71/256 17/32 RwMutex-PT-r0500w0010-CTLCardinality-15 2271583 m, 31049 m/sec, 12838724 t fired, .
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51 CTL EXCL 76/256 18/32 RwMutex-PT-r0500w0010-CTLCardinality-15 2434327 m, 32548 m/sec, 13752303 t fired, .
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51 CTL EXCL 81/256 19/32 RwMutex-PT-r0500w0010-CTLCardinality-15 2583834 m, 29901 m/sec, 14590549 t fired, .
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51 CTL EXCL 86/256 20/32 RwMutex-PT-r0500w0010-CTLCardinality-15 2746430 m, 32519 m/sec, 15510066 t fired, .
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51 CTL EXCL 91/256 21/32 RwMutex-PT-r0500w0010-CTLCardinality-15 2889142 m, 28542 m/sec, 16365696 t fired, .
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51 CTL EXCL 96/256 23/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3054342 m, 33040 m/sec, 17278256 t fired, .
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51 CTL EXCL 101/256 24/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3214205 m, 31972 m/sec, 18194168 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 106/256 25/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3374641 m, 32087 m/sec, 19105337 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 111/256 26/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3526295 m, 30330 m/sec, 20024835 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 116/256 27/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3670968 m, 28934 m/sec, 20803589 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 121/256 28/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3765588 m, 18924 m/sec, 21302807 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 126/256 28/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3836523 m, 14187 m/sec, 21712387 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 131/256 29/32 RwMutex-PT-r0500w0010-CTLCardinality-15 3907772 m, 14249 m/sec, 22116107 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 138/256 30/32 RwMutex-PT-r0500w0010-CTLCardinality-15 4001270 m, 18699 m/sec, 22659087 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-01: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 143/256 30/32 RwMutex-PT-r0500w0010-CTLCardinality-15 4086748 m, 17095 m/sec, 23172680 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 148/256 31/32 RwMutex-PT-r0500w0010-CTLCardinality-15 4160159 m, 14682 m/sec, 23605945 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 153/256 31/32 RwMutex-PT-r0500w0010-CTLCardinality-15 4229364 m, 13841 m/sec, 24010381 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 158/256 32/32 RwMutex-PT-r0500w0010-CTLCardinality-15 4314528 m, 17032 m/sec, 24520251 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 163/256 32/32 RwMutex-PT-r0500w0010-CTLCardinality-15 4400867 m, 17267 m/sec, 25015790 t fired, .
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RwMutex-PT-r0500w0010-CTLCardinality-02: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-03: CTL false CTL model checker
RwMutex-PT-r0500w0010-CTLCardinality-04: CTL false CTL model checker
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RwMutex-PT-r0500w0010-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-09: CONJ 0 3 0 0 3 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-10: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-14: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLCardinality-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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lola: FINISHED task # 48 (type EXCL) for RwMutex-PT-r0500w0010-CTLCardinality-14
lola: result : true
lola: markings : 81092
lola: fired transitions : 102421
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 474 Killed lola --conf=$BIN_DIR/configfiles/ctlcardinalityconf --formula=$DIR/CTLCardinality.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0500w0010"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RwMutex-PT-r0500w0010, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808600177"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0500w0010.tgz
mv RwMutex-PT-r0500w0010 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;