Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808500153.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RwMutex-PT-r0010w2000, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808500153
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 4.1M
-rw-r--r-- 1 mcc users 5.8K Feb 25 23:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 25 23:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 23:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 23:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 01:18 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 143K Feb 26 01:18 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.3K Feb 26 00:39 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 80K Feb 26 00:39 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.6M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-00
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-01
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-02
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-03
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-04
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-05
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-06
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-07
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-08
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-09
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-10
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-11
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-12
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-13
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-14
FORMULA_NAME RwMutex-PT-r0010w2000-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678998216042

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w2000
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 20:23:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-16 20:23:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 20:23:39] [INFO ] Load time of PNML (sax parser for PT used): 875 ms
[2023-03-16 20:23:39] [INFO ] Transformed 4030 places.
[2023-03-16 20:23:40] [INFO ] Transformed 4020 transitions.
[2023-03-16 20:23:40] [INFO ] Found NUPN structural information;
[2023-03-16 20:23:40] [INFO ] Parsed PT model containing 4030 places and 4020 transitions and 48060 arcs in 1080 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 34 ms.
FORMULA RwMutex-PT-r0010w2000-CTLCardinality-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 87 out of 4030 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 765 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
// Phase 1: matrix 4020 rows 4030 cols
[2023-03-16 20:23:42] [INFO ] Computed 2020 place invariants in 1959 ms
[2023-03-16 20:23:44] [INFO ] Implicit Places using invariants in 3507 ms returned []
[2023-03-16 20:23:44] [INFO ] Invariant cache hit.
[2023-03-16 20:23:45] [INFO ] Implicit Places using invariants and state equation in 1242 ms returned []
Implicit Place search using SMT with State Equation took 4795 ms to find 0 implicit places.
[2023-03-16 20:23:45] [INFO ] Invariant cache hit.
[2023-03-16 20:23:46] [INFO ] Dead Transitions using invariants and state equation in 1142 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6710 ms. Remains : 4030/4030 places, 4020/4020 transitions.
Support contains 87 out of 4030 places after structural reductions.
[2023-03-16 20:23:47] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-16 20:23:48] [INFO ] Flatten gal took : 846 ms
[2023-03-16 20:23:48] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA RwMutex-PT-r0010w2000-CTLCardinality-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 20:23:48] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA RwMutex-PT-r0010w2000-CTLCardinality-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w2000-CTLCardinality-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w2000-CTLCardinality-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 20:23:48] [INFO ] Flatten gal took : 435 ms
[2023-03-16 20:23:49] [INFO ] Input system was already deterministic with 4020 transitions.
Support contains 62 out of 4030 places (down from 87) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 7190 ms. (steps per millisecond=1 ) properties (out of 36) seen :24
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 392 ms. (steps per millisecond=25 ) properties (out of 12) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 403 ms. (steps per millisecond=24 ) properties (out of 11) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 364 ms. (steps per millisecond=27 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 383 ms. (steps per millisecond=26 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 382 ms. (steps per millisecond=26 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 400 ms. (steps per millisecond=25 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 426 ms. (steps per millisecond=23 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 374 ms. (steps per millisecond=26 ) properties (out of 9) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 397 ms. (steps per millisecond=25 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 377 ms. (steps per millisecond=26 ) properties (out of 8) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 373 ms. (steps per millisecond=26 ) properties (out of 8) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 372 ms. (steps per millisecond=26 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-16 20:24:01] [INFO ] Invariant cache hit.
[2023-03-16 20:24:04] [INFO ] [Real]Absence check using 2020 positive place invariants in 1365 ms returned sat
[2023-03-16 20:24:04] [INFO ] After 2994ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:4
[2023-03-16 20:24:07] [INFO ] [Nat]Absence check using 2020 positive place invariants in 1031 ms returned sat
[2023-03-16 20:24:07] [INFO ] After 2552ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 7 atomic propositions for a total of 11 simplifications.
[2023-03-16 20:24:07] [INFO ] Flatten gal took : 319 ms
[2023-03-16 20:24:07] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA RwMutex-PT-r0010w2000-CTLCardinality-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 20:24:08] [INFO ] Flatten gal took : 474 ms
[2023-03-16 20:24:08] [INFO ] Input system was already deterministic with 4020 transitions.
Support contains 29 out of 4030 places (down from 35) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Drop transitions removed 2009 transitions
Trivial Post-agglo rules discarded 2009 transitions
Performed 2009 trivial Post agglomeration. Transition count delta: 2009
Iterating post reduction 0 with 2009 rules applied. Total rules applied 2009 place count 4030 transition count 2011
Reduce places removed 4018 places and 0 transitions.
Ensure Unique test removed 1998 transitions
Reduce isomorphic transitions removed 1998 transitions.
Iterating post reduction 1 with 6016 rules applied. Total rules applied 8025 place count 12 transition count 13
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 8026 place count 12 transition count 12
Applied a total of 8026 rules in 144 ms. Remains 12 /4030 variables (removed 4018) and now considering 12/4020 (removed 4008) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 146 ms. Remains : 12/4030 places, 12/4020 transitions.
[2023-03-16 20:24:09] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:24:09] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:24:09] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Drop transitions removed 2008 transitions
Trivial Post-agglo rules discarded 2008 transitions
Performed 2008 trivial Post agglomeration. Transition count delta: 2008
Iterating post reduction 0 with 2008 rules applied. Total rules applied 2008 place count 4030 transition count 2012
Reduce places removed 4016 places and 0 transitions.
Ensure Unique test removed 1997 transitions
Reduce isomorphic transitions removed 1997 transitions.
Iterating post reduction 1 with 6013 rules applied. Total rules applied 8021 place count 14 transition count 15
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 8022 place count 14 transition count 14
Applied a total of 8022 rules in 124 ms. Remains 14 /4030 variables (removed 4016) and now considering 14/4020 (removed 4006) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 124 ms. Remains : 14/4030 places, 14/4020 transitions.
[2023-03-16 20:24:09] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:24:09] [INFO ] Flatten gal took : 0 ms
[2023-03-16 20:24:09] [INFO ] Input system was already deterministic with 14 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 695 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 698 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:10] [INFO ] Flatten gal took : 311 ms
[2023-03-16 20:24:10] [INFO ] Flatten gal took : 324 ms
[2023-03-16 20:24:11] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 626 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 632 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:12] [INFO ] Flatten gal took : 316 ms
[2023-03-16 20:24:12] [INFO ] Flatten gal took : 309 ms
[2023-03-16 20:24:13] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 644 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 646 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:14] [INFO ] Flatten gal took : 342 ms
[2023-03-16 20:24:14] [INFO ] Flatten gal took : 332 ms
[2023-03-16 20:24:14] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 528 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 529 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:15] [INFO ] Flatten gal took : 308 ms
[2023-03-16 20:24:16] [INFO ] Flatten gal took : 317 ms
[2023-03-16 20:24:16] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 519 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 523 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:17] [INFO ] Flatten gal took : 299 ms
[2023-03-16 20:24:17] [INFO ] Flatten gal took : 316 ms
[2023-03-16 20:24:18] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 513 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 515 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:19] [INFO ] Flatten gal took : 294 ms
[2023-03-16 20:24:19] [INFO ] Flatten gal took : 311 ms
[2023-03-16 20:24:20] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in LTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Applied a total of 0 rules in 533 ms. Remains 4030 /4030 variables (removed 0) and now considering 4020/4020 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 533 ms. Remains : 4030/4030 places, 4020/4020 transitions.
[2023-03-16 20:24:20] [INFO ] Flatten gal took : 297 ms
[2023-03-16 20:24:21] [INFO ] Flatten gal took : 313 ms
[2023-03-16 20:24:21] [INFO ] Input system was already deterministic with 4020 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 4030/4030 places, 4020/4020 transitions.
Drop transitions removed 2007 transitions
Trivial Post-agglo rules discarded 2007 transitions
Performed 2007 trivial Post agglomeration. Transition count delta: 2007
Iterating post reduction 0 with 2007 rules applied. Total rules applied 2007 place count 4030 transition count 2013
Reduce places removed 4014 places and 0 transitions.
Ensure Unique test removed 1996 transitions
Reduce isomorphic transitions removed 1996 transitions.
Iterating post reduction 1 with 6010 rules applied. Total rules applied 8017 place count 16 transition count 17
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 8018 place count 16 transition count 16
Applied a total of 8018 rules in 110 ms. Remains 16 /4030 variables (removed 4014) and now considering 16/4020 (removed 4004) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 110 ms. Remains : 16/4030 places, 16/4020 transitions.
[2023-03-16 20:24:21] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:24:21] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:24:21] [INFO ] Input system was already deterministic with 16 transitions.
[2023-03-16 20:24:22] [INFO ] Flatten gal took : 316 ms
[2023-03-16 20:24:22] [INFO ] Flatten gal took : 320 ms
[2023-03-16 20:24:22] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-16 20:24:22] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 4030 places, 4020 transitions and 48060 arcs took 59 ms.
Total runtime 43783 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RwMutex-PT-r0010w2000
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w2000-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678998293340

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: LAUNCH INITIAL
lola: LAUNCH task # 31 (type CNST) for 30 RwMutex-PT-r0010w2000-CTLCardinality-11
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 31 (type CNST) for RwMutex-PT-r0010w2000-CTLCardinality-11
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0010w2000-CTLCardinality-11: INITIAL false preprocessing

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r0010w2000-CTLCardinality-00: AGAF 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-01: AFAG 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-02: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-05: DISJ 0 0 0 0 2 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-07: DISJ 0 0 0 0 3 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-10: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-12: DISJ 0 0 0 0 2 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-13: CTL 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 41 (type EXCL) for 40 RwMutex-PT-r0010w2000-CTLCardinality-13
lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 41 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-13
lola: result : true
lola: markings : 2011
lola: fired transitions : 2010
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 33 RwMutex-PT-r0010w2000-CTLCardinality-12
lola: time limit : 298 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-12
lola: result : false
lola: markings : 3024
lola: fired transitions : 14240
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 36 (type EXCL) for 33 RwMutex-PT-r0010w2000-CTLCardinality-12
lola: time limit : 325 sec
lola: memory limit: 32 pages
lola: FINISHED task # 36 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-12
lola: result : false
lola: markings : 2011
lola: fired transitions : 4871
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 RwMutex-PT-r0010w2000-CTLCardinality-10
lola: time limit : 357 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-10
lola: result : true
lola: markings : 1324
lola: fired transitions : 13477
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 16 RwMutex-PT-r0010w2000-CTLCardinality-07
lola: time limit : 397 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-07
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 16 RwMutex-PT-r0010w2000-CTLCardinality-07
lola: time limit : 511 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-07
lola: result : true
lola: markings : 1209
lola: fired transitions : 1211
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 14 (type EXCL) for 9 RwMutex-PT-r0010w2000-CTLCardinality-05
lola: time limit : 596 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0010w2000-CTLCardinality-07: DISJ true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-10: CTL true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-11: INITIAL false preprocessing
RwMutex-PT-r0010w2000-CTLCardinality-12: DISJ false DISJ
RwMutex-PT-r0010w2000-CTLCardinality-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r0010w2000-CTLCardinality-00: AGAF 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-01: AFAG 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-05: DISJ 0 0 1 0 2 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 0/596 1/32 RwMutex-PT-r0010w2000-CTLCardinality-05 1 m, 0 m/sec, .

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lola: FINISHED task # 14 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-05
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 RwMutex-PT-r0010w2000-CTLCardinality-02
lola: time limit : 715 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-02
lola: result : true
lola: markings : 3024
lola: fired transitions : 17785
lola: time used : 1.000000
lola: memory pages used : 1
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0010w2000-CTLCardinality-02: CTL true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-07: DISJ true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-10: CTL true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-11: INITIAL false preprocessing
RwMutex-PT-r0010w2000-CTLCardinality-12: DISJ false DISJ
RwMutex-PT-r0010w2000-CTLCardinality-13: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r0010w2000-CTLCardinality-00: AGAF 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-01: AFAG 0 0 0 0 1 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-05: DISJ 0 0 0 0 3 0 0 0
RwMutex-PT-r0010w2000-CTLCardinality-14: CTL 0 0 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 46 (type EXCL) for 9 RwMutex-PT-r0010w2000-CTLCardinality-05
lola: time limit : 892 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-05
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 44 (type EXCL) for 43 RwMutex-PT-r0010w2000-CTLCardinality-14
lola: time limit : 1190 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-14
lola: result : true
lola: markings : 1
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 RwMutex-PT-r0010w2000-CTLCardinality-01
lola: time limit : 1785 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-01
lola: result : false
lola: markings : 2
lola: fired transitions : 8
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 47 (type EXCL) for 0 RwMutex-PT-r0010w2000-CTLCardinality-00
lola: time limit : 3570 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for RwMutex-PT-r0010w2000-CTLCardinality-00
lola: result : false
lola: markings : 2
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0010w2000-CTLCardinality-00: AGAF true state space /EFEG
RwMutex-PT-r0010w2000-CTLCardinality-01: AFAG false CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-02: CTL true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-05: DISJ false DISJ
RwMutex-PT-r0010w2000-CTLCardinality-07: DISJ true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-10: CTL true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-11: INITIAL false preprocessing
RwMutex-PT-r0010w2000-CTLCardinality-12: DISJ false DISJ
RwMutex-PT-r0010w2000-CTLCardinality-13: CTL true CTL model checker
RwMutex-PT-r0010w2000-CTLCardinality-14: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w2000"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RwMutex-PT-r0010w2000, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808500153"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w2000.tgz
mv RwMutex-PT-r0010w2000 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;