About the Execution of LoLa+red for RwMutex-PT-r0010w0100
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
385.424 | 11835.00 | 26025.00 | 554.70 | TTFTFTFTFFTTTTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808500130.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RwMutex-PT-r0010w0100, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808500130
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 604K
-rw-r--r-- 1 mcc users 6.7K Feb 25 22:50 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 25 22:50 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 25 22:48 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 25 22:48 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 25 22:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 106K Feb 25 22:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.9K Feb 25 22:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 25 22:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 183K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0010w0100-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678997649799
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w0100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 20:14:13] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 20:14:13] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 20:14:13] [INFO ] Load time of PNML (sax parser for PT used): 125 ms
[2023-03-16 20:14:13] [INFO ] Transformed 230 places.
[2023-03-16 20:14:13] [INFO ] Transformed 220 transitions.
[2023-03-16 20:14:13] [INFO ] Found NUPN structural information;
[2023-03-16 20:14:13] [INFO ] Parsed PT model containing 230 places and 220 transitions and 2460 arcs in 258 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
Initial state reduction rules removed 1 formulas.
FORMULA RwMutex-PT-r0010w0100-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 113 out of 230 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 230/230 places, 220/220 transitions.
Applied a total of 0 rules in 39 ms. Remains 230 /230 variables (removed 0) and now considering 220/220 (removed 0) transitions.
// Phase 1: matrix 220 rows 230 cols
[2023-03-16 20:14:14] [INFO ] Computed 120 place invariants in 49 ms
[2023-03-16 20:14:14] [INFO ] Implicit Places using invariants in 611 ms returned []
[2023-03-16 20:14:14] [INFO ] Invariant cache hit.
[2023-03-16 20:14:15] [INFO ] Implicit Places using invariants and state equation in 710 ms returned [2, 3, 8, 10, 11, 13, 14, 23, 56, 67, 100, 112, 123, 134, 147, 148, 150, 152, 154, 156, 157, 160, 161, 162, 165, 166, 167, 168, 172, 175, 176, 177, 178, 179, 180, 181, 184, 185, 186, 187, 189, 190, 192, 198, 199, 200, 201, 203, 204, 208, 211, 214, 215, 216, 220, 223, 225, 228, 229]
Discarding 59 places :
Implicit Place search using SMT with State Equation took 1412 ms to find 59 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 171/230 places, 220/220 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 144 transition count 193
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 144 transition count 193
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 0 with 27 rules applied. Total rules applied 81 place count 144 transition count 166
Applied a total of 81 rules in 21 ms. Remains 144 /171 variables (removed 27) and now considering 166/220 (removed 54) transitions.
// Phase 1: matrix 166 rows 144 cols
[2023-03-16 20:14:15] [INFO ] Computed 61 place invariants in 13 ms
[2023-03-16 20:14:15] [INFO ] Implicit Places using invariants in 101 ms returned []
[2023-03-16 20:14:15] [INFO ] Invariant cache hit.
[2023-03-16 20:14:15] [INFO ] Implicit Places using invariants and state equation in 229 ms returned []
Implicit Place search using SMT with State Equation took 335 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 2 : 144/230 places, 166/220 transitions.
Finished structural reductions in LTL mode , in 2 iterations and 1808 ms. Remains : 144/230 places, 166/220 transitions.
Support contains 113 out of 144 places after structural reductions.
[2023-03-16 20:14:16] [INFO ] Flatten gal took : 138 ms
[2023-03-16 20:14:16] [INFO ] Flatten gal took : 74 ms
[2023-03-16 20:14:16] [INFO ] Input system was already deterministic with 166 transitions.
Support contains 112 out of 144 places (down from 113) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1074 ms. (steps per millisecond=9 ) properties (out of 91) seen :72
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 19) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 18) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 18) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 17) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 16) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 15) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 14) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 13) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 13) seen :1
Running SMT prover for 12 properties.
[2023-03-16 20:14:17] [INFO ] Invariant cache hit.
[2023-03-16 20:14:18] [INFO ] [Real]Absence check using 61 positive place invariants in 31 ms returned sat
[2023-03-16 20:14:18] [INFO ] After 196ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :0 real:6
[2023-03-16 20:14:18] [INFO ] [Nat]Absence check using 61 positive place invariants in 25 ms returned sat
[2023-03-16 20:14:18] [INFO ] After 187ms SMT Verify possible using all constraints in natural domain returned unsat :12 sat :0
Fused 12 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 12 atomic propositions for a total of 15 simplifications.
[2023-03-16 20:14:18] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 47 ms
FORMULA RwMutex-PT-r0010w0100-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 44 ms
[2023-03-16 20:14:18] [INFO ] Input system was already deterministic with 166 transitions.
Support contains 62 out of 144 places (down from 85) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 116 transition count 138
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 116 transition count 138
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 84 place count 116 transition count 110
Applied a total of 84 rules in 18 ms. Remains 116 /144 variables (removed 28) and now considering 110/166 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 18 ms. Remains : 116/144 places, 110/166 transitions.
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 19 ms
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 21 ms
[2023-03-16 20:14:18] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 119 transition count 141
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 119 transition count 141
Ensure Unique test removed 25 transitions
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 0 with 25 rules applied. Total rules applied 75 place count 119 transition count 116
Applied a total of 75 rules in 15 ms. Remains 119 /144 variables (removed 25) and now considering 116/166 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 119/144 places, 116/166 transitions.
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 16 ms
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 14 ms
[2023-03-16 20:14:18] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 117 transition count 139
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 117 transition count 139
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 0 with 27 rules applied. Total rules applied 81 place count 117 transition count 112
Applied a total of 81 rules in 6 ms. Remains 117 /144 variables (removed 27) and now considering 112/166 (removed 54) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 117/144 places, 112/166 transitions.
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 13 ms
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 13 ms
[2023-03-16 20:14:18] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 116 transition count 138
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 116 transition count 138
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 84 place count 116 transition count 110
Applied a total of 84 rules in 6 ms. Remains 116 /144 variables (removed 28) and now considering 110/166 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 116/144 places, 110/166 transitions.
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 12 ms
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 13 ms
[2023-03-16 20:14:18] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 117 transition count 139
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 117 transition count 139
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 0 with 27 rules applied. Total rules applied 81 place count 117 transition count 112
Applied a total of 81 rules in 8 ms. Remains 117 /144 variables (removed 27) and now considering 112/166 (removed 54) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 117/144 places, 112/166 transitions.
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 19 ms
[2023-03-16 20:14:18] [INFO ] Flatten gal took : 19 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 119 transition count 141
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 119 transition count 141
Ensure Unique test removed 25 transitions
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 0 with 25 rules applied. Total rules applied 75 place count 119 transition count 116
Applied a total of 75 rules in 8 ms. Remains 119 /144 variables (removed 25) and now considering 116/166 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 119/144 places, 116/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 17 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 18 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 116 transition count 138
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 116 transition count 138
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 84 place count 116 transition count 110
Applied a total of 84 rules in 8 ms. Remains 116 /144 variables (removed 28) and now considering 110/166 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 116/144 places, 110/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 16 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 17 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 116 transition count 138
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 116 transition count 138
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 84 place count 116 transition count 110
Applied a total of 84 rules in 8 ms. Remains 116 /144 variables (removed 28) and now considering 110/166 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 116/144 places, 110/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 14 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 16 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 117 transition count 139
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 117 transition count 139
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 0 with 27 rules applied. Total rules applied 81 place count 117 transition count 112
Applied a total of 81 rules in 8 ms. Remains 117 /144 variables (removed 27) and now considering 112/166 (removed 54) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 117/144 places, 112/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 15 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 16 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 117 transition count 139
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 117 transition count 139
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 0 with 27 rules applied. Total rules applied 81 place count 117 transition count 112
Applied a total of 81 rules in 9 ms. Remains 117 /144 variables (removed 27) and now considering 112/166 (removed 54) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 117/144 places, 112/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 15 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 16 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 25 places :
Symmetric choice reduction at 0 with 25 rule applications. Total rules 25 place count 119 transition count 141
Iterating global reduction 0 with 25 rules applied. Total rules applied 50 place count 119 transition count 141
Ensure Unique test removed 25 transitions
Reduce isomorphic transitions removed 25 transitions.
Iterating post reduction 0 with 25 rules applied. Total rules applied 75 place count 119 transition count 116
Applied a total of 75 rules in 8 ms. Remains 119 /144 variables (removed 25) and now considering 116/166 (removed 50) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 119/144 places, 116/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 13 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 11 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 116 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 27 places :
Symmetric choice reduction at 0 with 27 rule applications. Total rules 27 place count 117 transition count 139
Iterating global reduction 0 with 27 rules applied. Total rules applied 54 place count 117 transition count 139
Ensure Unique test removed 27 transitions
Reduce isomorphic transitions removed 27 transitions.
Iterating post reduction 0 with 27 rules applied. Total rules applied 81 place count 117 transition count 112
Applied a total of 81 rules in 6 ms. Remains 117 /144 variables (removed 27) and now considering 112/166 (removed 54) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 117/144 places, 112/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 9 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 10 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 112 transitions.
Starting structural reductions in LTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Discarding 28 places :
Symmetric choice reduction at 0 with 28 rule applications. Total rules 28 place count 116 transition count 138
Iterating global reduction 0 with 28 rules applied. Total rules applied 56 place count 116 transition count 138
Ensure Unique test removed 28 transitions
Reduce isomorphic transitions removed 28 transitions.
Iterating post reduction 0 with 28 rules applied. Total rules applied 84 place count 116 transition count 110
Applied a total of 84 rules in 7 ms. Remains 116 /144 variables (removed 28) and now considering 110/166 (removed 56) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 116/144 places, 110/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 10 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 10 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 110 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 144/144 places, 166/166 transitions.
Graph (trivial) has 6 edges and 144 vertex of which 6 / 144 are part of one of the 3 SCC in 3 ms
Free SCC test removed 3 places
Ensure Unique test removed 3 transitions
Reduce isomorphic transitions removed 3 transitions.
Drop transitions removed 79 transitions
Trivial Post-agglo rules discarded 79 transitions
Performed 79 trivial Post agglomeration. Transition count delta: 79
Iterating post reduction 0 with 79 rules applied. Total rules applied 80 place count 141 transition count 84
Reduce places removed 130 places and 0 transitions.
Ensure Unique test removed 71 transitions
Reduce isomorphic transitions removed 71 transitions.
Iterating post reduction 1 with 201 rules applied. Total rules applied 281 place count 11 transition count 13
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 282 place count 11 transition count 12
Applied a total of 282 rules in 17 ms. Remains 11 /144 variables (removed 133) and now considering 12/166 (removed 154) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 11/144 places, 12/166 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 0 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 0 ms
[2023-03-16 20:14:19] [INFO ] Input system was already deterministic with 12 transitions.
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 17 ms
[2023-03-16 20:14:19] [INFO ] Flatten gal took : 15 ms
[2023-03-16 20:14:19] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-16 20:14:19] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 144 places, 166 transitions and 1748 arcs took 3 ms.
Total runtime 6129 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RwMutex-PT-r0010w0100
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA RwMutex-PT-r0010w0100-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RwMutex-PT-r0010w0100-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678997661634
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 66 (type SKEL/SRCH) for 13 RwMutex-PT-r0010w0100-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 66 (type SKEL/SRCH) for RwMutex-PT-r0010w0100-CTLFireability-03
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 18 (type EXCL) for 13 RwMutex-PT-r0010w0100-CTLFireability-03
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: FINISHED task # 18 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-03
lola: result : true
lola: markings : 2
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 67 (type SKEL/SRCH) for 57 RwMutex-PT-r0010w0100-CTLFireability-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: FINISHED task # 67 (type SKEL/SRCH) for RwMutex-PT-r0010w0100-CTLFireability-13
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 68 (type SKEL/SRCH) for 36 RwMutex-PT-r0010w0100-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 68 (type SKEL/SRCH) for RwMutex-PT-r0010w0100-CTLFireability-09
lola: result : false
lola: markings : 10
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 3 (type EXCL) for 0 RwMutex-PT-r0010w0100-CTLFireability-00
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 3 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-00
lola: result : true
lola: markings : 1097
lola: fired transitions : 10386
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 58 (type EXCL) for 57 RwMutex-PT-r0010w0100-CTLFireability-13
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-13
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 RwMutex-PT-r0010w0100-CTLFireability-09
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-09
lola: result : false
lola: markings : 43
lola: fired transitions : 85
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 26 RwMutex-PT-r0010w0100-CTLFireability-06
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 31 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-06
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 42 RwMutex-PT-r0010w0100-CTLFireability-12
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-12
lola: result : false
lola: markings : 84
lola: fired transitions : 177
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 20 RwMutex-PT-r0010w0100-CTLFireability-04
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 21 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-04
lola: result : false
lola: markings : 1097
lola: fired transitions : 12581
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 61 (type EXCL) for 60 RwMutex-PT-r0010w0100-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 61 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-14
lola: result : true
lola: markings : 84
lola: fired transitions : 83
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 RwMutex-PT-r0010w0100-CTLFireability-11
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 40 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-11
lola: result : true
lola: markings : 200
lola: fired transitions : 543
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 55 (type EXCL) for 42 RwMutex-PT-r0010w0100-CTLFireability-12
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 55 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-12
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 RwMutex-PT-r0010w0100-CTLFireability-08
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-08
lola: result : false
lola: markings : 2
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 23 RwMutex-PT-r0010w0100-CTLFireability-05
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-05
lola: result : true
lola: markings : 2
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 11 (type EXCL) for 10 RwMutex-PT-r0010w0100-CTLFireability-02
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 11 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-02
lola: result : false
lola: markings : 1095
lola: fired transitions : 8602
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 8 (type EXCL) for 7 RwMutex-PT-r0010w0100-CTLFireability-01
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 8 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-01
lola: result : true
lola: markings : 84
lola: fired transitions : 215
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 69 (type EXCL) for 0 RwMutex-PT-r0010w0100-CTLFireability-00
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 69 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-00
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 63 RwMutex-PT-r0010w0100-CTLFireability-15
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 64 (type EXCL) for RwMutex-PT-r0010w0100-CTLFireability-15
lola: result : true
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0010w0100-CTLFireability-00: CONJ true CONJ
RwMutex-PT-r0010w0100-CTLFireability-01: CTL true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-02: CTL false CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-03: DISJ true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-04: CTL false CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-05: CTL true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-06: CONJ false CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-08: CTL false CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-09: CTL false CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-11: CTL true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-12: DISJ true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-13: CTL true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-14: CTL true CTL model checker
RwMutex-PT-r0010w0100-CTLFireability-15: CTL true CTL model checker
Time elapsed: 1 secs. Pages in use: 1
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0100"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RwMutex-PT-r0010w0100, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808500130"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0100.tgz
mv RwMutex-PT-r0010w0100 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;