Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808400106.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RwMutex-PT-r0010w0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808400106
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 440K
-rw-r--r-- 1 mcc users 4.9K Feb 25 22:40 CTLCardinality.txt
-rw-r--r-- 1 mcc users 45K Feb 25 22:40 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 22:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 55K Feb 25 22:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 22:41 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Feb 25 22:41 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 25 22:40 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 25 22:40 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 27K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0010w0010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678997361637

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0010w0010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 20:09:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 20:09:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 20:09:25] [INFO ] Load time of PNML (sax parser for PT used): 81 ms
[2023-03-16 20:09:25] [INFO ] Transformed 50 places.
[2023-03-16 20:09:25] [INFO ] Transformed 40 transitions.
[2023-03-16 20:09:25] [INFO ] Found NUPN structural information;
[2023-03-16 20:09:25] [INFO ] Parsed PT model containing 50 places and 40 transitions and 300 arcs in 283 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 23 ms.
Initial state reduction rules removed 4 formulas.
FORMULA RwMutex-PT-r0010w0010-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0010-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0010-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RwMutex-PT-r0010w0010-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 46 out of 50 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 50/50 places, 40/40 transitions.
Applied a total of 0 rules in 26 ms. Remains 50 /50 variables (removed 0) and now considering 40/40 (removed 0) transitions.
// Phase 1: matrix 40 rows 50 cols
[2023-03-16 20:09:25] [INFO ] Computed 30 place invariants in 12 ms
[2023-03-16 20:09:25] [INFO ] Implicit Places using invariants in 334 ms returned [1, 7, 47]
Discarding 3 places :
Implicit Place search using SMT only with invariants took 400 ms to find 3 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 47/50 places, 40/40 transitions.
Applied a total of 0 rules in 3 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 429 ms. Remains : 47/50 places, 40/40 transitions.
Support contains 46 out of 47 places after structural reductions.
[2023-03-16 20:09:26] [INFO ] Flatten gal took : 61 ms
[2023-03-16 20:09:26] [INFO ] Flatten gal took : 26 ms
[2023-03-16 20:09:26] [INFO ] Input system was already deterministic with 40 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 824 ms. (steps per millisecond=12 ) properties (out of 45) seen :35
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 51 ms. (steps per millisecond=196 ) properties (out of 10) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 9) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 7) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 42 ms. (steps per millisecond=238 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 123 ms. (steps per millisecond=81 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 43 ms. (steps per millisecond=232 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
// Phase 1: matrix 40 rows 47 cols
[2023-03-16 20:09:27] [INFO ] Computed 27 place invariants in 5 ms
[2023-03-16 20:09:28] [INFO ] [Real]Absence check using 27 positive place invariants in 13 ms returned sat
[2023-03-16 20:09:28] [INFO ] After 145ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0 real:1
[2023-03-16 20:09:28] [INFO ] [Nat]Absence check using 27 positive place invariants in 20 ms returned sat
[2023-03-16 20:09:28] [INFO ] After 89ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 5 atomic propositions for a total of 12 simplifications.
[2023-03-16 20:09:28] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 16 ms
FORMULA RwMutex-PT-r0010w0010-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 14 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 3 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 20 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 10 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 2 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 9 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 10 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 3 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 9 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Graph (trivial) has 4 edges and 47 vertex of which 4 / 47 are part of one of the 2 SCC in 4 ms
Free SCC test removed 2 places
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Drop transitions removed 17 transitions
Trivial Post-agglo rules discarded 17 transitions
Performed 17 trivial Post agglomeration. Transition count delta: 17
Iterating post reduction 0 with 17 rules applied. Total rules applied 18 place count 45 transition count 21
Reduce places removed 42 places and 0 transitions.
Ensure Unique test removed 17 transitions
Reduce isomorphic transitions removed 17 transitions.
Iterating post reduction 1 with 59 rules applied. Total rules applied 77 place count 3 transition count 4
Drop transitions removed 1 transitions
Redundant transition composition rules discarded 1 transitions
Iterating global reduction 2 with 1 rules applied. Total rules applied 78 place count 3 transition count 3
Ensure Unique test removed 1 places
Iterating post reduction 2 with 1 rules applied. Total rules applied 79 place count 2 transition count 3
Applied a total of 79 rules in 14 ms. Remains 2 /47 variables (removed 45) and now considering 3/40 (removed 37) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 2/47 places, 3/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 1 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 2 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 9 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 6 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 7 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 9 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 2 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 7 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 2 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 7 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 6 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 5 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 7 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 7 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
Starting structural reductions in LTL mode, iteration 0 : 47/47 places, 40/40 transitions.
Applied a total of 0 rules in 2 ms. Remains 47 /47 variables (removed 0) and now considering 40/40 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 47/47 places, 40/40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 7 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Input system was already deterministic with 40 transitions.
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 9 ms
[2023-03-16 20:09:28] [INFO ] Flatten gal took : 8 ms
[2023-03-16 20:09:28] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-16 20:09:28] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 47 places, 40 transitions and 294 arcs took 1 ms.
Total runtime 3703 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RwMutex-PT-r0010w0010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA RwMutex-PT-r0010w0010-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0010w0010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678997370309

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 46 (type SKEL/FNDP) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 47 (type SKEL/EQUN) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 48 (type SKEL/SRCH) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 49 (type SKEL/SRCH) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: NOTDEADLOCKFREE
lola: FINISHED task # 49 (type SKEL/SRCH) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 48 (type SKEL/SRCH) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 46 (type FNDP) for RwMutex-PT-r0010w0010-CTLFireability-07 (obsolete)
lola: CANCELED task # 47 (type EQUN) for RwMutex-PT-r0010w0010-CTLFireability-07 (obsolete)
lola: FINISHED task # 46 (type SKEL/FNDP) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
sara: try reading problem file /home/mcc/execution/372/CTLFireability-47.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 11 (type EXCL) for 10 RwMutex-PT-r0010w0010-CTLFireability-03
lola: time limit : 239 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic

lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 11 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-03
lola: result : true
lola: markings : 10
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 6 (type EXCL) for 3 RwMutex-PT-r0010w0010-CTLFireability-02
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: FINISHED task # 47 (type SKEL/EQUN) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 51 (type FNDP) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type EQUN) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 55 (type SRCH) for 23 RwMutex-PT-r0010w0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: FINISHED task # 55 (type SRCH) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type FNDP) for 35 RwMutex-PT-r0010w0010-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 51 (type FNDP) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 52 (type EQUN) for RwMutex-PT-r0010w0010-CTLFireability-07 (obsolete)
lola: LAUNCH task # 57 (type EQUN) for 35 RwMutex-PT-r0010w0010-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 59 (type SRCH) for 35 RwMutex-PT-r0010w0010-CTLFireability-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 6 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-02
lola: result : false
lola: markings : 1034
lola: fired transitions : 12767
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 RwMutex-PT-r0010w0010-CTLFireability-15
lola: time limit : 359 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/372/CTLFireability-52.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 59 (type SRCH) for RwMutex-PT-r0010w0010-CTLFireability-12
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 43 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-15
lola: result : false
lola: markings : 2
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1

lola: LAUNCH task # 30 (type EXCL) for 29 RwMutex-PT-r0010w0010-CTLFireability-09
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 30 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-09
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 27 (type EXCL) for 26 RwMutex-PT-r0010w0010-CTLFireability-08
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 27 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-08
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 16 RwMutex-PT-r0010w0010-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type FNDP) for RwMutex-PT-r0010w0010-CTLFireability-12
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 57 (type EQUN) for RwMutex-PT-r0010w0010-CTLFireability-12 (obsolete)
lola: FINISHED task # 19 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-06
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 52 (type EQUN) for RwMutex-PT-r0010w0010-CTLFireability-07
lola: result : true
lola: LAUNCH task # 1 (type EXCL) for 0 RwMutex-PT-r0010w0010-CTLFireability-01
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-01
lola: result : false
lola: markings : 1034
lola: fired transitions : 12585
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 13 RwMutex-PT-r0010w0010-CTLFireability-05
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-05
lola: result : true
lola: markings : 1
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 33 (type EXCL) for 32 RwMutex-PT-r0010w0010-CTLFireability-11
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 33 (type EXCL) for RwMutex-PT-r0010w0010-CTLFireability-11
lola: result : true
lola: markings : 3
lola: fired transitions : 5
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0010w0010-CTLFireability-01: CTL false CTL model checker
RwMutex-PT-r0010w0010-CTLFireability-02: CONJ false CTL model checker
RwMutex-PT-r0010w0010-CTLFireability-03: CTL true CTL model checker
RwMutex-PT-r0010w0010-CTLFireability-05: F false state space / EG
RwMutex-PT-r0010w0010-CTLFireability-06: DISJ true CTL model checker
RwMutex-PT-r0010w0010-CTLFireability-07: EF true findpath
RwMutex-PT-r0010w0010-CTLFireability-08: EXEG true state space /EXEG
RwMutex-PT-r0010w0010-CTLFireability-09: CTL true CTL model checker
RwMutex-PT-r0010w0010-CTLFireability-11: CTL true CTL model checker
RwMutex-PT-r0010w0010-CTLFireability-12: CONJ false findpath
RwMutex-PT-r0010w0010-CTLFireability-15: CTL false CTL model checker


Time elapsed: 1 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0010w0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RwMutex-PT-r0010w0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808400106"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0010w0010.tgz
mv RwMutex-PT-r0010w0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;