fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r359-smll-167891808400066
Last Updated
May 14, 2023

About the Execution of LoLa+red for RobotManipulation-PT-00500

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2948.331 114898.00 111994.00 790.20 ???FF?T?TFTFTFFF normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808400066.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RobotManipulation-PT-00500, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808400066
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 480K
-rw-r--r-- 1 mcc users 5.5K Feb 26 05:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 26 05:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 05:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 05:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:48 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:48 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:48 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:48 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 05:35 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 141K Feb 26 05:35 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 05:34 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Feb 26 05:34 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:48 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:48 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 6.4K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-00
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-01
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-02
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-03
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-04
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-05
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-06
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-07
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-08
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-09
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-10
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-11
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-12
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-13
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-14
FORMULA_NAME RobotManipulation-PT-00500-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678991421864

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RobotManipulation-PT-00500
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 18:30:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 18:30:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 18:30:25] [INFO ] Load time of PNML (sax parser for PT used): 43 ms
[2023-03-16 18:30:25] [INFO ] Transformed 15 places.
[2023-03-16 18:30:25] [INFO ] Transformed 11 transitions.
[2023-03-16 18:30:25] [INFO ] Parsed PT model containing 15 places and 11 transitions and 34 arcs in 193 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
Support contains 15 out of 15 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 20 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 15 cols
[2023-03-16 18:30:25] [INFO ] Computed 6 place invariants in 6 ms
[2023-03-16 18:30:26] [INFO ] Implicit Places using invariants in 236 ms returned []
[2023-03-16 18:30:26] [INFO ] Invariant cache hit.
[2023-03-16 18:30:26] [INFO ] Implicit Places using invariants and state equation in 68 ms returned []
Implicit Place search using SMT with State Equation took 367 ms to find 0 implicit places.
[2023-03-16 18:30:26] [INFO ] Invariant cache hit.
[2023-03-16 18:30:26] [INFO ] Dead Transitions using invariants and state equation in 66 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 456 ms. Remains : 15/15 places, 11/11 transitions.
Support contains 15 out of 15 places after structural reductions.
[2023-03-16 18:30:26] [INFO ] Flatten gal took : 32 ms
[2023-03-16 18:30:26] [INFO ] Flatten gal took : 11 ms
[2023-03-16 18:30:26] [INFO ] Input system was already deterministic with 11 transitions.
Incomplete random walk after 10015 steps, including 2 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 28) seen :15
Finished Best-First random walk after 302 steps, including 0 resets, run visited all 13 properties in 20 ms. (steps per millisecond=15 )
[2023-03-16 18:30:26] [INFO ] Flatten gal took : 6 ms
[2023-03-16 18:30:26] [INFO ] Flatten gal took : 7 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 4 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 3 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 13 transition count 11
Applied a total of 2 rules in 2 ms. Remains 13 /15 variables (removed 2) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 13/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 4 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 1 place count 14 transition count 10
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 3 place count 13 transition count 10
Applied a total of 3 rules in 13 ms. Remains 13 /15 variables (removed 2) and now considering 10/11 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 13 ms. Remains : 13/15 places, 10/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 18 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 13 transition count 10
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 12 transition count 9
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 11 transition count 9
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 6 place count 11 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 8 place count 10 transition count 8
Applied a total of 8 rules in 5 ms. Remains 10 /15 variables (removed 5) and now considering 8/11 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 10/15 places, 8/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 8 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 1 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 13 transition count 11
Applied a total of 2 rules in 1 ms. Remains 13 /15 variables (removed 2) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 13/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 10 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 4 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 13 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 4 place count 12 transition count 10
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 4 place count 12 transition count 8
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 8 place count 10 transition count 8
Applied a total of 8 rules in 4 ms. Remains 10 /15 variables (removed 5) and now considering 8/11 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 10/15 places, 8/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 5 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 14 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 13 transition count 10
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 12 transition count 9
Applied a total of 5 rules in 4 ms. Remains 12 /15 variables (removed 3) and now considering 9/11 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 12/15 places, 9/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 1 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 17 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 9 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 7 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 13 transition count 11
Applied a total of 2 rules in 0 ms. Remains 13 /15 variables (removed 2) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 13/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 1 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 14 transition count 9
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 12 transition count 9
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 7 place count 11 transition count 8
Applied a total of 7 rules in 4 ms. Remains 11 /15 variables (removed 4) and now considering 8/11 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 4 ms. Remains : 11/15 places, 8/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 1 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 1 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 2 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 13 transition count 11
Applied a total of 2 rules in 1 ms. Remains 13 /15 variables (removed 2) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 13/15 places, 11/11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 1 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 1 ms
[2023-03-16 18:30:27] [INFO ] Input system was already deterministic with 11 transitions.
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 3 ms
[2023-03-16 18:30:27] [INFO ] Flatten gal took : 4 ms
[2023-03-16 18:30:27] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-16 18:30:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 15 places, 11 transitions and 34 arcs took 0 ms.
Total runtime 1926 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RobotManipulation-PT-00500
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA RobotManipulation-PT-00500-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00500-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678991536762

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 10 (type EXCL) for 9 RobotManipulation-PT-00500-CTLFireability-03
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 53 (type FNDP) for 30 RobotManipulation-PT-00500-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 30 RobotManipulation-PT-00500-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SRCH) for 30 RobotManipulation-PT-00500-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SRCH) for RobotManipulation-PT-00500-CTLFireability-10
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: CANCELED task # 53 (type FNDP) for RobotManipulation-PT-00500-CTLFireability-10 (obsolete)
lola: CANCELED task # 54 (type EQUN) for RobotManipulation-PT-00500-CTLFireability-10 (obsolete)
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 53 (type FNDP) for RobotManipulation-PT-00500-CTLFireability-10
lola: result : true
lola: fired transitions : 2
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 10 (type EXCL) for RobotManipulation-PT-00500-CTLFireability-03
lola: result : false
lola: markings : 10998
lola: fired transitions : 23007
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 49 RobotManipulation-PT-00500-CTLFireability-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for RobotManipulation-PT-00500-CTLFireability-15
lola: result : false
lola: markings : 5003
lola: fired transitions : 5004
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 RobotManipulation-PT-00500-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for RobotManipulation-PT-00500-CTLFireability-14
lola: result : false
lola: markings : 2004
lola: fired transitions : 4008
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/373/CTLFireability-54.sara.
lola: LAUNCH task # 44 (type EXCL) for 43 RobotManipulation-PT-00500-CTLFireability-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for RobotManipulation-PT-00500-CTLFireability-13
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 RobotManipulation-PT-00500-CTLFireability-11
lola: time limit : 327 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic

lola: FINISHED task # 54 (type EQUN) for RobotManipulation-PT-00500-CTLFireability-10
lola: result : true
lola: FINISHED task # 38 (type EXCL) for RobotManipulation-PT-00500-CTLFireability-11
lola: result : false
lola: markings : 21016
lola: fired transitions : 49090
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 RobotManipulation-PT-00500-CTLFireability-07
lola: time limit : 360 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00500-CTLFireability-03: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-10: DISJ true search / frozen tokens
RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-13: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-14: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00500-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/360 6/32 RobotManipulation-PT-00500-CTLFireability-07 1442171 m, 288434 m/sec, 5010403 t fired, .

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RobotManipulation-PT-00500-CTLFireability-03: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-10: DISJ true search / frozen tokens
RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-13: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-14: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00500-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 10/360 15/32 RobotManipulation-PT-00500-CTLFireability-07 3582308 m, 428027 m/sec, 9406461 t fired, .

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RobotManipulation-PT-00500-CTLFireability-03: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-10: DISJ true search / frozen tokens
RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-13: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-14: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00500-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 15/360 26/32 RobotManipulation-PT-00500-CTLFireability-07 6186383 m, 520815 m/sec, 13396633 t fired, .

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lola: CANCELED task # 22 (type EXCL) for RobotManipulation-PT-00500-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00500-CTLFireability-03: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-10: DISJ true search / frozen tokens
RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-13: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-14: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00500-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: time limit : 397 sec
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RobotManipulation-PT-00500-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
RobotManipulation-PT-00500-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/505 30/32 RobotManipulation-PT-00500-CTLFireability-01 7194229 m, 230834 m/sec, 28155751 t fired, .

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RobotManipulation-PT-00500-CTLFireability-03: CTL false CTL model checker
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RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
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RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

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RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-13: CTL false CTL model checker
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RobotManipulation-PT-00500-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00500-CTLFireability-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/584 21/32 RobotManipulation-PT-00500-CTLFireability-00 4868230 m, 973646 m/sec, 5362538 t fired, .

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RobotManipulation-PT-00500-CTLFireability-08: SP ACTL 0 1 0 0 1 0 0 0
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lola: result : false
lola: markings : 508500
lola: fired transitions : 515517
lola: time used : 0.000000
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lola: result : false
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00500-CTLFireability-00: CTL unknown AGGR
RobotManipulation-PT-00500-CTLFireability-01: CTL unknown AGGR
RobotManipulation-PT-00500-CTLFireability-02: CTL unknown AGGR
RobotManipulation-PT-00500-CTLFireability-03: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-04: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-05: CTL unknown AGGR
RobotManipulation-PT-00500-CTLFireability-06: CTL true CTL model checker
RobotManipulation-PT-00500-CTLFireability-07: CTL unknown AGGR
RobotManipulation-PT-00500-CTLFireability-08: SP ACTL true LTL model checker
RobotManipulation-PT-00500-CTLFireability-09: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-10: DISJ true search / frozen tokens
RobotManipulation-PT-00500-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-12: CTL true CTL model checker
RobotManipulation-PT-00500-CTLFireability-13: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-14: CTL false CTL model checker
RobotManipulation-PT-00500-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RobotManipulation-PT-00500"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RobotManipulation-PT-00500, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808400066"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RobotManipulation-PT-00500.tgz
mv RobotManipulation-PT-00500 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;