Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r359-smll-167891808300026.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RobotManipulation-PT-00010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r359-smll-167891808300026
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 7.9K Feb 26 05:29 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 26 05:29 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 26 05:27 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 26 05:27 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:47 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:47 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:47 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:47 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 05:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 173K Feb 26 05:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 16K Feb 26 05:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 139K Feb 26 05:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:47 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:47 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 6.4K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-00
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-01
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-02
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-03
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-04
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-05
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-06
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-07
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-08
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-09
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-10
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-11
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-12
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-13
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-14
FORMULA_NAME RobotManipulation-PT-00010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678986091394

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RobotManipulation-PT-00010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 17:01:34] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 17:01:34] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 17:01:35] [INFO ] Load time of PNML (sax parser for PT used): 149 ms
[2023-03-16 17:01:35] [INFO ] Transformed 15 places.
[2023-03-16 17:01:35] [INFO ] Transformed 11 transitions.
[2023-03-16 17:01:35] [INFO ] Parsed PT model containing 15 places and 11 transitions and 34 arcs in 278 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
Initial state reduction rules removed 1 formulas.
FORMULA RobotManipulation-PT-00010-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 15 out of 15 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 20 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 15 cols
[2023-03-16 17:01:35] [INFO ] Computed 6 place invariants in 7 ms
[2023-03-16 17:01:35] [INFO ] Implicit Places using invariants in 228 ms returned []
[2023-03-16 17:01:35] [INFO ] Invariant cache hit.
[2023-03-16 17:01:35] [INFO ] Implicit Places using invariants and state equation in 75 ms returned []
Implicit Place search using SMT with State Equation took 370 ms to find 0 implicit places.
[2023-03-16 17:01:35] [INFO ] Invariant cache hit.
[2023-03-16 17:01:35] [INFO ] Dead Transitions using invariants and state equation in 52 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 451 ms. Remains : 15/15 places, 11/11 transitions.
Support contains 15 out of 15 places after structural reductions.
[2023-03-16 17:01:35] [INFO ] Flatten gal took : 30 ms
[2023-03-16 17:01:35] [INFO ] Flatten gal took : 11 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Incomplete random walk after 10017 steps, including 2 resets, run finished after 157 ms. (steps per millisecond=63 ) properties (out of 40) seen :38
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 2) seen :1
Running SMT prover for 1 properties.
[2023-03-16 17:01:36] [INFO ] Invariant cache hit.
[2023-03-16 17:01:36] [INFO ] [Real]Absence check using 3 positive place invariants in 13 ms returned sat
[2023-03-16 17:01:36] [INFO ] [Real]Absence check using 3 positive and 3 generalized place invariants in 2 ms returned sat
[2023-03-16 17:01:36] [INFO ] After 65ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 15 simplifications.
FORMULA RobotManipulation-PT-00010-CTLFireability-09 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 6 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 6 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 14 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 3 place count 13 transition count 10
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 5 place count 12 transition count 9
Applied a total of 5 rules in 16 ms. Remains 12 /15 variables (removed 3) and now considering 9/11 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 12/15 places, 9/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 13 transition count 11
Applied a total of 2 rules in 2 ms. Remains 13 /15 variables (removed 2) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 13/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 7 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 10 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 1 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 3 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 9 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 13 transition count 10
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 12 transition count 9
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 11 transition count 9
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 6 place count 11 transition count 7
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 10 place count 9 transition count 7
Applied a total of 10 rules in 7 ms. Remains 9 /15 variables (removed 6) and now considering 7/11 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 9/15 places, 7/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 1 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 6 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 2 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 3 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 4 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 1 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 3 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 13 transition count 10
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 2 rules applied. Total rules applied 5 place count 12 transition count 9
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 6 place count 11 transition count 9
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 6 place count 11 transition count 7
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 10 place count 9 transition count 7
Applied a total of 10 rules in 6 ms. Remains 9 /15 variables (removed 6) and now considering 7/11 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 9/15 places, 7/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 2 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 15 transition count 10
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 14 transition count 10
Applied a total of 2 rules in 3 ms. Remains 14 /15 variables (removed 1) and now considering 10/11 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 14/15 places, 10/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 2 places :
Implicit places reduction removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 13 transition count 11
Applied a total of 2 rules in 1 ms. Remains 13 /15 variables (removed 2) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 13/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 1 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Discarding 1 places :
Implicit places reduction removed 1 places
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 14 transition count 11
Applied a total of 1 rules in 3 ms. Remains 14 /15 variables (removed 1) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 14/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 15/15 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 15 /15 variables (removed 0) and now considering 11/11 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 15/15 places, 11/11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 2 ms
[2023-03-16 17:01:36] [INFO ] Input system was already deterministic with 11 transitions.
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 5 ms
[2023-03-16 17:01:36] [INFO ] Flatten gal took : 5 ms
[2023-03-16 17:01:36] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-16 17:01:36] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 15 places, 11 transitions and 34 arcs took 1 ms.
Total runtime 2175 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RobotManipulation-PT-00010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/369
CTLFireability

FORMULA RobotManipulation-PT-00010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RobotManipulation-PT-00010-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678986247604

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/369/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/369/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/369/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 16 (type EXCL) for 15 RobotManipulation-PT-00010-CTLFireability-05
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 16 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-05
lola: result : true
lola: markings : 43
lola: fired transitions : 154
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 RobotManipulation-PT-00010-CTLFireability-06
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00010-CTLFireability-05: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00010-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-03: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-07: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/276 6/32 RobotManipulation-PT-00010-CTLFireability-06 1383393 m, 276678 m/sec, 5096223 t fired, .

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lola: FINISHED task # 19 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-06
lola: result : true
lola: markings : 1523060
lola: fired transitions : 5906978
lola: time used : 5.000000
lola: memory pages used : 7
lola: LAUNCH task # 40 (type EXCL) for 39 RobotManipulation-PT-00010-CTLFireability-15
lola: time limit : 299 sec
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lola: FINISHED task # 40 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-15
lola: result : false
lola: markings : 1
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 RobotManipulation-PT-00010-CTLFireability-14
lola: time limit : 326 sec
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lola: FINISHED task # 37 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-14
lola: result : true
lola: markings : 1
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lola: time limit : 359 sec
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lola: FINISHED task # 31 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-11
lola: result : false
lola: markings : 750
lola: fired transitions : 938
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 RobotManipulation-PT-00010-CTLFireability-04
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-04
lola: result : true
lola: markings : 9402
lola: fired transitions : 21220
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 RobotManipulation-PT-00010-CTLFireability-02
lola: time limit : 449 sec
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lola: FINISHED task # 7 (type EXCL) for RobotManipulation-PT-00010-CTLFireability-02
lola: result : true
lola: markings : 3442
lola: fired transitions : 4965
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 RobotManipulation-PT-00010-CTLFireability-01
lola: time limit : 513 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00010-CTLFireability-02: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-04: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-05: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-06: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00010-CTLFireability-14: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00010-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-03: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-07: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 4/513 4/32 RobotManipulation-PT-00010-CTLFireability-01 906902 m, 181380 m/sec, 4918941 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00010-CTLFireability-02: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-04: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-05: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-06: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00010-CTLFireability-14: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00010-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
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RobotManipulation-PT-00010-CTLFireability-03: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-07: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 9/513 8/32 RobotManipulation-PT-00010-CTLFireability-01 1816581 m, 181935 m/sec, 10338965 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00010-CTLFireability-02: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-04: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-05: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-06: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00010-CTLFireability-14: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RobotManipulation-PT-00010-CTLFireability-00: AGEF 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-03: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-07: EG 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RobotManipulation-PT-00010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 14/513 12/32 RobotManipulation-PT-00010-CTLFireability-01 2713053 m, 179294 m/sec, 15839552 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RobotManipulation-PT-00010-CTLFireability-02: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-04: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-05: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-06: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00010-CTLFireability-14: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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FINAL RESULTS
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RobotManipulation-PT-00010-CTLFireability-00: AGEF true tscc_search
RobotManipulation-PT-00010-CTLFireability-01: CTL unknown AGGR
RobotManipulation-PT-00010-CTLFireability-02: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-03: EG false state space / EG
RobotManipulation-PT-00010-CTLFireability-04: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-05: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-06: CTL true CTL model checker
RobotManipulation-PT-00010-CTLFireability-07: EG false state space / EG
RobotManipulation-PT-00010-CTLFireability-08: CTL false CTL model checker
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RobotManipulation-PT-00010-CTLFireability-11: CTL false CTL model checker
RobotManipulation-PT-00010-CTLFireability-13: CTL true CTL model checker
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RobotManipulation-PT-00010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RobotManipulation-PT-00010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r359-smll-167891808300026"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RobotManipulation-PT-00010.tgz
mv RobotManipulation-PT-00010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;