fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r358-smll-167891807300178
Last Updated
May 14, 2023

About the Execution of LoLA for RwMutex-PT-r0500w0010

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16218.636 341132.00 297832.00 33127.40 ?FF??????T?????F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r358-smll-167891807300178.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is RwMutex-PT-r0500w0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r358-smll-167891807300178
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.6M
-rw-r--r-- 1 mcc users 8.1K Feb 25 22:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 93K Feb 25 22:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 25 22:40 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 25 22:40 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.2K Feb 25 16:49 LTLCardinality.txt
-rw-r--r-- 1 mcc users 21K Feb 25 16:49 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:49 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:49 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 22:47 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 118K Feb 25 22:47 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 22:45 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 124K Feb 25 22:45 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:49 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:49 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 11 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 1.1M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-00
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-01
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-02
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-03
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-04
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-05
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-06
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-07
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-08
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-09
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-10
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-11
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-12
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-13
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-14
FORMULA_NAME RwMutex-PT-r0500w0010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678973794961

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RwMutex-PT-r0500w0010
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT RwMutex-PT-r0500w0010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability

FORMULA RwMutex-PT-r0500w0010-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0500w0010-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0500w0010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RwMutex-PT-r0500w0010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678974136093

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: ASSUMEDDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 57 (type SKEL/SRCH) for 3 RwMutex-PT-r0500w0010-CTLFireability-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 57 (type SKEL/SRCH) for RwMutex-PT-r0500w0010-CTLFireability-01
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: ASSUMEDDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 59 (type SKEL/SRCH) for 10 RwMutex-PT-r0500w0010-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 59 (type SKEL/SRCH) for RwMutex-PT-r0500w0010-CTLFireability-02
lola: result : true
lola: markings : 3
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
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lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: RELEASE
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: LAUNCH task # 60 (type EXCL) for 10 RwMutex-PT-r0500w0010-CTLFireability-02
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for RwMutex-PT-r0500w0010-CTLFireability-02
lola: result : true
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: LAUNCH task # 32 (type EXCL) for 31 RwMutex-PT-r0500w0010-CTLFireability-09
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for RwMutex-PT-r0500w0010-CTLFireability-09
lola: result : true
lola: markings : 2
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: LAUNCH task # 14 (type EXCL) for 13 RwMutex-PT-r0500w0010-CTLFireability-03
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:788
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RwMutex-PT-r0500w0010-CTLFireability-02: AGAF false state space /EFEG
RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r0500w0010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 3/224 1/32 RwMutex-PT-r0500w0010-CTLFireability-03 101830 m, 20366 m/sec, 369622 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r0500w0010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 8/224 3/32 RwMutex-PT-r0500w0010-CTLFireability-03 402555 m, 60145 m/sec, 1643703 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RwMutex-PT-r0500w0010-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 13/224 8/32 RwMutex-PT-r0500w0010-CTLFireability-03 1282497 m, 175988 m/sec, 2578217 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 18/224 13/32 RwMutex-PT-r0500w0010-CTLFireability-03 2104791 m, 164458 m/sec, 3455677 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 23/224 18/32 RwMutex-PT-r0500w0010-CTLFireability-03 2924528 m, 163947 m/sec, 4334635 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 28/224 24/32 RwMutex-PT-r0500w0010-CTLFireability-03 3799129 m, 174920 m/sec, 5268923 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
14 CTL EXCL 33/224 29/32 RwMutex-PT-r0500w0010-CTLFireability-03 4675891 m, 175352 m/sec, 6209188 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-02: AGAF false state space /EFEG
RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search

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RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ false state space /EXEG
RwMutex-PT-r0500w0010-CTLFireability-02: AGAF false state space /EFEG
RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 5/296 1/32 RwMutex-PT-r0500w0010-CTLFireability-13 165636 m, 33127 m/sec, 766339 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 10/296 3/32 RwMutex-PT-r0500w0010-CTLFireability-13 360341 m, 38941 m/sec, 1839798 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 15/296 4/32 RwMutex-PT-r0500w0010-CTLFireability-13 524001 m, 32732 m/sec, 3177996 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 20/296 4/32 RwMutex-PT-r0500w0010-CTLFireability-13 677777 m, 30755 m/sec, 4556501 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 25/296 5/32 RwMutex-PT-r0500w0010-CTLFireability-13 836654 m, 31775 m/sec, 5909238 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 30/296 6/32 RwMutex-PT-r0500w0010-CTLFireability-13 988947 m, 30458 m/sec, 7283658 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 35/296 7/32 RwMutex-PT-r0500w0010-CTLFireability-13 1133534 m, 28917 m/sec, 8692963 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
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48 CTL EXCL 40/296 8/32 RwMutex-PT-r0500w0010-CTLFireability-13 1273304 m, 27954 m/sec, 10113336 t fired, .

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48 CTL EXCL 45/296 9/32 RwMutex-PT-r0500w0010-CTLFireability-13 1420836 m, 29506 m/sec, 11501690 t fired, .

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48 CTL EXCL 50/296 10/32 RwMutex-PT-r0500w0010-CTLFireability-13 1561329 m, 28098 m/sec, 12922327 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 55/296 11/32 RwMutex-PT-r0500w0010-CTLFireability-13 1711219 m, 29978 m/sec, 14293921 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ false state space /EXEG
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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 60/296 12/32 RwMutex-PT-r0500w0010-CTLFireability-13 1855990 m, 28954 m/sec, 15695621 t fired, .

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48 CTL EXCL 65/296 13/32 RwMutex-PT-r0500w0010-CTLFireability-13 2000864 m, 28974 m/sec, 17094487 t fired, .

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48 CTL EXCL 70/296 13/32 RwMutex-PT-r0500w0010-CTLFireability-13 2139998 m, 27826 m/sec, 18516542 t fired, .

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48 CTL EXCL 75/296 14/32 RwMutex-PT-r0500w0010-CTLFireability-13 2279527 m, 27905 m/sec, 19936169 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 80/296 15/32 RwMutex-PT-r0500w0010-CTLFireability-13 2416064 m, 27307 m/sec, 21368791 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 85/296 16/32 RwMutex-PT-r0500w0010-CTLFireability-13 2555938 m, 27974 m/sec, 22781369 t fired, .

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48 CTL EXCL 90/296 17/32 RwMutex-PT-r0500w0010-CTLFireability-13 2698812 m, 28574 m/sec, 24179387 t fired, .

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48 CTL EXCL 95/296 18/32 RwMutex-PT-r0500w0010-CTLFireability-13 2836305 m, 27498 m/sec, 25592924 t fired, .

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48 CTL EXCL 100/296 19/32 RwMutex-PT-r0500w0010-CTLFireability-13 2986172 m, 29973 m/sec, 26961300 t fired, .

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48 CTL EXCL 105/296 20/32 RwMutex-PT-r0500w0010-CTLFireability-13 3135093 m, 29784 m/sec, 28340132 t fired, .

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48 CTL EXCL 110/296 20/32 RwMutex-PT-r0500w0010-CTLFireability-13 3280271 m, 29035 m/sec, 29728915 t fired, .

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48 CTL EXCL 115/296 21/32 RwMutex-PT-r0500w0010-CTLFireability-13 3419628 m, 27871 m/sec, 31132149 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 120/296 22/32 RwMutex-PT-r0500w0010-CTLFireability-13 3509056 m, 17885 m/sec, 32134007 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ false state space /EXEG
RwMutex-PT-r0500w0010-CTLFireability-02: AGAF false state space /EFEG
RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 125/296 22/32 RwMutex-PT-r0500w0010-CTLFireability-13 3563100 m, 10808 m/sec, 32729794 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ false state space /EXEG
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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 130/296 23/32 RwMutex-PT-r0500w0010-CTLFireability-13 3643935 m, 16167 m/sec, 33409385 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 135/296 23/32 RwMutex-PT-r0500w0010-CTLFireability-13 3706823 m, 12577 m/sec, 33997174 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-01: CONJ false state space /EXEG
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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
RwMutex-PT-r0500w0010-CTLFireability-15: CTL false CTL model checker

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RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 141/296 24/32 RwMutex-PT-r0500w0010-CTLFireability-13 3784063 m, 15448 m/sec, 34706255 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 146/296 24/32 RwMutex-PT-r0500w0010-CTLFireability-13 3856095 m, 14406 m/sec, 35386593 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
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RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 151/296 24/32 RwMutex-PT-r0500w0010-CTLFireability-13 3946458 m, 18072 m/sec, 36329834 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 156/296 25/32 RwMutex-PT-r0500w0010-CTLFireability-13 4023613 m, 15431 m/sec, 37035524 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 161/296 25/32 RwMutex-PT-r0500w0010-CTLFireability-13 4091923 m, 13662 m/sec, 37732469 t fired, .

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48 CTL EXCL 166/296 25/32 RwMutex-PT-r0500w0010-CTLFireability-13 4108623 m, 3340 m/sec, 37903317 t fired, .

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48 CTL EXCL 171/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4123054 m, 2886 m/sec, 38056327 t fired, .

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48 CTL EXCL 176/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4139767 m, 3342 m/sec, 38236349 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 181/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4160085 m, 4063 m/sec, 38451295 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
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48 CTL EXCL 186/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4177267 m, 3436 m/sec, 38635097 t fired, .

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48 CTL EXCL 191/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4195942 m, 3735 m/sec, 38842287 t fired, .

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48 CTL EXCL 196/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4212862 m, 3384 m/sec, 39040081 t fired, .

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48 CTL EXCL 201/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4231791 m, 3785 m/sec, 39235239 t fired, .

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48 CTL EXCL 206/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4245392 m, 2720 m/sec, 39386561 t fired, .

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48 CTL EXCL 211/296 26/32 RwMutex-PT-r0500w0010-CTLFireability-13 4261248 m, 3171 m/sec, 39566904 t fired, .

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48 CTL EXCL 231/296 27/32 RwMutex-PT-r0500w0010-CTLFireability-13 4329502 m, 2219 m/sec, 40243229 t fired, .

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48 CTL EXCL 236/296 27/32 RwMutex-PT-r0500w0010-CTLFireability-13 4344191 m, 2937 m/sec, 40398930 t fired, .

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48 CTL EXCL 241/296 27/32 RwMutex-PT-r0500w0010-CTLFireability-13 4357183 m, 2598 m/sec, 40530253 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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48 CTL EXCL 246/296 27/32 RwMutex-PT-r0500w0010-CTLFireability-13 4379293 m, 4422 m/sec, 40767869 t fired, .

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RwMutex-PT-r0500w0010-CTLFireability-09: AGEF true tscc_search
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RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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RwMutex-PT-r0500w0010-CTLFireability-10: DISJ 0 2 0 0 2 0 0 0
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RwMutex-PT-r0500w0010-CTLFireability-14: SP ACTL 0 1 0 0 1 0 0 0

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/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 376 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RwMutex-PT-r0500w0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is RwMutex-PT-r0500w0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r358-smll-167891807300178"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RwMutex-PT-r0500w0010.tgz
mv RwMutex-PT-r0500w0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;