Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r353-smll-167891801300586.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is SharedMemory-COL-000200, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r353-smll-167891801300586
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 7.6K Feb 26 21:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 21:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 07:05 CTLFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 07:05 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:53 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:53 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:53 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:53 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 27 17:36 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 108K Feb 27 17:36 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.9K Feb 27 12:29 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 27 12:29 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:53 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:53 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 20K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-00
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-01
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-02
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-03
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-04
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-05
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-06
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-07
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-08
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-09
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-10
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-11
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-12
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-13
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-14
FORMULA_NAME SharedMemory-COL-000200-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1680032172195

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=SharedMemory-COL-000200
Not applying reductions.
Model is COL
CTLFireability COL
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=CTLFireability.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Unfolding complete |P|=40801|T|=80400|A|=320800
Time for unfolding: 0m 3.366sec

Net: SharedMemory_COL_000200
(NrP: 40801 NrTr: 80400 NrArc: 320800)

parse formulas
formulas created successfully
place and transition orderings generation:23m 1.399sec

net check time: 0m 0.058sec

init dd package: 0m 3.537sec


before gc: list nodes free: 1992685

after gc: idd nodes used:11314, unused:63988686; list nodes free:258395646

before gc: list nodes free: 1953067

after gc: idd nodes used:15999, unused:63984001; list nodes free:258362769

before gc: list nodes free: 1820846

after gc: idd nodes used:19594, unused:63980406; list nodes free:258337386

before gc: list nodes free: 1571736

after gc: idd nodes used:22624, unused:63977376; list nodes free:258316040

before gc: list nodes free: 1580702

after gc: idd nodes used:25294, unused:63974706; list nodes free:258297316

before gc: list nodes free: 1613239

after gc: idd nodes used:27708, unused:63972292; list nodes free:258280388

before gc: list nodes free: 1638061

after gc: idd nodes used:29927, unused:63970073; list nodes free:258264829

before gc: list nodes free: 1657913

after gc: idd nodes used:31993, unused:63968007; list nodes free:258250343

before gc: list nodes free: 1673994

after gc: idd nodes used:33933, unused:63966067; list nodes free:258236743

before gc: list nodes free: 1687118

after gc: idd nodes used:35768, unused:63964232; list nodes free:258223876

before gc: list nodes free: 1698119

after gc: idd nodes used:37513, unused:63962487; list nodes free:258211641

before gc: list nodes free: 1706558

after gc: idd nodes used:39181, unused:63960819; list nodes free:258199949

before gc: list nodes free: 1715442

after gc: idd nodes used:40780, unused:63959220; list nodes free:258188742

BK_STOP 1680034080976

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
Ext_Mem_Acc_pId1_pId1
Ext_Mem_Acc_pId2_pId2
Ext_Mem_Acc_pId3_pId3
Ext_Mem_Acc_pId4_pId4
Ext_Mem_Acc_pId5_pId5
Ext_Mem_Acc_pId11_pId11
Ext_Mem_Acc_pId6_pId6
Ext_Mem_Acc_pId7_pId7
Ext_Mem_Acc_pId8_pId8
Ext_Mem_Acc_pId9_pId9
Ext_Mem_Acc_pId10_pId10
Ext_Mem_Acc_pId41_pId41
Ext_Mem_Acc_pId21_pId21
Ext_Mem_Acc_pId22_pId22
Ext_Mem_Acc_pId23_pId23
Ext_Mem_Acc_pId12_pId12
Ext_Mem_Acc_pId13_pId13
Ext_Mem_Acc_pId14_pId14
Ext_Mem_Acc_pId15_pId15
Ext_Mem_Acc_pId16_pId16
Ext_Mem_Acc_pId17_pId17
Ext_Mem_Acc_pId18_pId18
Ext_Mem_Acc_pId19_pId19
Ext_Mem_Acc_pId20_pId20
Ext_Mem_Acc_pId82_pId82
Ext_Mem_Acc_pId42_pId42
Ext_Mem_Acc_pId43_pId43
Ext_Mem_Acc_pId44_pId44
Ext_Mem_Acc_pId45_pId45
Ext_Mem_Acc_pId46_pId46
Ext_Mem_Acc_pId24_pId24
Ext_Mem_Acc_pId25_pId25
Ext_Mem_Acc_pId26_pId26
Ext_Mem_Acc_pId27_pId27
Ext_Mem_Acc_pId28_pId28
Ext_Mem_Acc_pId29_pId29
Ext_Mem_Acc_pId30_pId30
Ext_Mem_Acc_pId31_pId31
Ext_Mem_Acc_pId32_pId32
Ext_Mem_Acc_pId33_pId33
Ext_Mem_Acc_pId34_pId34
Ext_Mem_Acc_pId35_pId35
Ext_Mem_Acc_pId36_pId36
Ext_Mem_Acc_pId37_pId37
Ext_Mem_Acc_pId38_pId38
Ext_Mem_Acc_pId39_pId39
Ext_Mem_Acc_pId40_pId40
Ext_Mem_Acc_pId164_pId164
Ext_Mem_Acc_pId83_pId83
Ext_Mem_Acc_pId84_pId84
Ext_Mem_Acc_pId85_pId85
Ext_Mem_Acc_pId86_pId86
Ext_Mem_Acc_pId87_pId87
Ext_Mem_Acc_pId88_pId88
Ext_Mem_Acc_pId89_pId89
Ext_Mem_Acc_pId90_pId90
Ext_Mem_Acc_pId91_pId91
Ext_Mem_Acc_pId92_pId92
Ext_Mem_Acc_pId47_pId47
Ext_Mem_Acc_pId48_pId48
Ext_Mem_Acc_pId49_pId49
Ext_Mem_Acc_pId50_pId50
Ext_Mem_Acc_pId51_pId51
Ext_Mem_Acc_pId52_pId52
Ext_Mem_Acc_pId53_pId53
Ext_Mem_Acc_pId54_pId54
Ext_Mem_Acc_pId55_pId55
Ext_Mem_Acc_pId56_pId56
Ext_Mem_Acc_pId57_pId57
Ext_Mem_Acc_pId58_pId58
Ext_Mem_Acc_pId59_pId59
Ext_Mem_Acc_pId60_pId60
Ext_Mem_Acc_pId61_pId61
Ext_Mem_Acc_pId62_pId62
Ext_Mem_Acc_pId63_pId63
Ext_Mem_Acc_pId64_pId64
Ext_Mem_Acc_pId65_pId65
Ext_Mem_Acc_pId66_pId66
Ext_Mem_Acc_pId67_pId67
Ext_Mem_Acc_pId68_pId68
Ext_Mem_Acc_pId69_pId69
Ext_Mem_Acc_pId70_pId70
Ext_Mem_Acc_pId71_pId71
Ext_Mem_Acc_pId72_pId72
Ext_Mem_Acc_pId73_pId73
Ext_Mem_Acc_pId74_pId74
Ext_Mem_Acc_pId75_pId75
Ext_Mem_Acc_pId76_pId76
Ext_Mem_Acc_pId77_pId77
Ext_Mem_Acc_pId78_pId78
Ext_Mem_Acc_pId79_pId79
Ext_Mem_Acc_pId80_pId80
Ext_Mem_Acc_pId81_pId81
Ext_Mem_Acc_pId165_pId165
Ext_Mem_Acc_pId166_pId166
Ext_Mem_Acc_pId167_pId167
Ext_Mem_Acc_pId168_pId168
Ext_Mem_Acc_pId169_pId169
Ext_Mem_Acc_pId170_pId170
Ext_Mem_Acc_pId171_pId171
Ext_Mem_Acc_pId172_pId172
Ext_Mem_Acc_pId173_pId173
Ext_Mem_Acc_pId174_pId174
Ext_Mem_Acc_pId175_pId175
Ext_Mem_Acc_pId176_pId176
Ext_Mem_Acc_pId177_pId177
Ext_Mem_Acc_pId178_pId178
Ext_Mem_Acc_pId179_pId179
Ext_Mem_Acc_pId180_pId180
Ext_Mem_Acc_pId181_pId181
Ext_Mem_Acc_pId182_pId182
Ext_Mem_Acc_pId183_pId183
Ext_Mem_Acc_pId93_pId93
Ext_Mem_Acc_pId94_pId94
Ext_Mem_Acc_pId95_pId95
Ext_Mem_Acc_pId96_pId96
Ext_Mem_Acc_pId97_pId97
Ext_Mem_Acc_pId98_pId98
Ext_Mem_Acc_pId99_pId99
Ext_Mem_Acc_pId100_pId100
Ext_Mem_Acc_pId101_pId101
Ext_Mem_Acc_pId102_pId102
Ext_Mem_Acc_pId103_pId103
Ext_Mem_Acc_pId104_pId104
Ext_Mem_Acc_pId105_pId105
Ext_Mem_Acc_pId106_pId106
Ext_Mem_Acc_pId107_pId107
Ext_Mem_Acc_pId108_pId108
Ext_Mem_Acc_pId109_pId109
Ext_Mem_Acc_pId110_pId110
Ext_Mem_Acc_pId111_pId111
Ext_Mem_Acc_pId112_pId112
Ext_Mem_Acc_pId113_pId113
Ext_Mem_Acc_pId114_pId114
Ext_Mem_Acc_pId115_pId115
Ext_Mem_Acc_pId116_pId116
Ext_Mem_Acc_pId117_pId117
Ext_Mem_Acc_pId118_pId118
Ext_Mem_Acc_pId119_pId119
Ext_Mem_Acc_pId120_pId120
Ext_Mem_Acc_pId121_pId121
Ext_Mem_Acc_pId122_pId122
Ext_Mem_Acc_pId123_pId123
Ext_Mem_Acc_pId124_pId124
Ext_Mem_Acc_pId125_pId125
Ext_Mem_Acc_pId126_pId126
Ext_Mem_Acc_pId127_pId127
Ext_Mem_Acc_pId128_pId128
Ext_Mem_Acc_pId129_pId129
Ext_Mem_Acc_pId130_pId130
Ext_Mem_Acc_pId131_pId131
Ext_Mem_Acc_pId132_pId132
Ext_Mem_Acc_pId133_pId133
Ext_Mem_Acc_pId134_pId134
Ext_Mem_Acc_pId135_pId135
Ext_Mem_Acc_pId136_pId136
Ext_Mem_Acc_pId137_pId137
Ext_Mem_Acc_pId138_pId138
Ext_Mem_Acc_pId139_pId139
Ext_Mem_Acc_pId140_pId140
Ext_Mem_Acc_pId141_pId141
Ext_Mem_Acc_pId142_pId142
Ext_Mem_Acc_pId143_pId143
Ext_Mem_Acc_pId144_pId144
Ext_Mem_Acc_pId145_pId145
Ext_Mem_Acc_pId146_pId146
Ext_Mem_Acc_pId147_pId147
Ext_Mem_Acc_pId148_pId148
Ext_Mem_Acc_pId149_pId149
Ext_Mem_Acc_pId150_pId150
Ext_Mem_Acc_pId151_pId151
Ext_Mem_Acc_pId152_pId152
Ext_Mem_Acc_pId153_pId153
Ext_Mem_Acc_pId154_pId154
Ext_Mem_Acc_pId155_pId155
Ext_Mem_Acc_pId156_pId156
Ext_Mem_Acc_pId157_pId157
Ext_Mem_Acc_pId158_pId158
Ext_Mem_Acc_pId159_pId159
Ext_Mem_Acc_pId160_pId160
Ext_Mem_Acc_pId161_pId161
Ext_Mem_Acc_pId162_pId162
Ext_Mem_Acc_pId163_pId163
Ext_Mem_Acc_pId184_pId184
Ext_Mem_Acc_pId185_pId185
Ext_Mem_Acc_pId186_pId186
Ext_Mem_Acc_pId187_pId187
Ext_Mem_Acc_pId188_pId188
Ext_Mem_Acc_pId189_pId189
Ext_Mem_Acc_pId190_pId190
Ext_Mem_Acc_pId191_pId191
Ext_Mem_Acc_pId192_pId192
Ext_Mem_Acc_pId193_pId193
Ext_Mem_Acc_pId194_pId194
Ext_Mem_Acc_pId195_pId195
Ext_Mem_Acc_pId196_pId196
Ext_Mem_Acc_pId197_pId197
Ext_Mem_Acc_pId198_pId198
Ext_Mem_Acc_pId199_pId199
Ext_Mem_Acc_pId200_pId200

The net has transition(s) that can never fire:
End_Ext_Acc_0_0
End_Ext_Acc_1_1
End_Ext_Acc_2_2
End_Ext_Acc_3_3
End_Ext_Acc_4_4
End_Ext_Acc_5_5
End_Ext_Acc_6_6
End_Ext_Acc_13_13
End_Ext_Acc_7_7
End_Ext_Acc_8_8
End_Ext_Acc_39_39
End_Ext_Acc_9_9
End_Ext_Acc_10_10
End_Ext_Acc_11_11
End_Ext_Acc_12_12
End_Ext_Acc_14_14
End_Ext_Acc_15_15
End_Ext_Acc_16_16
End_Ext_Acc_17_17
End_Ext_Acc_18_18
End_Ext_Acc_80_80
End_Ext_Acc_19_19
End_Ext_Acc_20_20
End_Ext_Acc_21_21
End_Ext_Acc_22_22
End_Ext_Acc_23_23
End_Ext_Acc_24_24
End_Ext_Acc_25_25
End_Ext_Acc_26_26
End_Ext_Acc_54_54
End_Ext_Acc_27_27
End_Ext_Acc_28_28
End_Ext_Acc_29_29
End_Ext_Acc_30_30
End_Ext_Acc_31_31
End_Ext_Acc_32_32
End_Ext_Acc_64_64
End_Ext_Acc_33_33
End_Ext_Acc_34_34
End_Ext_Acc_35_35
End_Ext_Acc_36_36
End_Ext_Acc_37_37
End_Ext_Acc_38_38
End_Ext_Acc_162_162
End_Ext_Acc_81_81
End_Ext_Acc_40_40
End_Ext_Acc_41_41
End_Ext_Acc_42_42
End_Ext_Acc_43_43
End_Ext_Acc_44_44
End_Ext_Acc_45_45
End_Ext_Acc_46_46
End_Ext_Acc_47_47
End_Ext_Acc_48_48
End_Ext_Acc_49_49
End_Ext_Acc_50_50
End_Ext_Acc_51_51
End_Ext_Acc_52_52
End_Ext_Acc_53_53
End_Ext_Acc_109_109
End_Ext_Acc_55_55
End_Ext_Acc_56_56
End_Ext_Acc_57_57
End_Ext_Acc_58_58
End_Ext_Acc_59_59
End_Ext_Acc_60_60
End_Ext_Acc_61_61
End_Ext_Acc_62_62
End_Ext_Acc_63_63
End_Ext_Acc_128_128
End_Ext_Acc_65_65
End_Ext_Acc_66_66
End_Ext_Acc_67_67
End_Ext_Acc_68_68
End_Ext_Acc_69_69
End_Ext_Acc_70_70
End_Ext_Acc_71_71
End_Ext_Acc_72_72
End_Ext_Acc_73_73
End_Ext_Acc_74_74
End_Ext_Acc_75_75
End_Ext_Acc_76_76
End_Ext_Acc_77_77
End_Ext_Acc_78_78
End_Ext_Acc_79_79
End_Ext_Acc_163_163
End_Ext_Acc_164_164
End_Ext_Acc_82_82
End_Ext_Acc_83_83
End_Ext_Acc_84_84
End_Ext_Acc_85_85
End_Ext_Acc_86_86
End_Ext_Acc_87_87
End_Ext_Acc_88_88
End_Ext_Acc_89_89
End_Ext_Acc_90_90
End_Ext_Acc_91_91
End_Ext_Acc_92_92
End_Ext_Acc_93_93
End_Ext_Acc_94_94
End_Ext_Acc_95_95
End_Ext_Acc_96_96
End_Ext_Acc_97_97
End_Ext_Acc_98_98
End_Ext_Acc_99_99
End_Ext_Acc_100_100
End_Ext_Acc_101_101
End_Ext_Acc_102_102
End_Ext_Acc_103_103
End_Ext_Acc_104_104
End_Ext_Acc_105_105
End_Ext_Acc_106_106
End_Ext_Acc_107_107
End_Ext_Acc_108_108
End_Ext_Acc_110_110
End_Ext_Acc_111_111
End_Ext_Acc_112_112
End_Ext_Acc_113_113
End_Ext_Acc_114_114
End_Ext_Acc_115_115
End_Ext_Acc_116_116
End_Ext_Acc_117_117
End_Ext_Acc_118_118
End_Ext_Acc_119_119
End_Ext_Acc_120_120
End_Ext_Acc_121_121
End_Ext_Acc_122_122
End_Ext_Acc_123_123
End_Ext_Acc_124_124
End_Ext_Acc_125_125
End_Ext_Acc_126_126
End_Ext_Acc_127_127
End_Ext_Acc_129_129
End_Ext_Acc_130_130
End_Ext_Acc_131_131
End_Ext_Acc_132_132
End_Ext_Acc_133_133
End_Ext_Acc_134_134
End_Ext_Acc_135_135
End_Ext_Acc_136_136
End_Ext_Acc_137_137
End_Ext_Acc_138_138
End_Ext_Acc_139_139
End_Ext_Acc_140_140
End_Ext_Acc_141_141
End_Ext_Acc_142_142
End_Ext_Acc_143_143
End_Ext_Acc_144_144
End_Ext_Acc_145_145
End_Ext_Acc_146_146
End_Ext_Acc_147_147
End_Ext_Acc_148_148
End_Ext_Acc_149_149
End_Ext_Acc_150_150
End_Ext_Acc_151_151
End_Ext_Acc_152_152
End_Ext_Acc_153_153
End_Ext_Acc_154_154
End_Ext_Acc_155_155
End_Ext_Acc_156_156
End_Ext_Acc_157_157
End_Ext_Acc_158_158
End_Ext_Acc_159_159
End_Ext_Acc_160_160
End_Ext_Acc_161_161
End_Ext_Acc_165_165
End_Ext_Acc_166_166
End_Ext_Acc_167_167
End_Ext_Acc_168_168
End_Ext_Acc_169_169
End_Ext_Acc_170_170
End_Ext_Acc_171_171
End_Ext_Acc_172_172
End_Ext_Acc_173_173
End_Ext_Acc_174_174
End_Ext_Acc_175_175
End_Ext_Acc_176_176
End_Ext_Acc_177_177
End_Ext_Acc_178_178
End_Ext_Acc_179_179
End_Ext_Acc_180_180
End_Ext_Acc_181_181
End_Ext_Acc_182_182
End_Ext_Acc_183_183
End_Ext_Acc_184_184
End_Ext_Acc_185_185
End_Ext_Acc_186_186
End_Ext_Acc_187_187
End_Ext_Acc_188_188
End_Ext_Acc_189_189
End_Ext_Acc_190_190
End_Ext_Acc_191_191
End_Ext_Acc_192_192
End_Ext_Acc_193_193
End_Ext_Acc_194_194
End_Ext_Acc_195_195
End_Ext_Acc_196_196
End_Ext_Acc_197_197
End_Ext_Acc_198_198
End_Ext_Acc_199_199

check for constant places
ok
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.197sec

/home/mcc/BenchKit/bin//../marcie/bin//../BenchKit_head.sh: line 16: 338 Segmentation fault ${MARCIE} --net-file=model.pnml --mcc-file=${BK_EXAMINATION}.xml ${MARCIE_CONFIG}

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="SharedMemory-COL-000200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is SharedMemory-COL-000200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r353-smll-167891801300586"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/SharedMemory-COL-000200.tgz
mv SharedMemory-COL-000200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;