About the Execution of 2022-gold for RERS17pb113-PT-5
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
16218.367 | 3592497.00 | 12305684.00 | 2684.00 | ?F??FF?T?FTF?FFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r350-tall-167889219900026.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool gold2022
Input is RERS17pb113-PT-5, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r350-tall-167889219900026
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 15M
-rw-r--r-- 1 mcc users 7.5K Feb 26 18:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 26 18:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.2K Feb 26 18:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 18:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.4K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 15M Mar 5 18:23 model.pnml
-rw-r--r-- 1 mcc users 11K Feb 26 18:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 112K Feb 26 18:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 26 18:20 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 88K Feb 26 18:20 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:37 UpperBounds.xml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-00
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-01
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-02
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-03
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-04
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-05
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-06
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-07
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-08
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-09
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-10
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-11
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-12
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-13
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-14
FORMULA_NAME RERS17pb113-PT-5-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679133125527
gold2022
Got BK_BIN_PATH=/home/mcc/BenchKit/bin/
---> gold2022 --- TAPAAL v5
Setting MODEL_PATH=.
Setting VERIFYPN=/home/mcc/BenchKit/bin/verifypn
Got BK_TIME_CONFINEMENT=3600
Setting TEMPDIR=/home/mcc/BenchKit/bin/tmp
Got BK_MEMORY_CONFINEMENT=16384
Limiting to 16265216 kB
Total timeout: 3590
Time left: 3590
*************************************
* TAPAAL verifying CTLFireability *
*************************************
TEMPDIR=/home/mcc/BenchKit/bin/tmp
QF=/home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW
MF=/home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz
Time left: 3590
---------------------------------------------------
Step -1: Stripping Colors
---------------------------------------------------
Verifying stripped models (16 in total)
/home/mcc/BenchKit/bin/verifypn -n -c -q 718 -l 29 -d 299 -z 4 -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
CPN OverApproximation is only usable on colored models
Time left: 3589
---------------------------------------------------
Step 0: Parallel Simplification
---------------------------------------------------
Doing parallel simplification (16 in total)
Total simplification timout is 718 -- reduction timeout is 299
timeout 3589 /home/mcc/BenchKit/bin/verifypn -n -q 718 -l 29 -d 299 -z 4 -s OverApprox --binary-query-io 2 --write-simplified /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --write-reduced /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz -x 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16 ./model.pnml ./CTLFireability.xml
Time left: 2839
---------------------------------------------------
Step 1: Parallel processing
---------------------------------------------------
Doing parallel verification of individual queries (16 in total)
Each query is verified by 4 parallel strategies for 299 seconds
------------------- QUERY 1 ----------------------
No solution found
Time left: 2537
------------------- QUERY 2 ----------------------
No solution found
Time left: 2236
------------------- QUERY 3 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.227289 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.227504 on verification
@@@1.83,122428@@@
Query index 0 was solved
Query is satisfied.
Spent 0.229116 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 3 -n
FORMULA RERS17pb113-PT-5-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2234
------------------- QUERY 4 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.51747 on verification
@@@1.87,124300@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 4 -n
FORMULA RERS17pb113-PT-5-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2232
------------------- QUERY 5 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is satisfied.
Spent 0.155824 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.152842 on verification
Query index 0 was solved
Query is satisfied.
Spent 0.152559 on verification
@@@1.51,123056@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 5 -n
FORMULA RERS17pb113-PT-5-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2230
------------------- QUERY 6 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.221893 on verification
Query index 0 was solved
Query is NOT satisfied.
Spent 0.222153 on verification
@@@1.84,122984@@@
Query index 0 was solved
Query is NOT satisfied.
Spent 0.221392 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 6 -n
FORMULA RERS17pb113-PT-5-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 2228
------------------- QUERY 7 ----------------------
No solution found
Command terminated by signal 9
@@@110.48,8003336@@@
Command terminated by signal 9
@@@237.11,10546296@@@
Time left: 1927
------------------- QUERY 8 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.161291 on verification
Query index 0 was solved
Query is NOT satisfied.
Spent 0.160727 on verification
Query index 0 was solved
Query is NOT satisfied.
Spent 0.160376 on verification
@@@1.47,124580@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 8 -n
FORMULA RERS17pb113-PT-5-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1925
------------------- QUERY 9 ----------------------
No solution found
Command terminated by signal 9
@@@106.87,6997220@@@
Command terminated by signal 9
@@@204.62,11018296@@@
Time left: 1624
------------------- QUERY 10 ----------------------
Solution found by parallel processing (step 1)
Command terminated by signal 9
@@@65.10,4124676@@@
Command terminated by signal 9
@@@88.72,5436796@@@
Query index 0 was solved
Query is NOT satisfied.
Spent 103.659 on verification
@@@105.26,5933760@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 10 -n
FORMULA RERS17pb113-PT-5-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1518
------------------- QUERY 11 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.167894 on verification
Query index 0 was solved
Query is NOT satisfied.
Spent 0.154548 on verification
@@@1.49,124076@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 11 -n
FORMULA RERS17pb113-PT-5-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1516
------------------- QUERY 12 ----------------------
No solution found
Time left: 1215
------------------- QUERY 13 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.161693 on verification
@@@1.47,122816@@@
Query index 0 was solved
Query is NOT satisfied.
Spent 0.162507 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 13 -n
FORMULA RERS17pb113-PT-5-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1213
------------------- QUERY 14 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.059508 on verification
Query index 0 was solved
Query is NOT satisfied.
Spent 0.060296 on verification
@@@1.37,123044@@@
Query index 0 was solved
Query is NOT satisfied.
Spent 0.055051 on verification
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -s\ BestFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 14 -n
FORMULA RERS17pb113-PT-5-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1211
------------------- QUERY 15 ----------------------
Solution found by parallel processing (step 1)
Query index 0 was solved
Query is NOT satisfied.
Spent 0.163592 on verification
Query index 0 was solved
Query is NOT satisfied.
Spent 0.164192 on verification
@@@1.46,123744@@@
parallel: This job succeeded:
eval /usr/bin/time -f "@@@%e,%M@@@" /home/mcc/BenchKit/bin/verifypn -n -tar\ -s\ RDFS\ -q\ 0\ -l\ 0\ -d\ 119 /home/mcc/BenchKit/bin/tmp/tmp.EPeAS7syPz /home/mcc/BenchKit/bin/tmp/tmp.8sLTzh1uYW --binary-query-io 1 -x 15 -n
FORMULA RERS17pb113-PT-5-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT STATE_COMPRESSION SAT_SMT STUBBORN_SETS CTL_CZERO
Time left: 1210
------------------- QUERY 16 ----------------------
No solution found
Time left: 908
---------------------------------------------------
Step 2: Sequential processing
---------------------------------------------------
Remaining 6 queries are verified sequentially.
Each query is verified for a dynamic timeout (at least 598 seconds)
Time left: 908
------------------- QUERY 1 ----------------------
Running query 1 for 598 seconds. Remaining: 6 queries and 908 seconds
No solution found
Time left: 308
------------------- QUERY 2 ----------------------
Time left: 308
---------------------------------------------------
Step 4: Random Parallel processing
---------------------------------------------------
Doing random parallel verification of individual queries (6 in total)
Each query is verified by 4 parallel strategies for 51 seconds
------------------- QUERY 1 ----------------------
No solution found
Time left: 255
------------------- QUERY 2 ----------------------
No solution found
Time left: 201
------------------- QUERY 7 ----------------------
No solution found
Time left: 147
------------------- QUERY 9 ----------------------
No solution found
Time left: 93
------------------- QUERY 12 ----------------------
No solution found
Time left: 39
------------------- QUERY 16 ----------------------
No solution found
Time left: -3
Out of time, terminating!
terminated-with-cleanup
BK_STOP 1679136718024
--------------------
content from stderr:
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb113-PT-5"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="gold2022"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool gold2022"
echo " Input is RERS17pb113-PT-5, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r350-tall-167889219900026"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb113-PT-5.tgz
mv RERS17pb113-PT-5 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;