About the Execution of LoLA for ResAllocation-PT-R003C100
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
53.319 | 119.00 | 110.00 | 0.00 | F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r340-tall-167889213200454.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
............................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ResAllocation-PT-R003C100, examination is Liveness
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r340-tall-167889213200454
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 7.4K Feb 25 15:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 15:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:22 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 25 15:22 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 10K Feb 25 15:24 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 97K Feb 25 15:24 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 10K Feb 25 15:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 25 15:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 721K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
FORMULA_NAME Liveness
=== Now, execution of the tool begins
BK_START 1679033196103
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=Liveness
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=ResAllocation-PT-R003C100
Not applying reductions.
Model is PT
Liveness PT
starting LoLA
BK_INPUT ResAllocation-PT-R003C100
BK_EXAMINATION: Liveness
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
GlobalProperty: Liveness
FORMULA Liveness FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679033196222
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: LAUNCH SYMM
lola: ..... t_58_0: false
lola: INDIVIDUAL RESULTS
lola: t_58_0: false (by universal search)
lola: t_58_1: void (by not produced)
lola: t_58_2: void (by not produced)
lola: t_45_1: void (by not produced)
lola: t_45_2: void (by not produced)
lola: t_45_3: void (by not produced)
lola: t_32_0: void (by not produced)
lola: t_32_1: void (by not produced)
lola: t_32_2: void (by not produced)
lola: t_94_0: void (by not produced)
lola: t_94_1: void (by not produced)
lola: t_94_2: void (by not produced)
lola: t_81_1: void (by not produced)
lola: t_81_2: void (by not produced)
lola: t_81_3: void (by not produced)
lola: t_9_1: void (by not produced)
lola: t_9_2: void (by not produced)
lola: t_9_3: void (by not produced)
lola: t_59_1: void (by not produced)
lola: t_59_2: void (by not produced)
lola: t_59_3: void (by not produced)
lola: t_46_0: void (by not produced)
lola: t_46_1: void (by not produced)
lola: t_46_2: void (by not produced)
lola: t_33_1: void (by not produced)
lola: t_33_2: void (by not produced)
lola: t_33_3: void (by not produced)
lola: t_20_0: void (by not produced)
lola: t_20_1: void (by not produced)
lola: t_20_2: void (by not produced)
lola: t_95_1: void (by not produced)
lola: t_95_2: void (by not produced)
lola: t_95_3: void (by not produced)
lola: t_82_0: void (by not produced)
lola: t_82_1: void (by not produced)
lola: t_82_2: void (by not produced)
lola: t_47_1: void (by not produced)
lola: t_47_2: void (by not produced)
lola: t_47_3: void (by not produced)
lola: t_34_0: void (by not produced)
lola: t_34_1: void (by not produced)
lola: t_34_2: void (by not produced)
lola: t_21_1: void (by not produced)
lola: t_21_2: void (by not produced)
lola: t_21_3: void (by not produced)
lola: t_96_0: void (by not produced)
lola: t_96_1: void (by not produced)
lola: t_96_2: void (by not produced)
lola: t_83_1: void (by not produced)
lola: t_83_2: void (by not produced)
lola: t_83_3: void (by not produced)
lola: t_70_0: void (by not produced)
lola: t_70_1: void (by not produced)
lola: t_70_2: void (by not produced)
lola: t_48_0: void (by not produced)
lola: t_48_1: void (by not produced)
lola: t_48_2: void (by not produced)
lola: t_35_1: void (by not produced)
lola: t_35_2: void (by not produced)
lola: t_35_3: void (by not produced)
lola: t_22_0: void (by not produced)
lola: t_22_1: void (by not produced)
lola: t_22_2: void (by not produced)
lola: t_97_1: void (by not produced)
lola: t_97_2: void (by not produced)
lola: t_97_3: void (by not produced)
lola: t_84_0: void (by not produced)
lola: t_84_1: void (by not produced)
lola: t_84_2: void (by not produced)
lola: t_71_1: void (by not produced)
lola: t_71_2: void (by not produced)
lola: t_71_3: void (by not produced)
lola: t_49_1: void (by not produced)
lola: t_49_2: void (by not produced)
lola: t_49_3: void (by not produced)
lola: t_36_0: void (by not produced)
lola: t_36_1: void (by not produced)
lola: t_36_2: void (by not produced)
lola: t_23_1: void (by not produced)
lola: t_23_2: void (by not produced)
lola: t_23_3: void (by not produced)
lola: t_10_0: void (by not produced)
lola: t_10_1: void (by not produced)
lola: t_10_2: void (by not produced)
lola: t_98_0: void (by not produced)
lola: t_98_1: void (by not produced)
lola: t_98_2: void (by not produced)
lola: t_85_1: void (by not produced)
lola: t_85_2: void (by not produced)
lola: t_85_3: void (by not produced)
lola: t_72_0: void (by not produced)
lola: t_72_1: void (by not produced)
lola: t_72_2: void (by not produced)
lola: t_37_1: void (by not produced)
lola: t_37_2: void (by not produced)
lola: t_37_3: void (by not produced)
lola: t_24_0: void (by not produced)
lola: t_24_1: void (by not produced)
lola: t_24_2: void (by not produced)
lola: t_11_1: void (by not produced)
lola: t_11_2: void (by not produced)
lola: t_11_3: void (by not produced)
lola: t_99_1: void (by not produced)
lola: t_99_2: void (by not produced)
lola: t_99_3: void (by not produced)
lola: t_86_0: void (by not produced)
lola: t_86_1: void (by not produced)
lola: t_86_2: void (by not produced)
lola: t_73_1: void (by not produced)
lola: t_73_2: void (by not produced)
lola: t_73_3: void (by not produced)
lola: t_60_0: void (by not produced)
lola: t_60_1: void (by not produced)
lola: t_60_2: void (by not produced)
lola: t_38_0: void (by not produced)
lola: t_38_1: void (by not produced)
lola: t_38_2: void (by not produced)
lola: t_25_1: void (by not produced)
lola: t_25_2: void (by not produced)
lola: t_25_3: void (by not produced)
lola: t_12_0: void (by not produced)
lola: t_12_1: void (by not produced)
lola: t_12_2: void (by not produced)
lola: t_87_1: void (by not produced)
lola: t_87_2: void (by not produced)
lola: t_87_3: void (by not produced)
lola: t_74_0: void (by not produced)
lola: t_74_1: void (by not produced)
lola: t_74_2: void (by not produced)
lola: t_61_1: void (by not produced)
lola: t_61_2: void (by not produced)
lola: t_61_3: void (by not produced)
lola: t_39_1: void (by not produced)
lola: t_39_2: void (by not produced)
lola: t_39_3: void (by not produced)
lola: t_26_0: void (by not produced)
lola: t_26_1: void (by not produced)
lola: t_26_2: void (by not produced)
lola: t_13_1: void (by not produced)
lola: t_13_2: void (by not produced)
lola: t_13_3: void (by not produced)
lola: t_88_0: void (by not produced)
lola: t_88_1: void (by not produced)
lola: t_88_2: void (by not produced)
lola: t_75_1: void (by not produced)
lola: t_75_2: void (by not produced)
lola: t_75_3: void (by not produced)
lola: t_62_0: void (by not produced)
lola: t_62_1: void (by not produced)
lola: t_62_2: void (by not produced)
lola: t_0_0: void (by not produced)
lola: t_0_1: void (by not produced)
lola: t_0_2: void (by not produced)
lola: t_27_1: void (by not produced)
lola: t_27_2: void (by not produced)
lola: t_27_3: void (by not produced)
lola: t_14_0: void (by not produced)
lola: t_14_1: void (by not produced)
lola: t_14_2: void (by not produced)
lola: t_89_1: void (by not produced)
lola: t_89_2: void (by not produced)
lola: t_89_3: void (by not produced)
lola: t_76_0: void (by not produced)
lola: t_76_1: void (by not produced)
lola: t_76_2: void (by not produced)
lola: t_63_1: void (by not produced)
lola: t_63_2: void (by not produced)
lola: t_63_3: void (by not produced)
lola: t_50_0: void (by not produced)
lola: t_50_1: void (by not produced)
lola: t_50_2: void (by not produced)
lola: t_1_1: void (by not produced)
lola: t_1_2: void (by not produced)
lola: t_1_3: void (by not produced)
lola: t_28_0: void (by not produced)
lola: t_28_1: void (by not produced)
lola: t_28_2: void (by not produced)
lola: t_15_1: void (by not produced)
lola: t_15_2: void (by not produced)
lola: t_15_3: void (by not produced)
lola: t_77_1: void (by not produced)
lola: t_77_2: void (by not produced)
lola: t_77_3: void (by not produced)
lola: t_64_0: void (by not produced)
lola: t_64_1: void (by not produced)
lola: t_64_2: void (by not produced)
lola: t_51_1: void (by not produced)
lola: t_51_2: void (by not produced)
lola: t_51_3: void (by not produced)
lola: t_2_0: void (by not produced)
lola: t_2_1: void (by not produced)
lola: t_2_2: void (by not produced)
lola: t_29_1: void (by not produced)
lola: t_29_2: void (by not produced)
lola: t_29_3: void (by not produced)
lola: t_16_0: void (by not produced)
lola: t_16_1: void (by not produced)
lola: t_16_2: void (by not produced)
lola: t_78_0: void (by not produced)
lola: t_78_1: void (by not produced)
lola: t_78_2: void (by not produced)
lola: t_65_1: void (by not produced)
lola: t_65_2: void (by not produced)
lola: t_65_3: void (by not produced)
lola: t_52_0: void (by not produced)
lola: t_52_1: void (by not produced)
lola: t_52_2: void (by not produced)
lola: t_3_1: void (by not produced)
lola: t_3_2: void (by not produced)
lola: t_3_3: void (by not produced)
lola: t_17_1: void (by not produced)
lola: t_17_2: void (by not produced)
lola: t_17_3: void (by not produced)
lola: t_79_1: void (by not produced)
lola: t_79_2: void (by not produced)
lola: t_79_3: void (by not produced)
lola: t_66_0: void (by not produced)
lola: t_66_1: void (by not produced)
lola: t_66_2: void (by not produced)
lola: t_53_1: void (by not produced)
lola: t_53_2: void (by not produced)
lola: t_53_3: void (by not produced)
lola: t_40_0: void (by not produced)
lola: t_40_1: void (by not produced)
lola: t_40_2: void (by not produced)
lola: t_4_0: void (by not produced)
lola: t_4_1: void (by not produced)
lola: t_4_2: void (by not produced)
lola: t_18_0: void (by not produced)
lola: t_18_1: void (by not produced)
lola: t_18_2: void (by not produced)
lola: t_67_1: void (by not produced)
lola: t_67_2: void (by not produced)
lola: t_67_3: void (by not produced)
lola: t_54_0: void (by not produced)
lola: t_54_1: void (by not produced)
lola: t_54_2: void (by not produced)
lola: t_41_1: void (by not produced)
lola: t_41_2: void (by not produced)
lola: t_41_3: void (by not produced)
lola: t_90_0: void (by not produced)
lola: t_90_1: void (by not produced)
lola: t_90_2: void (by not produced)
lola: t_5_1: void (by not produced)
lola: t_5_2: void (by not produced)
lola: t_5_3: void (by not produced)
lola: t_19_1: void (by not produced)
lola: t_19_2: void (by not produced)
lola: t_19_3: void (by not produced)
lola: t_68_0: void (by not produced)
lola: t_68_1: void (by not produced)
lola: t_68_2: void (by not produced)
lola: t_55_1: void (by not produced)
lola: t_55_2: void (by not produced)
lola: t_55_3: void (by not produced)
lola: t_42_0: void (by not produced)
lola: t_42_1: void (by not produced)
lola: t_42_2: void (by not produced)
lola: t_91_1: void (by not produced)
lola: t_91_2: void (by not produced)
lola: t_91_3: void (by not produced)
lola: t_6_0: void (by not produced)
lola: t_6_1: void (by not produced)
lola: t_6_2: void (by not produced)
lola: t_69_1: void (by not produced)
lola: t_69_2: void (by not produced)
lola: t_69_3: void (by not produced)
lola: t_56_0: void (by not produced)
lola: t_56_1: void (by not produced)
lola: t_56_2: void (by not produced)
lola: t_43_1: void (by not produced)
lola: t_43_2: void (by not produced)
lola: t_43_3: void (by not produced)
lola: t_30_0: void (by not produced)
lola: t_30_1: void (by not produced)
lola: t_30_2: void (by not produced)
lola: t_92_0: void (by not produced)
lola: t_92_1: void (by not produced)
lola: t_92_2: void (by not produced)
lola: t_7_1: void (by not produced)
lola: t_7_2: void (by not produced)
lola: t_7_3: void (by not produced)
lola: t_57_1: void (by not produced)
lola: t_57_2: void (by not produced)
lola: t_57_3: void (by not produced)
lola: t_44_0: void (by not produced)
lola: t_44_1: void (by not produced)
lola: t_44_2: void (by not produced)
lola: t_31_1: void (by not produced)
lola: t_31_2: void (by not produced)
lola: t_31_3: void (by not produced)
lola: t_93_1: void (by not produced)
lola: t_93_2: void (by not produced)
lola: t_93_3: void (by not produced)
lola: t_80_0: void (by not produced)
lola: t_80_1: void (by not produced)
lola: t_80_2: void (by not produced)
lola: t_8_0: void (by not produced)
lola: t_8_1: void (by not produced)
lola: t_8_2: void (by not produced)
lola: The net is not live
lola: Example for violating transition: t_58_0
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R003C100"
export BK_EXAMINATION="Liveness"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ResAllocation-PT-R003C100, examination is Liveness"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r340-tall-167889213200454"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R003C100.tgz
mv ResAllocation-PT-R003C100 execution
cd execution
if [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "UpperBounds" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] || [ "Liveness" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "Liveness" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "Liveness" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "Liveness.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property Liveness.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "Liveness.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "Liveness" = "ReachabilityDeadlock" ] || [ "Liveness" = "QuasiLiveness" ] || [ "Liveness" = "StableMarking" ] || [ "Liveness" = "Liveness" ] || [ "Liveness" = "OneSafe" ] ; then
echo "FORMULA_NAME Liveness"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;