fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r327-tall-167889200000762
Last Updated
May 14, 2023

About the Execution of LoLa+red for ResAllocation-PT-R050C002

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
2943.735 340122.00 343668.00 1197.00 FF??TTF?TTT????F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200000762.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R050C002, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200000762
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 704K
-rw-r--r-- 1 mcc users 6.6K Feb 25 15:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 15:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 15:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:45 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 25 15:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 167K Feb 25 15:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 15:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 15:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:45 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:45 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 212K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-00
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-01
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-02
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-03
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-04
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-05
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-06
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-07
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-08
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-09
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-10
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-11
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-12
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-13
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-14
FORMULA_NAME ResAllocation-PT-R050C002-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679056295015

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R050C002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:31:36] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 12:31:36] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:31:36] [INFO ] Load time of PNML (sax parser for PT used): 62 ms
[2023-03-17 12:31:36] [INFO ] Transformed 200 places.
[2023-03-17 12:31:36] [INFO ] Transformed 102 transitions.
[2023-03-17 12:31:36] [INFO ] Parsed PT model containing 200 places and 102 transitions and 500 arcs in 121 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Support contains 144 out of 200 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 200/200 places, 102/102 transitions.
Applied a total of 0 rules in 12 ms. Remains 200 /200 variables (removed 0) and now considering 102/102 (removed 0) transitions.
// Phase 1: matrix 102 rows 200 cols
[2023-03-17 12:31:36] [INFO ] Computed 100 place invariants in 12 ms
[2023-03-17 12:31:37] [INFO ] Implicit Places using invariants in 418 ms returned []
[2023-03-17 12:31:37] [INFO ] Invariant cache hit.
[2023-03-17 12:31:37] [INFO ] Implicit Places using invariants and state equation in 138 ms returned [103, 107, 111, 113, 121, 129, 133, 135, 141, 145, 155, 159, 163, 167, 173, 179, 183, 187]
Discarding 18 places :
Implicit Place search using SMT with State Equation took 582 ms to find 18 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 182/200 places, 102/102 transitions.
Applied a total of 0 rules in 2 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 597 ms. Remains : 182/200 places, 102/102 transitions.
Support contains 144 out of 182 places after structural reductions.
[2023-03-17 12:31:37] [INFO ] Flatten gal took : 34 ms
[2023-03-17 12:31:37] [INFO ] Flatten gal took : 14 ms
[2023-03-17 12:31:37] [INFO ] Input system was already deterministic with 102 transitions.
Support contains 142 out of 182 places (down from 144) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 15 resets, run finished after 491 ms. (steps per millisecond=20 ) properties (out of 80) seen :52
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 28) seen :0
Running SMT prover for 28 properties.
// Phase 1: matrix 102 rows 182 cols
[2023-03-17 12:31:38] [INFO ] Computed 82 place invariants in 11 ms
[2023-03-17 12:31:38] [INFO ] [Real]Absence check using 82 positive place invariants in 17 ms returned sat
[2023-03-17 12:31:38] [INFO ] After 553ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:28
[2023-03-17 12:31:38] [INFO ] [Nat]Absence check using 82 positive place invariants in 15 ms returned sat
[2023-03-17 12:31:39] [INFO ] After 226ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :28
[2023-03-17 12:31:39] [INFO ] Deduced a trap composed of 4 places in 42 ms of which 4 ms to minimize.
[2023-03-17 12:31:39] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 1 trap constraints in 49 ms
[2023-03-17 12:31:39] [INFO ] After 642ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :27
Attempting to minimize the solution found.
Minimization took 180 ms.
[2023-03-17 12:31:39] [INFO ] After 1058ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :27
Fused 28 Parikh solutions to 27 different solutions.
Parikh walk visited 24 properties in 160 ms.
Support contains 14 out of 182 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 182/182 places, 102/102 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 181 transition count 101
Free-agglomeration rule applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 3 place count 181 transition count 100
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 4 place count 180 transition count 100
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 1 with 1 rules applied. Total rules applied 5 place count 180 transition count 99
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 1 with 3 rules applied. Total rules applied 8 place count 177 transition count 99
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 10 place count 176 transition count 98
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 2 with 1 rules applied. Total rules applied 11 place count 176 transition count 97
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 14 place count 173 transition count 97
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 16 place count 172 transition count 96
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 3 with 1 rules applied. Total rules applied 17 place count 172 transition count 95
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 3 with 3 rules applied. Total rules applied 20 place count 169 transition count 95
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 4 with 2 rules applied. Total rules applied 22 place count 168 transition count 94
Free-agglomeration rule (complex) applied 1 times.
Iterating global reduction 4 with 1 rules applied. Total rules applied 23 place count 168 transition count 93
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 4 with 3 rules applied. Total rules applied 26 place count 165 transition count 93
Applied a total of 26 rules in 79 ms. Remains 165 /182 variables (removed 17) and now considering 93/102 (removed 9) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 79 ms. Remains : 165/182 places, 93/102 transitions.
Incomplete random walk after 10000 steps, including 18 resets, run finished after 56 ms. (steps per millisecond=178 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=384 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=400 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 921893 steps, run timeout after 3001 ms. (steps per millisecond=307 ) properties seen :{}
Probabilistic random walk after 921893 steps, saw 201452 distinct states, run finished after 3004 ms. (steps per millisecond=306 ) properties seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 93 rows 165 cols
[2023-03-17 12:31:43] [INFO ] Computed 74 place invariants in 6 ms
[2023-03-17 12:31:43] [INFO ] [Real]Absence check using 74 positive place invariants in 9 ms returned sat
[2023-03-17 12:31:43] [INFO ] After 60ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1 real:2
[2023-03-17 12:31:43] [INFO ] After 74ms SMT Verify possible using trap constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-17 12:31:43] [INFO ] After 134ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-17 12:31:43] [INFO ] [Nat]Absence check using 74 positive place invariants in 9 ms returned sat
[2023-03-17 12:31:43] [INFO ] After 58ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-17 12:31:43] [INFO ] After 103ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 20 ms.
[2023-03-17 12:31:43] [INFO ] After 181ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 18 ms.
Support contains 14 out of 165 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 165/165 places, 93/93 transitions.
Applied a total of 0 rules in 5 ms. Remains 165 /165 variables (removed 0) and now considering 93/93 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 5 ms. Remains : 165/165 places, 93/93 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 165/165 places, 93/93 transitions.
Applied a total of 0 rules in 4 ms. Remains 165 /165 variables (removed 0) and now considering 93/93 (removed 0) transitions.
[2023-03-17 12:31:43] [INFO ] Invariant cache hit.
[2023-03-17 12:31:43] [INFO ] Implicit Places using invariants in 109 ms returned [92, 95, 98, 102, 104, 106, 109, 111, 116, 120, 122, 125, 130, 132, 134, 137, 140, 143, 146, 148, 151, 153, 156, 159, 162, 164]
Discarding 26 places :
Implicit Place search using SMT only with invariants took 118 ms to find 26 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 139/165 places, 93/93 transitions.
Applied a total of 0 rules in 5 ms. Remains 139 /139 variables (removed 0) and now considering 93/93 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 127 ms. Remains : 139/165 places, 93/93 transitions.
Incomplete random walk after 10000 steps, including 18 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=312 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 3) seen :0
Interrupted probabilistic random walk after 1010242 steps, run timeout after 3001 ms. (steps per millisecond=336 ) properties seen :{}
Probabilistic random walk after 1010242 steps, saw 217257 distinct states, run finished after 3001 ms. (steps per millisecond=336 ) properties seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 93 rows 139 cols
[2023-03-17 12:31:46] [INFO ] Computed 48 place invariants in 1 ms
[2023-03-17 12:31:46] [INFO ] [Real]Absence check using 48 positive place invariants in 6 ms returned sat
[2023-03-17 12:31:47] [INFO ] After 100ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-17 12:31:47] [INFO ] [Nat]Absence check using 48 positive place invariants in 5 ms returned sat
[2023-03-17 12:31:47] [INFO ] After 52ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-17 12:31:47] [INFO ] After 87ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 25 ms.
[2023-03-17 12:31:47] [INFO ] After 173ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Parikh walk visited 0 properties in 24 ms.
Support contains 14 out of 139 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 139/139 places, 93/93 transitions.
Applied a total of 0 rules in 4 ms. Remains 139 /139 variables (removed 0) and now considering 93/93 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 4 ms. Remains : 139/139 places, 93/93 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 139/139 places, 93/93 transitions.
Applied a total of 0 rules in 3 ms. Remains 139 /139 variables (removed 0) and now considering 93/93 (removed 0) transitions.
[2023-03-17 12:31:47] [INFO ] Invariant cache hit.
[2023-03-17 12:31:47] [INFO ] Implicit Places using invariants in 168 ms returned []
[2023-03-17 12:31:47] [INFO ] Invariant cache hit.
[2023-03-17 12:31:47] [INFO ] Implicit Places using invariants and state equation in 131 ms returned []
Implicit Place search using SMT with State Equation took 304 ms to find 0 implicit places.
[2023-03-17 12:31:47] [INFO ] Redundant transitions in 1 ms returned []
[2023-03-17 12:31:47] [INFO ] Invariant cache hit.
[2023-03-17 12:31:47] [INFO ] Dead Transitions using invariants and state equation in 69 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 386 ms. Remains : 139/139 places, 93/93 transitions.
Free-agglomeration rule applied 1 times.
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 139 transition count 92
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 138 transition count 92
Applied a total of 2 rules in 11 ms. Remains 138 /139 variables (removed 1) and now considering 92/93 (removed 1) transitions.
Running SMT prover for 3 properties.
// Phase 1: matrix 92 rows 138 cols
[2023-03-17 12:31:47] [INFO ] Computed 48 place invariants in 1 ms
[2023-03-17 12:31:47] [INFO ] [Real]Absence check using 48 positive place invariants in 5 ms returned sat
[2023-03-17 12:31:47] [INFO ] After 218ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-17 12:31:47] [INFO ] [Nat]Absence check using 48 positive place invariants in 6 ms returned sat
[2023-03-17 12:31:47] [INFO ] After 49ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :3
[2023-03-17 12:31:48] [INFO ] After 74ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :3
Attempting to minimize the solution found.
Minimization took 18 ms.
[2023-03-17 12:31:48] [INFO ] After 144ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :3
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 11 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 10 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 179 transition count 100
Applied a total of 5 rules in 8 ms. Remains 179 /182 variables (removed 3) and now considering 100/102 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 179/182 places, 100/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 100 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 8 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 180 transition count 101
Applied a total of 3 rules in 6 ms. Remains 180 /182 variables (removed 2) and now considering 101/102 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 180/182 places, 101/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 101 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 7 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 2 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in LTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Applied a total of 0 rules in 1 ms. Remains 182 /182 variables (removed 0) and now considering 102/102 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 182/182 places, 102/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 102 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 182/182 places, 102/102 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 0 with 5 rules applied. Total rules applied 5 place count 179 transition count 100
Applied a total of 5 rules in 6 ms. Remains 179 /182 variables (removed 3) and now considering 100/102 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 179/182 places, 100/102 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 5 ms
[2023-03-17 12:31:48] [INFO ] Input system was already deterministic with 100 transitions.
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Flatten gal took : 6 ms
[2023-03-17 12:31:48] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-17 12:31:48] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 182 places, 102 transitions and 464 arcs took 2 ms.
Total runtime 12185 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ResAllocation-PT-R050C002
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/362
CTLFireability

FORMULA ResAllocation-PT-R050C002-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R050C002-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679056635137

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/362/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/362/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/362/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 48 (type EXCL) for 0 ResAllocation-PT-R050C002-CTLFireability-00
lola: time limit : 150 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 48 (type EXCL) for ResAllocation-PT-R050C002-CTLFireability-00
lola: result : true
lola: markings : 876
lola: fired transitions : 875
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 19 (type EXCL) for 18 ResAllocation-PT-R050C002-CTLFireability-06
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for ResAllocation-PT-R050C002-CTLFireability-06
lola: result : false
lola: markings : 876
lola: fired transitions : 878
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 13 (type EXCL) for 12 ResAllocation-PT-R050C002-CTLFireability-04
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 13 (type EXCL) for ResAllocation-PT-R050C002-CTLFireability-04
lola: result : true
lola: markings : 875
lola: fired transitions : 2585
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 7 (type EXCL) for 6 ResAllocation-PT-R050C002-CTLFireability-02
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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ResAllocation-PT-R050C002-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R050C002-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R050C002-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
ResAllocation-PT-R050C002-CTLFireability-14: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R050C002-CTLFireability-00: F false state space / EG
ResAllocation-PT-R050C002-CTLFireability-01: CTL false CTL model checker
ResAllocation-PT-R050C002-CTLFireability-02: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-03: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-04: CTL true CTL model checker
ResAllocation-PT-R050C002-CTLFireability-05: CTL true CTL model checker
ResAllocation-PT-R050C002-CTLFireability-06: CTL false CTL model checker
ResAllocation-PT-R050C002-CTLFireability-07: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-08: CTL true CTL model checker
ResAllocation-PT-R050C002-CTLFireability-09: CTL true CTL model checker
ResAllocation-PT-R050C002-CTLFireability-10: CTL true CTL model checker
ResAllocation-PT-R050C002-CTLFireability-11: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-12: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-13: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-14: CTL unknown AGGR
ResAllocation-PT-R050C002-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R050C002"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R050C002, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200000762"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R050C002.tgz
mv ResAllocation-PT-R050C002 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;