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Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r327-tall-167889200000750
Last Updated
May 14, 2023

About the Execution of LoLa+red for ResAllocation-PT-R015C002

Execution Summary
Max Memory
Used (MB)		 Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
467.604 6968.00 13932.00 257.20 TTFTFFTTTTFTFTFT normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889200000750.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ResAllocation-PT-R015C002, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889200000750
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 6.4K Feb 25 15:32 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 25 15:32 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 25 15:31 CTLFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 15:31 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.3K Feb 25 16:45 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 15:33 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 25 15:33 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 15:32 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 90K Feb 25 15:32 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:45 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:45 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 64K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-00
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-01
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-02
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-03
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-04
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-05
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-06
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-07
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-08
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-09
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-10
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-11
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-12
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-13
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-14
FORMULA_NAME ResAllocation-PT-R015C002-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1679056170175

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R015C002
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 12:29:31] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-17 12:29:31] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 12:29:31] [INFO ] Load time of PNML (sax parser for PT used): 37 ms
[2023-03-17 12:29:31] [INFO ] Transformed 60 places.
[2023-03-17 12:29:31] [INFO ] Transformed 32 transitions.
[2023-03-17 12:29:31] [INFO ] Parsed PT model containing 60 places and 32 transitions and 150 arcs in 91 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 17 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 146 resets, run finished after 396 ms. (steps per millisecond=25 ) properties (out of 11) seen :2
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-15 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 33 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 35 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 32 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 33 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 29 resets, run finished after 57 ms. (steps per millisecond=175 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 36 resets, run finished after 102 ms. (steps per millisecond=98 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 35 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 27 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 33 resets, run finished after 52 ms. (steps per millisecond=192 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
// Phase 1: matrix 32 rows 60 cols
[2023-03-17 12:29:32] [INFO ] Computed 30 place invariants in 6 ms
[2023-03-17 12:29:32] [INFO ] After 157ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:9
[2023-03-17 12:29:32] [INFO ] [Nat]Absence check using 30 positive place invariants in 4 ms returned sat
[2023-03-17 12:29:33] [INFO ] After 34ms SMT Verify possible using state equation in natural domain returned unsat :7 sat :2
[2023-03-17 12:29:33] [INFO ] After 58ms SMT Verify possible using trap constraints in natural domain returned unsat :7 sat :2
Attempting to minimize the solution found.
Minimization took 21 ms.
[2023-03-17 12:29:33] [INFO ] After 153ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :2
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-09 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-05 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-03 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-01 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-00 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 9 Parikh solutions to 2 different solutions.
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-04 FALSE TECHNIQUES TOPOLOGICAL PARIKH_WALK
Parikh walk visited 1 properties in 3 ms.
Support contains 35 out of 60 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 60/60 places, 32/32 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 59 transition count 31
Applied a total of 2 rules in 13 ms. Remains 59 /60 variables (removed 1) and now considering 31/32 (removed 1) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 15 ms. Remains : 59/60 places, 31/32 transitions.
Incomplete random walk after 10000 steps, including 147 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 37 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 1) seen :0
Probably explored full state space saw : 262102 states, properties seen :0
Probabilistic random walk after 1453899 steps, saw 262102 distinct states, run finished after 1446 ms. (steps per millisecond=1005 ) properties seen :0
Explored full state space saw : 262144 states, properties seen :0
Exhaustive walk after 1454080 steps, saw 262144 distinct states, run finished after 1213 ms. (steps per millisecond=1198 ) properties seen :0
FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-06 TRUE TECHNIQUES TOPOLOGICAL EXHAUSTIVE_WALK
All properties solved without resorting to model-checking.
Total runtime 4258 ms.
starting LoLA
BK_INPUT ResAllocation-PT-R015C002
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ResAllocation-PT-R015C002-ReachabilityCardinality-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679056177143

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:159
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH INITIAL
lola: LAUNCH task # 7 (type CNST) for 6 ResAllocation-PT-R015C002-ReachabilityCardinality-02
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: LAUNCH INITIAL
lola: LAUNCH task # 22 (type CNST) for 21 ResAllocation-PT-R015C002-ReachabilityCardinality-07
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 22 (type CNST) for ResAllocation-PT-R015C002-ReachabilityCardinality-07
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 53 (type EXCL) for 3 ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 3 ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 3 ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 7 (type CNST) for ResAllocation-PT-R015C002-ReachabilityCardinality-02
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 52 (type SRCH) for 3 ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 53 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: markings : 2954
lola: fired transitions : 4745
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: CANCELED task # 49 (type FNDP) for ResAllocation-PT-R015C002-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 50 (type EQUN) for ResAllocation-PT-R015C002-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 52 (type SRCH) for ResAllocation-PT-R015C002-ReachabilityCardinality-01 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 89 (type EXCL) for 9 ResAllocation-PT-R015C002-ReachabilityCardinality-03
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 74 (type FNDP) for 18 ResAllocation-PT-R015C002-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 18 ResAllocation-PT-R015C002-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 77 (type SRCH) for 18 ResAllocation-PT-R015C002-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 89 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-03
lola: result : false
lola: markings : 848
lola: fired transitions : 940
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type FNDP) for ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 1635
lola: tried executions : 76
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 65 (type EXCL) for 30 ResAllocation-PT-R015C002-ReachabilityCardinality-10
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 65 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-10
lola: result : false
lola: markings : 531
lola: fired transitions : 598
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 33 ResAllocation-PT-R015C002-ReachabilityCardinality-11
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 62 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-11
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 112 (type EXCL) for 45 ResAllocation-PT-R015C002-ReachabilityCardinality-15
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 112 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-15
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 124 (type EXCL) for 0 ResAllocation-PT-R015C002-ReachabilityCardinality-00
lola: time limit : 400 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
lola: FINISHED task # 124 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-00
lola: result : false
lola: markings : 222
lola: fired transitions : 259
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 127 (type EXCL) for 42 ResAllocation-PT-R015C002-ReachabilityCardinality-14
lola: time limit : 450 sec
lola: memory limit: 32 pages
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 127 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-14
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 138 (type EXCL) for 36 ResAllocation-PT-R015C002-ReachabilityCardinality-12
lola: time limit : 514 sec
lola: memory limit: 32 pages

lola: FINISHED task # 138 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-12
lola: result : true
lola: markings : 43
lola: fired transitions : 54
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 135 (type EXCL) for 15 ResAllocation-PT-R015C002-ReachabilityCardinality-05
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 135 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-05
lola: result : false
lola: markings : 39
lola: fired transitions : 50
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 94 (type EXCL) for 12 ResAllocation-PT-R015C002-ReachabilityCardinality-04
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 94 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-04
lola: result : true
lola: markings : 7665
lola: fired transitions : 16641
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 132 (type EXCL) for 24 ResAllocation-PT-R015C002-ReachabilityCardinality-08
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EQUN) for ResAllocation-PT-R015C002-ReachabilityCardinality-01
lola: result : false
lola: FINISHED task # 132 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-08
lola: result : false
lola: markings : 15151
lola: fired transitions : 33913
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 71 (type EXCL) for 39 ResAllocation-PT-R015C002-ReachabilityCardinality-13
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 71 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-13
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 78 (type EXCL) for 18 ResAllocation-PT-R015C002-ReachabilityCardinality-06
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 78 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-06
lola: result : false
lola: markings : 35394
lola: fired transitions : 92915
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 74 (type FNDP) for ResAllocation-PT-R015C002-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 75 (type EQUN) for ResAllocation-PT-R015C002-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 77 (type SRCH) for ResAllocation-PT-R015C002-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 121 (type EXCL) for 27 ResAllocation-PT-R015C002-ReachabilityCardinality-09
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 105 (type FNDP) for 27 ResAllocation-PT-R015C002-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 106 (type EQUN) for 27 ResAllocation-PT-R015C002-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 120 (type SRCH) for 27 ResAllocation-PT-R015C002-ReachabilityCardinality-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type FNDP) for ResAllocation-PT-R015C002-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 308374
lola: tried executions : 7991
lola: time used : 1.000000
lola: memory pages used : 0
lola: FINISHED task # 120 (type SRCH) for ResAllocation-PT-R015C002-ReachabilityCardinality-09
lola: result : false
lola: markings : 69281
lola: fired transitions : 198261
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 105 (type FNDP) for ResAllocation-PT-R015C002-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 106 (type EQUN) for ResAllocation-PT-R015C002-ReachabilityCardinality-09 (obsolete)
lola: CANCELED task # 121 (type EXCL) for ResAllocation-PT-R015C002-ReachabilityCardinality-09 (obsolete)
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R015C002-ReachabilityCardinality-00: AG true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-01: AG true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-02: INITIAL false preprocessing
ResAllocation-PT-R015C002-ReachabilityCardinality-03: AG true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-04: AG false tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-05: EF false tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-06: AG true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-07: INITIAL true preprocessing
ResAllocation-PT-R015C002-ReachabilityCardinality-08: AG true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-09: AG true tandem / insertion
ResAllocation-PT-R015C002-ReachabilityCardinality-10: EF false tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-11: EF true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-12: AG false tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-13: EF true tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-14: AG false tandem / relaxed
ResAllocation-PT-R015C002-ReachabilityCardinality-15: EF true tandem / relaxed


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R015C002"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ResAllocation-PT-R015C002, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889200000750"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R015C002.tgz
mv ResAllocation-PT-R015C002 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;