About the Execution of LoLa+red for RefineWMG-PT-050051
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16220.235 | 213646.00 | 212088.00 | 6468.20 | FTFTT???T??TFTF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199900634.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RefineWMG-PT-050051, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199900634
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 568K
-rw-r--r-- 1 mcc users 6.6K Feb 26 16:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 26 16:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 16:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 16:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:44 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:44 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:44 LTLFireability.txt
-rw-r--r-- 1 mcc users 15K Feb 25 16:44 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 16:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 128K Feb 26 16:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 16:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 69K Feb 26 16:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:44 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:44 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 110K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-00
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-01
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-02
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-03
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-04
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-05
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-06
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-07
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-08
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-09
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-10
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-11
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-12
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-13
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-14
FORMULA_NAME RefineWMG-PT-050051-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679053720260
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RefineWMG-PT-050051
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:48:41] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:48:41] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:48:41] [INFO ] Load time of PNML (sax parser for PT used): 49 ms
[2023-03-17 11:48:41] [INFO ] Transformed 254 places.
[2023-03-17 11:48:41] [INFO ] Transformed 203 transitions.
[2023-03-17 11:48:41] [INFO ] Parsed PT model containing 254 places and 203 transitions and 608 arcs in 190 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 25 ms.
Support contains 121 out of 254 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 20 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
// Phase 1: matrix 203 rows 254 cols
[2023-03-17 11:48:42] [INFO ] Computed 102 place invariants in 17 ms
[2023-03-17 11:48:42] [INFO ] Dead Transitions using invariants and state equation in 285 ms found 0 transitions.
[2023-03-17 11:48:42] [INFO ] Invariant cache hit.
[2023-03-17 11:48:42] [INFO ] Implicit Places using invariants in 109 ms returned []
[2023-03-17 11:48:42] [INFO ] Invariant cache hit.
[2023-03-17 11:48:42] [INFO ] Implicit Places using invariants and state equation in 148 ms returned []
Implicit Place search using SMT with State Equation took 260 ms to find 0 implicit places.
[2023-03-17 11:48:42] [INFO ] Invariant cache hit.
[2023-03-17 11:48:42] [INFO ] Dead Transitions using invariants and state equation in 107 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 697 ms. Remains : 254/254 places, 203/203 transitions.
Support contains 121 out of 254 places after structural reductions.
[2023-03-17 11:48:42] [INFO ] Flatten gal took : 42 ms
[2023-03-17 11:48:42] [INFO ] Flatten gal took : 16 ms
[2023-03-17 11:48:42] [INFO ] Input system was already deterministic with 203 transitions.
Support contains 114 out of 254 places (down from 121) after GAL structural reductions.
Incomplete random walk after 10009 steps, including 2 resets, run finished after 93 ms. (steps per millisecond=107 ) properties (out of 73) seen :36
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 37) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 37) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 36) seen :0
Running SMT prover for 36 properties.
[2023-03-17 11:48:43] [INFO ] Invariant cache hit.
[2023-03-17 11:48:43] [INFO ] [Real]Absence check using 102 positive place invariants in 12 ms returned sat
[2023-03-17 11:48:43] [INFO ] After 745ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:36
[2023-03-17 11:48:44] [INFO ] [Nat]Absence check using 102 positive place invariants in 13 ms returned sat
[2023-03-17 11:48:44] [INFO ] After 413ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :36
[2023-03-17 11:48:45] [INFO ] After 1021ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :36
Attempting to minimize the solution found.
Minimization took 358 ms.
[2023-03-17 11:48:45] [INFO ] After 1721ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :36
Finished Parikh walk after 4972 steps, including 0 resets, run visited all 36 properties in 72 ms. (steps per millisecond=69 )
Parikh walk visited 36 properties in 73 ms.
[2023-03-17 11:48:45] [INFO ] Flatten gal took : 11 ms
[2023-03-17 11:48:45] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:48:45] [INFO ] Input system was already deterministic with 203 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 16 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:45] [INFO ] Invariant cache hit.
[2023-03-17 11:48:45] [INFO ] Dead Transitions using invariants and state equation in 102 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 120 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:45] [INFO ] Flatten gal took : 11 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 16 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Graph (trivial) has 148 edges and 254 vertex of which 98 / 254 are part of one of the 49 SCC in 3 ms
Free SCC test removed 49 places
Ensure Unique test removed 49 transitions
Reduce isomorphic transitions removed 49 transitions.
Reduce places removed 49 places and 0 transitions.
Ensure Unique test removed 48 transitions
Reduce isomorphic transitions removed 48 transitions.
Iterating post reduction 0 with 48 rules applied. Total rules applied 49 place count 156 transition count 106
Performed 50 Post agglomeration using F-continuation condition.Transition count delta: 50
Deduced a syphon composed of 50 places in 0 ms
Reduce places removed 100 places and 0 transitions.
Iterating global reduction 1 with 150 rules applied. Total rules applied 199 place count 56 transition count 56
Drop transitions removed 47 transitions
Trivial Post-agglo rules discarded 47 transitions
Performed 47 trivial Post agglomeration. Transition count delta: 47
Iterating post reduction 1 with 47 rules applied. Total rules applied 246 place count 56 transition count 9
Reduce places removed 47 places and 0 transitions.
Iterating post reduction 2 with 47 rules applied. Total rules applied 293 place count 9 transition count 9
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 293 place count 9 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 295 place count 8 transition count 8
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 297 place count 7 transition count 7
Applied a total of 297 rules in 21 ms. Remains 7 /254 variables (removed 247) and now considering 7/203 (removed 196) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-17 11:48:46] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 17 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 7/254 places, 7/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 6 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
// Phase 1: matrix 203 rows 254 cols
[2023-03-17 11:48:46] [INFO ] Computed 102 place invariants in 1 ms
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 99 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 106 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 4 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:46] [INFO ] Invariant cache hit.
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 96 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 102 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 8 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 9 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 5 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:46] [INFO ] Invariant cache hit.
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 98 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 107 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 8 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 9 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:46] [INFO ] Invariant cache hit.
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 97 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 111 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 9 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:46] [INFO ] Invariant cache hit.
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 125 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 129 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 14 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 7 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:46] [INFO ] Invariant cache hit.
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 95 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 98 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 8 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 7 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Graph (trivial) has 143 edges and 254 vertex of which 94 / 254 are part of one of the 47 SCC in 1 ms
Free SCC test removed 47 places
Ensure Unique test removed 47 transitions
Reduce isomorphic transitions removed 47 transitions.
Reduce places removed 47 places and 0 transitions.
Ensure Unique test removed 46 transitions
Reduce isomorphic transitions removed 46 transitions.
Iterating post reduction 0 with 46 rules applied. Total rules applied 47 place count 160 transition count 110
Performed 49 Post agglomeration using F-continuation condition.Transition count delta: 49
Deduced a syphon composed of 49 places in 0 ms
Reduce places removed 98 places and 0 transitions.
Iterating global reduction 1 with 147 rules applied. Total rules applied 194 place count 62 transition count 61
Drop transitions removed 43 transitions
Trivial Post-agglo rules discarded 43 transitions
Performed 43 trivial Post agglomeration. Transition count delta: 43
Iterating post reduction 1 with 43 rules applied. Total rules applied 237 place count 62 transition count 18
Reduce places removed 43 places and 0 transitions.
Iterating post reduction 2 with 43 rules applied. Total rules applied 280 place count 19 transition count 18
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 2 Pre rules applied. Total rules applied 280 place count 19 transition count 16
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 4 rules applied. Total rules applied 284 place count 17 transition count 16
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 286 place count 16 transition count 15
Applied a total of 286 rules in 9 ms. Remains 16 /254 variables (removed 238) and now considering 15/203 (removed 188) transitions.
// Phase 1: matrix 15 rows 16 cols
[2023-03-17 11:48:46] [INFO ] Computed 6 place invariants in 1 ms
[2023-03-17 11:48:46] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 16/254 places, 15/203 transitions.
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:48:46] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:48:46] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
// Phase 1: matrix 203 rows 254 cols
[2023-03-17 11:48:46] [INFO ] Computed 102 place invariants in 2 ms
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 100 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 103 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 7 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:47] [INFO ] Invariant cache hit.
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 101 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 104 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:47] [INFO ] Invariant cache hit.
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 97 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 100 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 7 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 1 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:47] [INFO ] Invariant cache hit.
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 97 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 99 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:47] [INFO ] Invariant cache hit.
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 95 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 98 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 7 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:47] [INFO ] Invariant cache hit.
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 94 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 103 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
Starting structural reductions in LTL mode, iteration 0 : 254/254 places, 203/203 transitions.
Applied a total of 0 rules in 2 ms. Remains 254 /254 variables (removed 0) and now considering 203/203 (removed 0) transitions.
[2023-03-17 11:48:47] [INFO ] Invariant cache hit.
[2023-03-17 11:48:47] [INFO ] Dead Transitions using invariants and state equation in 98 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 101 ms. Remains : 254/254 places, 203/203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:48:47] [INFO ] Input system was already deterministic with 203 transitions.
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:48:47] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:48:47] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 11:48:47] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 254 places, 203 transitions and 608 arcs took 1 ms.
Total runtime 6287 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RefineWMG-PT-050051
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA RefineWMG-PT-050051-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-050051-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679053933906
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 7 (type EXCL) for 6 RefineWMG-PT-050051-CTLFireability-02
lola: time limit : 109 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: LAUNCH task # 74 (type FNDP) for 9 RefineWMG-PT-050051-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 75 (type EQUN) for 9 RefineWMG-PT-050051-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 77 (type SRCH) for 9 RefineWMG-PT-050051-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 77 (type SRCH) for RefineWMG-PT-050051-CTLFireability-03
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 79 (type FNDP) for 9 RefineWMG-PT-050051-CTLFireability-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 74 (type FNDP) for RefineWMG-PT-050051-CTLFireability-03
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 75 (type EQUN) for RefineWMG-PT-050051-CTLFireability-03 (obsolete)
lola: CANCELED task # 79 (type FNDP) for RefineWMG-PT-050051-CTLFireability-03 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: Created skeleton in 0.000000 secs.
sara: try reading problem file /home/mcc/execution/373/CTLFireability-75.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 79 (type FNDP) for RefineWMG-PT-050051-CTLFireability-03
lola: result : true
lola: fired transitions : 50
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 7 (type EXCL) for RefineWMG-PT-050051-CTLFireability-02
lola: result : false
lola: markings : 2640
lola: fired transitions : 4958
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 63 RefineWMG-PT-050051-CTLFireability-13
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: planning for (null) stopped (result already fixed).
lola: planning for (null) stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: FINISHED task # 75 (type EQUN) for RefineWMG-PT-050051-CTLFireability-03
lola: result : true
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 64 (type EXCL) for RefineWMG-PT-050051-CTLFireability-13
lola: result : true
lola: markings : 7893
lola: fired transitions : 14839
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 61 (type EXCL) for 60 RefineWMG-PT-050051-CTLFireability-12
lola: time limit : 179 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 61 (type EXCL) for RefineWMG-PT-050051-CTLFireability-12
lola: result : false
lola: markings : 52
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 70 (type EXCL) for 69 RefineWMG-PT-050051-CTLFireability-15
lola: time limit : 199 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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RefineWMG-PT-050051-CTLFireability-12: CTL false CTL model checker
RefineWMG-PT-050051-CTLFireability-13: CTL true CTL model checker
RefineWMG-PT-050051-CTLFireability-14: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RefineWMG-PT-050051-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-050051-CTLFireability-01: AGEF 0 1 0 0 1 0 0 0
RefineWMG-PT-050051-CTLFireability-03: CONJ 0 2 0 0 13 0 0 8
RefineWMG-PT-050051-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-050051-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-050051-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-050051-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-050051-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-050051-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-050051-CTLFireability-10: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-050051-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 201 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 37 (type EXCL) for 36 RefineWMG-PT-050051-CTLFireability-04
lola: time limit : 566 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for RefineWMG-PT-050051-CTLFireability-04
lola: result : true
lola: markings : 395
lola: fired transitions : 675
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 RefineWMG-PT-050051-CTLFireability-00
lola: time limit : 679 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for RefineWMG-PT-050051-CTLFireability-00
lola: result : false
lola: markings : 9070
lola: fired transitions : 17586
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 RefineWMG-PT-050051-CTLFireability-01
lola: time limit : 849 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for RefineWMG-PT-050051-CTLFireability-01
lola: result : true
lola: markings : 11232
lola: fired transitions : 53292
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 9 RefineWMG-PT-050051-CTLFireability-03
lola: time limit : 1132 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for RefineWMG-PT-050051-CTLFireability-03
lola: result : true
lola: markings : 1106880
lola: fired transitions : 4573040
lola: time used : 2.000000
lola: memory pages used : 5
lola: LAUNCH task # 49 (type EXCL) for 48 RefineWMG-PT-050051-CTLFireability-08
lola: time limit : 3395 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for RefineWMG-PT-050051-CTLFireability-08
lola: result : true
lola: markings : 8373
lola: fired transitions : 45910
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-050051-CTLFireability-00: CTL false CTL model checker
RefineWMG-PT-050051-CTLFireability-01: AGEF true tscc_search
RefineWMG-PT-050051-CTLFireability-02: CTL false CTL model checker
RefineWMG-PT-050051-CTLFireability-03: CONJ true CONJ
RefineWMG-PT-050051-CTLFireability-04: CTL true CTL model checker
RefineWMG-PT-050051-CTLFireability-05: CTL unknown AGGR
RefineWMG-PT-050051-CTLFireability-06: CTL unknown AGGR
RefineWMG-PT-050051-CTLFireability-07: CTL unknown AGGR
RefineWMG-PT-050051-CTLFireability-08: CTL true CTL model checker
RefineWMG-PT-050051-CTLFireability-09: CTL unknown AGGR
RefineWMG-PT-050051-CTLFireability-10: CTL unknown AGGR
RefineWMG-PT-050051-CTLFireability-11: CTL true CTL model checker
RefineWMG-PT-050051-CTLFireability-12: CTL false CTL model checker
RefineWMG-PT-050051-CTLFireability-13: CTL true CTL model checker
RefineWMG-PT-050051-CTLFireability-14: CTL false CTL model checker
RefineWMG-PT-050051-CTLFireability-15: CTL unknown AGGR
Time elapsed: 205 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-050051"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RefineWMG-PT-050051, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199900634"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-050051.tgz
mv RefineWMG-PT-050051 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;