Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199800594.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RefineWMG-PT-015015, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199800594
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 388K
-rw-r--r-- 1 mcc users 5.9K Feb 26 15:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 15:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 15:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 53K Feb 26 15:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 15:53 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 43K Feb 26 15:53 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.6K Feb 26 15:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 15:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 35K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-00
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-01
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-02
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-03
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-04
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-05
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-06
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-07
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-08
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-09
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-10
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-11
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-12
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-13
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-14
FORMULA_NAME RefineWMG-PT-015015-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679053010679

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RefineWMG-PT-015015
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:36:52] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:36:52] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:36:52] [INFO ] Load time of PNML (sax parser for PT used): 31 ms
[2023-03-17 11:36:52] [INFO ] Transformed 79 places.
[2023-03-17 11:36:52] [INFO ] Transformed 63 transitions.
[2023-03-17 11:36:52] [INFO ] Parsed PT model containing 79 places and 63 transitions and 188 arcs in 86 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
Initial state reduction rules removed 2 formulas.
FORMULA RefineWMG-PT-015015-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RefineWMG-PT-015015-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 64 out of 79 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 10 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
// Phase 1: matrix 63 rows 79 cols
[2023-03-17 11:36:52] [INFO ] Computed 32 place invariants in 10 ms
[2023-03-17 11:36:52] [INFO ] Dead Transitions using invariants and state equation in 192 ms found 0 transitions.
[2023-03-17 11:36:52] [INFO ] Invariant cache hit.
[2023-03-17 11:36:52] [INFO ] Implicit Places using invariants in 51 ms returned []
[2023-03-17 11:36:52] [INFO ] Invariant cache hit.
[2023-03-17 11:36:52] [INFO ] Implicit Places using invariants and state equation in 86 ms returned []
Implicit Place search using SMT with State Equation took 141 ms to find 0 implicit places.
[2023-03-17 11:36:52] [INFO ] Invariant cache hit.
[2023-03-17 11:36:52] [INFO ] Dead Transitions using invariants and state equation in 55 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 431 ms. Remains : 79/79 places, 63/63 transitions.
Support contains 64 out of 79 places after structural reductions.
[2023-03-17 11:36:52] [INFO ] Flatten gal took : 22 ms
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 8 ms
[2023-03-17 11:36:53] [INFO ] Input system was already deterministic with 63 transitions.
Incomplete random walk after 10003 steps, including 2 resets, run finished after 129 ms. (steps per millisecond=77 ) properties (out of 56) seen :49
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=243 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=357 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 34 ms. (steps per millisecond=294 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=526 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-17 11:36:53] [INFO ] Invariant cache hit.
[2023-03-17 11:36:53] [INFO ] [Real]Absence check using 32 positive place invariants in 5 ms returned sat
[2023-03-17 11:36:53] [INFO ] After 120ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:7
[2023-03-17 11:36:53] [INFO ] [Nat]Absence check using 32 positive place invariants in 5 ms returned sat
[2023-03-17 11:36:53] [INFO ] After 93ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :7
[2023-03-17 11:36:53] [INFO ] After 169ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :7
Attempting to minimize the solution found.
Minimization took 50 ms.
[2023-03-17 11:36:53] [INFO ] After 283ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :7
Finished Parikh walk after 213 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=106 )
Parikh walk visited 7 properties in 9 ms.
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:36:53] [INFO ] Input system was already deterministic with 63 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Graph (trivial) has 43 edges and 79 vertex of which 28 / 79 are part of one of the 14 SCC in 2 ms
Free SCC test removed 14 places
Ensure Unique test removed 14 transitions
Reduce isomorphic transitions removed 14 transitions.
Reduce places removed 14 places and 0 transitions.
Ensure Unique test removed 13 transitions
Reduce isomorphic transitions removed 13 transitions.
Iterating post reduction 0 with 13 rules applied. Total rules applied 14 place count 51 transition count 36
Performed 15 Post agglomeration using F-continuation condition.Transition count delta: 15
Deduced a syphon composed of 15 places in 0 ms
Reduce places removed 30 places and 0 transitions.
Iterating global reduction 1 with 45 rules applied. Total rules applied 59 place count 21 transition count 21
Drop transitions removed 12 transitions
Trivial Post-agglo rules discarded 12 transitions
Performed 12 trivial Post agglomeration. Transition count delta: 12
Iterating post reduction 1 with 12 rules applied. Total rules applied 71 place count 21 transition count 9
Reduce places removed 12 places and 0 transitions.
Iterating post reduction 2 with 12 rules applied. Total rules applied 83 place count 9 transition count 9
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 83 place count 9 transition count 8
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 85 place count 8 transition count 8
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 87 place count 7 transition count 7
Applied a total of 87 rules in 10 ms. Remains 7 /79 variables (removed 72) and now considering 7/63 (removed 56) transitions.
// Phase 1: matrix 7 rows 7 cols
[2023-03-17 11:36:53] [INFO ] Computed 3 place invariants in 0 ms
[2023-03-17 11:36:53] [INFO ] Dead Transitions using invariants and state equation in 17 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 7/79 places, 7/63 transitions.
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:36:53] [INFO ] Input system was already deterministic with 7 transitions.
Finished random walk after 19 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=19 )
FORMULA RefineWMG-PT-015015-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Graph (trivial) has 38 edges and 79 vertex of which 24 / 79 are part of one of the 12 SCC in 0 ms
Free SCC test removed 12 places
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Reduce places removed 12 places and 0 transitions.
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 12 place count 55 transition count 40
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 1 with 42 rules applied. Total rules applied 54 place count 27 transition count 26
Drop transitions removed 7 transitions
Trivial Post-agglo rules discarded 7 transitions
Performed 7 trivial Post agglomeration. Transition count delta: 7
Iterating post reduction 1 with 7 rules applied. Total rules applied 61 place count 27 transition count 19
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 68 place count 20 transition count 19
Performed 3 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 3 Pre rules applied. Total rules applied 68 place count 20 transition count 16
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 3 with 6 rules applied. Total rules applied 74 place count 17 transition count 16
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 76 place count 16 transition count 15
Applied a total of 76 rules in 7 ms. Remains 16 /79 variables (removed 63) and now considering 15/63 (removed 48) transitions.
// Phase 1: matrix 15 rows 16 cols
[2023-03-17 11:36:53] [INFO ] Computed 6 place invariants in 0 ms
[2023-03-17 11:36:53] [INFO ] Dead Transitions using invariants and state equation in 23 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 16/79 places, 15/63 transitions.
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:36:53] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
// Phase 1: matrix 63 rows 79 cols
[2023-03-17 11:36:53] [INFO ] Computed 32 place invariants in 1 ms
[2023-03-17 11:36:53] [INFO ] Dead Transitions using invariants and state equation in 52 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:36:53] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:36:53] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 48 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 52 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Graph (trivial) has 32 edges and 79 vertex of which 18 / 79 are part of one of the 9 SCC in 0 ms
Free SCC test removed 9 places
Ensure Unique test removed 9 transitions
Reduce isomorphic transitions removed 9 transitions.
Reduce places removed 9 places and 0 transitions.
Ensure Unique test removed 8 transitions
Reduce isomorphic transitions removed 8 transitions.
Iterating post reduction 0 with 8 rules applied. Total rules applied 9 place count 61 transition count 46
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 1 with 42 rules applied. Total rules applied 51 place count 33 transition count 32
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 4 rules applied. Total rules applied 55 place count 33 transition count 28
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 59 place count 29 transition count 28
Performed 4 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 4 Pre rules applied. Total rules applied 59 place count 29 transition count 24
Deduced a syphon composed of 4 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 3 with 8 rules applied. Total rules applied 67 place count 25 transition count 24
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 69 place count 24 transition count 23
Applied a total of 69 rules in 8 ms. Remains 24 /79 variables (removed 55) and now considering 23/63 (removed 40) transitions.
// Phase 1: matrix 23 rows 24 cols
[2023-03-17 11:36:54] [INFO ] Computed 9 place invariants in 0 ms
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 25 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 24/79 places, 23/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 23 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Graph (trivial) has 38 edges and 79 vertex of which 24 / 79 are part of one of the 12 SCC in 0 ms
Free SCC test removed 12 places
Ensure Unique test removed 12 transitions
Reduce isomorphic transitions removed 12 transitions.
Reduce places removed 12 places and 0 transitions.
Ensure Unique test removed 11 transitions
Reduce isomorphic transitions removed 11 transitions.
Iterating post reduction 0 with 11 rules applied. Total rules applied 12 place count 55 transition count 40
Performed 14 Post agglomeration using F-continuation condition.Transition count delta: 14
Deduced a syphon composed of 14 places in 0 ms
Reduce places removed 28 places and 0 transitions.
Iterating global reduction 1 with 42 rules applied. Total rules applied 54 place count 27 transition count 26
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 1 with 10 rules applied. Total rules applied 64 place count 27 transition count 16
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 74 place count 17 transition count 16
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 76 place count 16 transition count 15
Applied a total of 76 rules in 5 ms. Remains 16 /79 variables (removed 63) and now considering 15/63 (removed 48) transitions.
// Phase 1: matrix 15 rows 16 cols
[2023-03-17 11:36:54] [INFO ] Computed 6 place invariants in 0 ms
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 16/79 places, 15/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 15 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
// Phase 1: matrix 63 rows 79 cols
[2023-03-17 11:36:54] [INFO ] Computed 32 place invariants in 1 ms
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 46 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 45 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 48 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 45 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 41 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 4 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 2 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 40 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
Starting structural reductions in LTL mode, iteration 0 : 79/79 places, 63/63 transitions.
Applied a total of 0 rules in 1 ms. Remains 79 /79 variables (removed 0) and now considering 63/63 (removed 0) transitions.
[2023-03-17 11:36:54] [INFO ] Invariant cache hit.
[2023-03-17 11:36:54] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 79/79 places, 63/63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Input system was already deterministic with 63 transitions.
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:36:54] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 11:36:54] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 79 places, 63 transitions and 188 arcs took 1 ms.
Total runtime 2373 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RefineWMG-PT-015015
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/372
CTLFireability

FORMULA RefineWMG-PT-015015-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-015015-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-015015-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-015015-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-015015-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679053323199

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/372/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/372/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/372/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
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lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
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lola: rewrite Frontend/Parser/formula_rewrite.k:299
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lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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lola: Rule S: 0 transitions removed,0 places removed
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lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:679
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 39 (type EXCL) for 9 RefineWMG-PT-015015-CTLFireability-04
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 39 (type EXCL) for RefineWMG-PT-015015-CTLFireability-04
lola: result : false
lola: markings : 242
lola: fired transitions : 623
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lola: memory pages used : 1
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lola: LAUNCH task # 22 (type EXCL) for 21 RefineWMG-PT-015015-CTLFireability-08
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lola: rewrite Frontend/Parser/formula_rewrite.k:815
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 22 (type EXCL) for RefineWMG-PT-015015-CTLFireability-08
lola: result : false
lola: markings : 8
lola: fired transitions : 17
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 RefineWMG-PT-015015-CTLFireability-07
lola: time limit : 327 sec
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lola: FINISHED task # 19 (type EXCL) for RefineWMG-PT-015015-CTLFireability-07
lola: result : false
lola: markings : 37
lola: fired transitions : 89
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 RefineWMG-PT-015015-CTLFireability-03
lola: time limit : 360 sec
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lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-015015-CTLFireability-04: SP ACTL false LTL model checker
RefineWMG-PT-015015-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-015015-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RefineWMG-PT-015015-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/360 12/32 RefineWMG-PT-015015-CTLFireability-03 2335871 m, 467174 m/sec, 5917510 t fired, .

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RefineWMG-PT-015015-CTLFireability-04: SP ACTL false LTL model checker
RefineWMG-PT-015015-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-015015-CTLFireability-08: CTL false CTL model checker

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RefineWMG-PT-015015-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
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RefineWMG-PT-015015-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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RefineWMG-PT-015015-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/360 23/32 RefineWMG-PT-015015-CTLFireability-03 4569992 m, 446824 m/sec, 11577276 t fired, .

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RefineWMG-PT-015015-CTLFireability-04: SP ACTL false LTL model checker
RefineWMG-PT-015015-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-015015-CTLFireability-08: CTL false CTL model checker

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RefineWMG-PT-015015-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-015015-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-015015-CTLFireability-04: SP ACTL false LTL model checker
RefineWMG-PT-015015-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-015015-CTLFireability-08: CTL false CTL model checker

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RefineWMG-PT-015015-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
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RefineWMG-PT-015015-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
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RefineWMG-PT-015015-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/398 1/32 RefineWMG-PT-015015-CTLFireability-15 169091 m, 33818 m/sec, 429407 t fired, .

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RefineWMG-PT-015015-CTLFireability-04: SP ACTL false LTL model checker
RefineWMG-PT-015015-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-015015-CTLFireability-08: CTL false CTL model checker

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RefineWMG-PT-015015-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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RefineWMG-PT-015015-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-015015-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 10/398 2/32 RefineWMG-PT-015015-CTLFireability-15 313822 m, 28946 m/sec, 793863 t fired, .

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RefineWMG-PT-015015-CTLFireability-04: SP ACTL false LTL model checker
RefineWMG-PT-015015-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-015015-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RefineWMG-PT-015015-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
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RefineWMG-PT-015015-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
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RefineWMG-PT-015015-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-015015-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 34 (type EXCL) for 33 RefineWMG-PT-015015-CTLFireability-14
lola: time limit : 416 sec
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lola: FINISHED task # 34 (type EXCL) for RefineWMG-PT-015015-CTLFireability-14
lola: result : true
lola: markings : 96
lola: fired transitions : 336
lola: time used : 0.000000
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lola: result : false
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/home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin//../BenchKit_head.sh: line 63: 530 Killed lola --conf=$BIN_DIR/configfiles/ctlfireabilityconf --formula=$DIR/CTLFireability.xml --verdictfile=$DIR/GenericPropertiesVerdict.xml $DIR/model.pnml

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-015015"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RefineWMG-PT-015015, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199800594"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-015015.tgz
mv RefineWMG-PT-015015 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;