Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199800586.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RefineWMG-PT-010011, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199800586
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 476K
-rw-r--r-- 1 mcc users 6.5K Feb 26 15:52 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 26 15:52 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 15:50 CTLFireability.txt
-rw-r--r-- 1 mcc users 70K Feb 26 15:50 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.6K Feb 26 15:52 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 103K Feb 26 15:52 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 15:52 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 71K Feb 26 15:52 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 24K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-00
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-01
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-02
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-03
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-04
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-05
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-06
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-07
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-08
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-09
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-10
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-11
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-12
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-13
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-14
FORMULA_NAME RefineWMG-PT-010011-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679052770100

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RefineWMG-PT-010011
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:32:51] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:32:51] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:32:51] [INFO ] Load time of PNML (sax parser for PT used): 29 ms
[2023-03-17 11:32:51] [INFO ] Transformed 54 places.
[2023-03-17 11:32:51] [INFO ] Transformed 43 transitions.
[2023-03-17 11:32:51] [INFO ] Parsed PT model containing 54 places and 43 transitions and 128 arcs in 86 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 12 ms.
Support contains 52 out of 54 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 10 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:32:51] [INFO ] Computed 22 place invariants in 8 ms
[2023-03-17 11:32:53] [INFO ] Dead Transitions using invariants and state equation in 1485 ms found 0 transitions.
[2023-03-17 11:32:53] [INFO ] Invariant cache hit.
[2023-03-17 11:32:53] [INFO ] Implicit Places using invariants in 27 ms returned []
[2023-03-17 11:32:53] [INFO ] Invariant cache hit.
[2023-03-17 11:32:53] [INFO ] Implicit Places using invariants and state equation in 62 ms returned []
Implicit Place search using SMT with State Equation took 90 ms to find 0 implicit places.
[2023-03-17 11:32:53] [INFO ] Invariant cache hit.
[2023-03-17 11:32:53] [INFO ] Dead Transitions using invariants and state equation in 48 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1657 ms. Remains : 54/54 places, 43/43 transitions.
Support contains 52 out of 54 places after structural reductions.
[2023-03-17 11:32:53] [INFO ] Flatten gal took : 21 ms
[2023-03-17 11:32:53] [INFO ] Flatten gal took : 8 ms
[2023-03-17 11:32:53] [INFO ] Input system was already deterministic with 43 transitions.
Incomplete random walk after 10009 steps, including 2 resets, run finished after 167 ms. (steps per millisecond=59 ) properties (out of 69) seen :66
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 3) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 2) seen :0
Running SMT prover for 2 properties.
[2023-03-17 11:32:53] [INFO ] Invariant cache hit.
[2023-03-17 11:32:53] [INFO ] [Real]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 11:32:53] [INFO ] After 52ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:1
[2023-03-17 11:32:54] [INFO ] [Nat]Absence check using 22 positive place invariants in 3 ms returned sat
[2023-03-17 11:32:54] [INFO ] After 23ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :1
[2023-03-17 11:32:54] [INFO ] After 37ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :1
Attempting to minimize the solution found.
Minimization took 7 ms.
[2023-03-17 11:32:54] [INFO ] After 79ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :1
Fused 2 Parikh solutions to 1 different solutions.
Finished Parikh walk after 78 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=39 )
Parikh walk visited 1 properties in 3 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 2 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Graph (trivial) has 22 edges and 54 vertex of which 14 / 54 are part of one of the 7 SCC in 3 ms
Free SCC test removed 7 places
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Reduce places removed 7 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 7 place count 40 transition count 30
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Deduced a syphon composed of 8 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 1 with 24 rules applied. Total rules applied 31 place count 24 transition count 22
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 4 rules applied. Total rules applied 35 place count 24 transition count 18
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 39 place count 20 transition count 18
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 39 place count 20 transition count 17
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 41 place count 19 transition count 17
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 43 place count 18 transition count 16
Applied a total of 43 rules in 12 ms. Remains 18 /54 variables (removed 36) and now considering 16/43 (removed 27) transitions.
// Phase 1: matrix 16 rows 18 cols
[2023-03-17 11:32:54] [INFO ] Computed 7 place invariants in 0 ms
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 18/54 places, 16/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
// Phase 1: matrix 43 rows 54 cols
[2023-03-17 11:32:54] [INFO ] Computed 22 place invariants in 1 ms
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 8 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 39 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 39 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 40 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 47 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 49 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 0 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
Starting structural reductions in LTL mode, iteration 0 : 54/54 places, 43/43 transitions.
Applied a total of 0 rules in 1 ms. Remains 54 /54 variables (removed 0) and now considering 43/43 (removed 0) transitions.
[2023-03-17 11:32:54] [INFO ] Invariant cache hit.
[2023-03-17 11:32:54] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 54/54 places, 43/43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Input system was already deterministic with 43 transitions.
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:32:54] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:32:54] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-17 11:32:54] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 54 places, 43 transitions and 128 arcs took 0 ms.
Total runtime 3374 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RefineWMG-PT-010011
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA RefineWMG-PT-010011-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010011-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010011-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010011-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010011-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-010011-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679053041701

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
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lola: rewrite Frontend/Parser/formula_rewrite.k:253
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lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
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lola: LAUNCH task # 4 (type EXCL) for 3 RefineWMG-PT-010011-CTLFireability-01
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RefineWMG-PT-010011-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/224 11/32 RefineWMG-PT-010011-CTLFireability-01 2487832 m, 497566 m/sec, 6332624 t fired, .

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RefineWMG-PT-010011-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/224 21/32 RefineWMG-PT-010011-CTLFireability-01 4882338 m, 478901 m/sec, 12427722 t fired, .

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RefineWMG-PT-010011-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/224 30/32 RefineWMG-PT-010011-CTLFireability-01 7215040 m, 466540 m/sec, 18365516 t fired, .

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RefineWMG-PT-010011-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-010011-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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lola: result : false
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-010011-CTLFireability-13: CTL false CTL model checker
RefineWMG-PT-010011-CTLFireability-14: CTL true CTL model checker
RefineWMG-PT-010011-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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10 CTL EXCL 20/1129 29/32 RefineWMG-PT-010011-CTLFireability-03 6649252 m, 338169 m/sec, 25401565 t fired, .

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RefineWMG-PT-010011-CTLFireability-13: CTL false CTL model checker
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1 CTL EXCL 5/1682 7/32 RefineWMG-PT-010011-CTLFireability-00 1647410 m, 329482 m/sec, 4062474 t fired, .

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1 CTL EXCL 10/1682 14/32 RefineWMG-PT-010011-CTLFireability-00 3251526 m, 320823 m/sec, 7820353 t fired, .

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1 CTL EXCL 15/1682 20/32 RefineWMG-PT-010011-CTLFireability-00 4867617 m, 323218 m/sec, 11600615 t fired, .

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RefineWMG-PT-010011-CTLFireability-13: CTL false CTL model checker
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1 CTL EXCL 20/1682 27/32 RefineWMG-PT-010011-CTLFireability-00 6500793 m, 326635 m/sec, 15461314 t fired, .

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1 CTL EXCL 25/1682 32/32 RefineWMG-PT-010011-CTLFireability-00 7877713 m, 275384 m/sec, 20228374 t fired, .

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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-010011-CTLFireability-00: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-01: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-02: CTL true CTL model checker
RefineWMG-PT-010011-CTLFireability-03: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-04: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-05: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-06: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-07: CTL false CTL model checker
RefineWMG-PT-010011-CTLFireability-08: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-09: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-10: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-11: CTL true CTL model checker
RefineWMG-PT-010011-CTLFireability-12: CTL unknown AGGR
RefineWMG-PT-010011-CTLFireability-13: CTL false CTL model checker
RefineWMG-PT-010011-CTLFireability-14: CTL true CTL model checker
RefineWMG-PT-010011-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-010011"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RefineWMG-PT-010011, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199800586"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-010011.tgz
mv RefineWMG-PT-010011 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;