About the Execution of LoLa+red for RefineWMG-PT-007008
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 5077.619 | 79652.00 | 73874.00 | 544.70 | ?TTTTFFTF?T?T?TT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199800570.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RefineWMG-PT-007008, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199800570
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 468K
-rw-r--r-- 1 mcc users 7.5K Feb 26 16:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 85K Feb 26 16:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 26 15:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 15:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 30K Feb 25 16:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 26 16:01 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 114K Feb 26 16:01 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 26 16:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 61K Feb 26 16:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 18K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-00
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-01
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-02
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-03
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-04
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-05
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-06
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-07
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-08
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-09
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-10
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-11
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-12
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-13
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-14
FORMULA_NAME RefineWMG-PT-007008-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679052559194
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RefineWMG-PT-007008
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:29:20] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:29:20] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:29:20] [INFO ] Load time of PNML (sax parser for PT used): 27 ms
[2023-03-17 11:29:20] [INFO ] Transformed 39 places.
[2023-03-17 11:29:20] [INFO ] Transformed 31 transitions.
[2023-03-17 11:29:20] [INFO ] Parsed PT model containing 39 places and 31 transitions and 92 arcs in 102 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 37 out of 39 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 11 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
// Phase 1: matrix 31 rows 39 cols
[2023-03-17 11:29:21] [INFO ] Computed 16 place invariants in 5 ms
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 137 ms found 0 transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Implicit Places using invariants in 33 ms returned []
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Implicit Places using invariants and state equation in 53 ms returned []
Implicit Place search using SMT with State Equation took 88 ms to find 0 implicit places.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 313 ms. Remains : 39/39 places, 31/31 transitions.
Support contains 37 out of 39 places after structural reductions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 16 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 6 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Incomplete random walk after 10003 steps, including 2 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 44) seen :43
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] After 28ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 1 atomic propositions for a total of 16 simplifications.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 5 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 10 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 36 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 38 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 34 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 40 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 41 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:21] [INFO ] Invariant cache hit.
[2023-03-17 11:29:21] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 32 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:21] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:21] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Graph (trivial) has 18 edges and 39 vertex of which 12 / 39 are part of one of the 6 SCC in 2 ms
Free SCC test removed 6 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 6 place count 27 transition count 20
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 1 with 18 rules applied. Total rules applied 24 place count 15 transition count 14
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 3 rules applied. Total rules applied 27 place count 15 transition count 11
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 30 place count 12 transition count 11
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 30 place count 12 transition count 10
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 32 place count 11 transition count 10
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 34 place count 10 transition count 9
Applied a total of 34 rules in 11 ms. Remains 10 /39 variables (removed 29) and now considering 9/31 (removed 22) transitions.
// Phase 1: matrix 9 rows 10 cols
[2023-03-17 11:29:22] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 20 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 10/39 places, 9/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 9 transitions.
Finished random walk after 61 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=61 )
FORMULA RefineWMG-PT-007008-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
// Phase 1: matrix 31 rows 39 cols
[2023-03-17 11:29:22] [INFO ] Computed 16 place invariants in 1 ms
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Graph (trivial) has 20 edges and 39 vertex of which 14 / 39 are part of one of the 7 SCC in 0 ms
Free SCC test removed 7 places
Ensure Unique test removed 7 transitions
Reduce isomorphic transitions removed 7 transitions.
Reduce places removed 7 places and 0 transitions.
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 7 place count 25 transition count 18
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 1 with 18 rules applied. Total rules applied 25 place count 13 transition count 12
Drop transitions removed 4 transitions
Trivial Post-agglo rules discarded 4 transitions
Performed 4 trivial Post agglomeration. Transition count delta: 4
Iterating post reduction 1 with 4 rules applied. Total rules applied 29 place count 13 transition count 8
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 33 place count 9 transition count 8
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 33 place count 9 transition count 7
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 35 place count 8 transition count 7
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 37 place count 7 transition count 6
Applied a total of 37 rules in 3 ms. Remains 7 /39 variables (removed 32) and now considering 6/31 (removed 25) transitions.
// Phase 1: matrix 6 rows 7 cols
[2023-03-17 11:29:22] [INFO ] Computed 3 place invariants in 1 ms
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 7/39 places, 6/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 6 transitions.
Finished random walk after 5 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=5 )
FORMULA RefineWMG-PT-007008-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 2 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
// Phase 1: matrix 31 rows 39 cols
[2023-03-17 11:29:22] [INFO ] Computed 16 place invariants in 1 ms
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 30 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:22] [INFO ] Invariant cache hit.
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 29 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:22] [INFO ] Invariant cache hit.
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 27 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:22] [INFO ] Invariant cache hit.
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:22] [INFO ] Invariant cache hit.
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 37 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in LTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Applied a total of 0 rules in 1 ms. Remains 39 /39 variables (removed 0) and now considering 31/31 (removed 0) transitions.
[2023-03-17 11:29:22] [INFO ] Invariant cache hit.
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 28 ms. Remains : 39/39 places, 31/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 31 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 39/39 places, 31/31 transitions.
Graph (trivial) has 18 edges and 39 vertex of which 12 / 39 are part of one of the 6 SCC in 0 ms
Free SCC test removed 6 places
Ensure Unique test removed 6 transitions
Reduce isomorphic transitions removed 6 transitions.
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 6 place count 27 transition count 20
Performed 6 Post agglomeration using F-continuation condition.Transition count delta: 6
Deduced a syphon composed of 6 places in 0 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 1 with 18 rules applied. Total rules applied 24 place count 15 transition count 14
Drop transitions removed 3 transitions
Trivial Post-agglo rules discarded 3 transitions
Performed 3 trivial Post agglomeration. Transition count delta: 3
Iterating post reduction 1 with 3 rules applied. Total rules applied 27 place count 15 transition count 11
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 2 with 3 rules applied. Total rules applied 30 place count 12 transition count 11
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 30 place count 12 transition count 10
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 32 place count 11 transition count 10
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 34 place count 10 transition count 9
Applied a total of 34 rules in 3 ms. Remains 10 /39 variables (removed 29) and now considering 9/31 (removed 22) transitions.
// Phase 1: matrix 9 rows 10 cols
[2023-03-17 11:29:22] [INFO ] Computed 4 place invariants in 1 ms
[2023-03-17 11:29:22] [INFO ] Dead Transitions using invariants and state equation in 17 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 20 ms. Remains : 10/39 places, 9/31 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:29:22] [INFO ] Input system was already deterministic with 9 transitions.
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:29:22] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 11:29:22] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 39 places, 31 transitions and 92 arcs took 0 ms.
Total runtime 1758 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RefineWMG-PT-007008
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA RefineWMG-PT-007008-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA RefineWMG-PT-007008-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679052638846
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 10 (type EXCL) for 9 RefineWMG-PT-007008-CTLFireability-03
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for RefineWMG-PT-007008-CTLFireability-03
lola: result : true
lola: markings : 135
lola: fired transitions : 205
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 25 (type EXCL) for 24 RefineWMG-PT-007008-CTLFireability-10
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 25 (type EXCL) for RefineWMG-PT-007008-CTLFireability-10
lola: result : true
lola: markings : 222
lola: fired transitions : 573
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 39 (type EXCL) for 36 RefineWMG-PT-007008-CTLFireability-14
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 39 (type EXCL) for RefineWMG-PT-007008-CTLFireability-14
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 RefineWMG-PT-007008-CTLFireability-13
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RefineWMG-PT-007008-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 5/327 12/32 RefineWMG-PT-007008-CTLFireability-13 2901930 m, 580386 m/sec, 7905943 t fired, .
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
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RefineWMG-PT-007008-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 CTL EXCL 10/327 24/32 RefineWMG-PT-007008-CTLFireability-13 5945936 m, 608801 m/sec, 15617171 t fired, .
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RefineWMG-PT-007008-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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lola: time limit : 358 sec
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lola: FINISHED task # 31 (type EXCL) for RefineWMG-PT-007008-CTLFireability-12
lola: result : true
lola: markings : 1815690
lola: fired transitions : 3309384
lola: time used : 4.000000
lola: memory pages used : 8
lola: LAUNCH task # 28 (type EXCL) for 27 RefineWMG-PT-007008-CTLFireability-11
lola: time limit : 397 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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RefineWMG-PT-007008-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
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28 CTL EXCL 1/397 3/32 RefineWMG-PT-007008-CTLFireability-11 709096 m, 141819 m/sec, 1796898 t fired, .
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
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RefineWMG-PT-007008-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-007008-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 6/397 14/32 RefineWMG-PT-007008-CTLFireability-11 3438555 m, 545891 m/sec, 9388270 t fired, .
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RefineWMG-PT-007008-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
RefineWMG-PT-007008-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
RefineWMG-PT-007008-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 11/397 26/32 RefineWMG-PT-007008-CTLFireability-11 6221348 m, 556558 m/sec, 16673814 t fired, .
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RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
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lola: result : true
lola: markings : 762371
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-007008-CTLFireability-01: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-02: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-04: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-05: CTL false CTL model checker
RefineWMG-PT-007008-CTLFireability-07: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-04: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-05: CTL false CTL model checker
RefineWMG-PT-007008-CTLFireability-07: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-04: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-05: CTL false CTL model checker
RefineWMG-PT-007008-CTLFireability-07: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-04: CTL true CTL model checker
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RefineWMG-PT-007008-CTLFireability-07: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
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RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-04: CTL true CTL model checker
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RefineWMG-PT-007008-CTLFireability-07: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-007008-CTLFireability-00: CTL unknown AGGR
RefineWMG-PT-007008-CTLFireability-01: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-02: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-03: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-04: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-05: CTL false CTL model checker
RefineWMG-PT-007008-CTLFireability-07: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-09: CTL unknown AGGR
RefineWMG-PT-007008-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-11: CTL unknown AGGR
RefineWMG-PT-007008-CTLFireability-12: CTL true CTL model checker
RefineWMG-PT-007008-CTLFireability-13: CTL unknown AGGR
RefineWMG-PT-007008-CTLFireability-14: DISJ true state space /EXEF
RefineWMG-PT-007008-CTLFireability-15: CTL true CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-007008"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RefineWMG-PT-007008, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199800570"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-007008.tgz
mv RefineWMG-PT-007008 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;