Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199700538.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RefineWMG-PT-002003, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199700538
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 6.0K Feb 26 16:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 26 16:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.2K Feb 26 16:02 CTLFireability.txt
-rw-r--r-- 1 mcc users 34K Feb 26 16:02 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 5.9K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:43 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:43 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:43 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:43 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 16:04 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 148K Feb 26 16:04 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.5K Feb 26 16:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 74K Feb 26 16:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:43 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:43 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 7 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 6.9K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-00
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-01
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-02
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-03
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-04
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-05
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-06
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-07
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-08
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-09
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-10
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-11
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-12
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-13
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-14
FORMULA_NAME RefineWMG-PT-002003-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679052224005

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RefineWMG-PT-002003
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 11:23:45] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 11:23:45] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 11:23:45] [INFO ] Load time of PNML (sax parser for PT used): 20 ms
[2023-03-17 11:23:45] [INFO ] Transformed 14 places.
[2023-03-17 11:23:45] [INFO ] Transformed 11 transitions.
[2023-03-17 11:23:45] [INFO ] Parsed PT model containing 14 places and 11 transitions and 32 arcs in 82 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 8 ms.
Initial state reduction rules removed 2 formulas.
FORMULA RefineWMG-PT-002003-CTLFireability-07 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RefineWMG-PT-002003-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 14 out of 14 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 9 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 14 cols
[2023-03-17 11:23:45] [INFO ] Computed 6 place invariants in 7 ms
[2023-03-17 11:23:45] [INFO ] Dead Transitions using invariants and state equation in 145 ms found 0 transitions.
[2023-03-17 11:23:45] [INFO ] Invariant cache hit.
[2023-03-17 11:23:45] [INFO ] Implicit Places using invariants in 26 ms returned []
[2023-03-17 11:23:45] [INFO ] Invariant cache hit.
[2023-03-17 11:23:45] [INFO ] Implicit Places using invariants and state equation in 32 ms returned []
Implicit Place search using SMT with State Equation took 60 ms to find 0 implicit places.
[2023-03-17 11:23:45] [INFO ] Invariant cache hit.
[2023-03-17 11:23:45] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 265 ms. Remains : 14/14 places, 11/11 transitions.
Support contains 14 out of 14 places after structural reductions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 13 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Incomplete random walk after 10001 steps, including 2 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 22) seen :21
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 1) seen :0
Running SMT prover for 1 properties.
[2023-03-17 11:23:46] [INFO ] Invariant cache hit.
[2023-03-17 11:23:46] [INFO ] After 27ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0
Fused 1 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 1 atomic propositions for a total of 14 simplifications.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 3 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Graph (trivial) has 6 edges and 14 vertex of which 4 / 14 are part of one of the 2 SCC in 1 ms
Free SCC test removed 2 places
Ensure Unique test removed 2 transitions
Reduce isomorphic transitions removed 2 transitions.
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 1 rules applied. Total rules applied 2 place count 10 transition count 8
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 1 with 6 rules applied. Total rules applied 8 place count 6 transition count 6
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 8 place count 6 transition count 5
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 10 place count 5 transition count 5
Applied a total of 10 rules in 8 ms. Remains 5 /14 variables (removed 9) and now considering 5/11 (removed 6) transitions.
// Phase 1: matrix 5 rows 5 cols
[2023-03-17 11:23:46] [INFO ] Computed 2 place invariants in 0 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 5/14 places, 5/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 14 cols
[2023-03-17 11:23:46] [INFO ] Computed 6 place invariants in 1 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 31 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
[2023-03-17 11:23:46] [INFO ] Invariant cache hit.
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 25 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 12 transition count 10
Applied a total of 3 rules in 1 ms. Remains 12 /14 variables (removed 2) and now considering 10/11 (removed 1) transitions.
// Phase 1: matrix 10 rows 12 cols
[2023-03-17 11:23:46] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 29 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 31 ms. Remains : 12/14 places, 10/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Graph (trivial) has 2 edges and 14 vertex of which 2 / 14 are part of one of the 1 SCC in 0 ms
Free SCC test removed 1 places
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Reduce places removed 1 places and 0 transitions.
Applied a total of 1 rules in 1 ms. Remains 12 /14 variables (removed 2) and now considering 10/11 (removed 1) transitions.
// Phase 1: matrix 10 rows 12 cols
[2023-03-17 11:23:46] [INFO ] Computed 5 place invariants in 1 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 26 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 12/14 places, 10/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 0 with 6 rules applied. Total rules applied 6 place count 10 transition count 9
Applied a total of 6 rules in 1 ms. Remains 10 /14 variables (removed 4) and now considering 9/11 (removed 2) transitions.
// Phase 1: matrix 9 rows 10 cols
[2023-03-17 11:23:46] [INFO ] Computed 4 place invariants in 0 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 24 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 10/14 places, 9/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 14 cols
[2023-03-17 11:23:46] [INFO ] Computed 6 place invariants in 1 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 22 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
[2023-03-17 11:23:46] [INFO ] Invariant cache hit.
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 32 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 33 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Graph (trivial) has 3 edges and 14 vertex of which 2 / 14 are part of one of the 1 SCC in 5 ms
Free SCC test removed 1 places
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Reduce places removed 1 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 4 place count 10 transition count 9
Applied a total of 4 rules in 6 ms. Remains 10 /14 variables (removed 4) and now considering 9/11 (removed 2) transitions.
// Phase 1: matrix 9 rows 10 cols
[2023-03-17 11:23:46] [INFO ] Computed 4 place invariants in 0 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 19 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 26 ms. Remains : 10/14 places, 9/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 0 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 14 cols
[2023-03-17 11:23:46] [INFO ] Computed 6 place invariants in 0 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 34 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 35 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
[2023-03-17 11:23:46] [INFO ] Invariant cache hit.
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 28 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 31 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 0 with 3 rules applied. Total rules applied 3 place count 12 transition count 10
Applied a total of 3 rules in 1 ms. Remains 12 /14 variables (removed 2) and now considering 10/11 (removed 1) transitions.
// Phase 1: matrix 10 rows 12 cols
[2023-03-17 11:23:46] [INFO ] Computed 5 place invariants in 0 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 33 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 41 ms. Remains : 12/14 places, 10/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
// Phase 1: matrix 11 rows 14 cols
[2023-03-17 11:23:46] [INFO ] Computed 6 place invariants in 1 ms
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 21 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 23 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 11/11 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 11/11 (removed 0) transitions.
[2023-03-17 11:23:46] [INFO ] Invariant cache hit.
[2023-03-17 11:23:46] [INFO ] Dead Transitions using invariants and state equation in 22 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 24 ms. Remains : 14/14 places, 11/11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Input system was already deterministic with 11 transitions.
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 2 ms
[2023-03-17 11:23:46] [INFO ] Flatten gal took : 1 ms
[2023-03-17 11:23:46] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 11:23:46] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 14 places, 11 transitions and 32 arcs took 0 ms.
Total runtime 1455 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RefineWMG-PT-002003
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA RefineWMG-PT-002003-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA RefineWMG-PT-002003-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679052230232

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:463
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 10 (type EXCL) for 9 RefineWMG-PT-002003-CTLFireability-03
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 10 (type EXCL) for RefineWMG-PT-002003-CTLFireability-03
lola: result : false
lola: markings : 1394
lola: fired transitions : 3715
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 RefineWMG-PT-002003-CTLFireability-08
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for RefineWMG-PT-002003-CTLFireability-08
lola: result : true
lola: markings : 4
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 RefineWMG-PT-002003-CTLFireability-06
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 19 (type EXCL) for RefineWMG-PT-002003-CTLFireability-06
lola: result : false
lola: markings : 184320
lola: fired transitions : 1347584
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 RefineWMG-PT-002003-CTLFireability-15
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for RefineWMG-PT-002003-CTLFireability-15
lola: result : true
lola: markings : 184320
lola: fired transitions : 2324992
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 RefineWMG-PT-002003-CTLFireability-14
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for RefineWMG-PT-002003-CTLFireability-14
lola: result : true
lola: markings : 184320
lola: fired transitions : 1323778
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 RefineWMG-PT-002003-CTLFireability-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for RefineWMG-PT-002003-CTLFireability-11
lola: result : true
lola: markings : 49
lola: fired transitions : 55
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 RefineWMG-PT-002003-CTLFireability-10
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for RefineWMG-PT-002003-CTLFireability-10
lola: result : true
lola: markings : 80
lola: fired transitions : 103
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 RefineWMG-PT-002003-CTLFireability-02
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for RefineWMG-PT-002003-CTLFireability-02
lola: result : true
lola: markings : 121
lola: fired transitions : 303
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 RefineWMG-PT-002003-CTLFireability-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for RefineWMG-PT-002003-CTLFireability-01
lola: result : true
lola: markings : 5874
lola: fired transitions : 13626
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 RefineWMG-PT-002003-CTLFireability-00
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for RefineWMG-PT-002003-CTLFireability-00
lola: result : false
lola: markings : 10
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 RefineWMG-PT-002003-CTLFireability-09
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for RefineWMG-PT-002003-CTLFireability-09
lola: result : true
lola: markings : 11520
lola: fired transitions : 57860
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 RefineWMG-PT-002003-CTLFireability-05
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for RefineWMG-PT-002003-CTLFireability-05
lola: result : true
lola: markings : 3545
lola: fired transitions : 20420
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 RefineWMG-PT-002003-CTLFireability-04
lola: time limit : 1798 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for RefineWMG-PT-002003-CTLFireability-04
lola: result : true
lola: markings : 14165
lola: fired transitions : 85931
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 RefineWMG-PT-002003-CTLFireability-12
lola: time limit : 3597 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for RefineWMG-PT-002003-CTLFireability-12
lola: result : false
lola: markings : 35
lola: fired transitions : 108
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RefineWMG-PT-002003-CTLFireability-00: AFAG false CTL model checker
RefineWMG-PT-002003-CTLFireability-01: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-02: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-03: CTL false CTL model checker
RefineWMG-PT-002003-CTLFireability-04: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-05: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-06: CTL false CTL model checker
RefineWMG-PT-002003-CTLFireability-08: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-09: AGEF true tscc_search
RefineWMG-PT-002003-CTLFireability-10: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-11: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-12: CTL false CTL model checker
RefineWMG-PT-002003-CTLFireability-14: CTL true CTL model checker
RefineWMG-PT-002003-CTLFireability-15: CTL true CTL model checker


Time elapsed: 3 secs. Pages in use: 1

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RefineWMG-PT-002003"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RefineWMG-PT-002003, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199700538"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RefineWMG-PT-002003.tgz
mv RefineWMG-PT-002003 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;