About the Execution of LoLa+red for Referendum-PT-0200
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 1486.168 | 299903.00 | 307580.00 | 2449.60 | T?FTFFTTFFTFTT?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199700506.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Referendum-PT-0200, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199700506
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 7.8M
-rw-r--r-- 1 mcc users 200K Feb 26 17:48 CTLCardinality.txt
-rw-r--r-- 1 mcc users 966K Feb 26 17:48 CTLCardinality.xml
-rw-r--r-- 1 mcc users 67K Feb 26 17:36 CTLFireability.txt
-rw-r--r-- 1 mcc users 500K Feb 26 17:36 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 96K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 331K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 44K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 230K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 529K Feb 26 18:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 2.5M Feb 26 18:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 253K Feb 26 17:58 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 1.9M Feb 26 17:58 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 24K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 58K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 228K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-PT-0200-CTLFireability-00
FORMULA_NAME Referendum-PT-0200-CTLFireability-01
FORMULA_NAME Referendum-PT-0200-CTLFireability-02
FORMULA_NAME Referendum-PT-0200-CTLFireability-03
FORMULA_NAME Referendum-PT-0200-CTLFireability-04
FORMULA_NAME Referendum-PT-0200-CTLFireability-05
FORMULA_NAME Referendum-PT-0200-CTLFireability-06
FORMULA_NAME Referendum-PT-0200-CTLFireability-07
FORMULA_NAME Referendum-PT-0200-CTLFireability-08
FORMULA_NAME Referendum-PT-0200-CTLFireability-09
FORMULA_NAME Referendum-PT-0200-CTLFireability-10
FORMULA_NAME Referendum-PT-0200-CTLFireability-11
FORMULA_NAME Referendum-PT-0200-CTLFireability-12
FORMULA_NAME Referendum-PT-0200-CTLFireability-13
FORMULA_NAME Referendum-PT-0200-CTLFireability-14
FORMULA_NAME Referendum-PT-0200-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679050546987
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Referendum-PT-0200
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 10:55:48] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:55:48] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:55:48] [INFO ] Load time of PNML (sax parser for PT used): 64 ms
[2023-03-17 10:55:48] [INFO ] Transformed 601 places.
[2023-03-17 10:55:48] [INFO ] Transformed 401 transitions.
[2023-03-17 10:55:48] [INFO ] Found NUPN structural information;
[2023-03-17 10:55:48] [INFO ] Parsed PT model containing 601 places and 401 transitions and 1001 arcs in 126 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 24 ms.
Support contains 201 out of 601 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 601/601 places, 401/401 transitions.
Reduce places removed 400 places and 0 transitions.
Ensure Unique test removed 200 transitions
Reduce isomorphic transitions removed 200 transitions.
Iterating post reduction 0 with 600 rules applied. Total rules applied 600 place count 201 transition count 201
Applied a total of 600 rules in 11 ms. Remains 201 /601 variables (removed 400) and now considering 201/401 (removed 200) transitions.
// Phase 1: matrix 201 rows 201 cols
[2023-03-17 10:55:48] [INFO ] Computed 0 place invariants in 11 ms
[2023-03-17 10:55:49] [INFO ] Implicit Places using invariants in 386 ms returned []
[2023-03-17 10:55:49] [INFO ] Invariant cache hit.
[2023-03-17 10:55:49] [INFO ] Implicit Places using invariants and state equation in 124 ms returned []
Implicit Place search using SMT with State Equation took 534 ms to find 0 implicit places.
[2023-03-17 10:55:49] [INFO ] Invariant cache hit.
[2023-03-17 10:55:49] [INFO ] Dead Transitions using invariants and state equation in 130 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 201/601 places, 201/401 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 678 ms. Remains : 201/601 places, 201/401 transitions.
Support contains 201 out of 201 places after structural reductions.
[2023-03-17 10:55:49] [INFO ] Flatten gal took : 63 ms
[2023-03-17 10:55:49] [INFO ] Flatten gal took : 35 ms
[2023-03-17 10:55:50] [INFO ] Input system was already deterministic with 201 transitions.
Incomplete random walk after 10000 steps, including 49 resets, run finished after 450 ms. (steps per millisecond=22 ) properties (out of 33) seen :28
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 122 ms. (steps per millisecond=81 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 212 ms. (steps per millisecond=47 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 159 ms. (steps per millisecond=62 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 95 ms. (steps per millisecond=105 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-17 10:55:51] [INFO ] Invariant cache hit.
[2023-03-17 10:55:52] [INFO ] After 570ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:2
[2023-03-17 10:55:52] [INFO ] After 587ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 5 atomic propositions for a total of 15 simplifications.
[2023-03-17 10:55:52] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-17 10:55:52] [INFO ] Flatten gal took : 30 ms
FORMULA Referendum-PT-0200-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Referendum-PT-0200-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 26 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 201 transitions.
Computed a total of 201 stabilizing places and 201 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 201 transition count 201
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 3 formulas.
FORMULA Referendum-PT-0200-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Applied a total of 0 rules in 2 ms. Remains 201 /201 variables (removed 0) and now considering 201/201 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 201/201 places, 201/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 13 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 12 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 201 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Applied a total of 0 rules in 1 ms. Remains 201 /201 variables (removed 0) and now considering 201/201 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 201/201 places, 201/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 13 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 15 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 201 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 199 places :
Symmetric choice reduction at 0 with 199 rule applications. Total rules 199 place count 2 transition count 2
Iterating global reduction 0 with 199 rules applied. Total rules applied 398 place count 2 transition count 2
Applied a total of 398 rules in 8 ms. Remains 2 /201 variables (removed 199) and now considering 2/201 (removed 199) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 2/201 places, 2/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 199 places :
Symmetric choice reduction at 0 with 199 rule applications. Total rules 199 place count 2 transition count 2
Iterating global reduction 0 with 199 rules applied. Total rules applied 398 place count 2 transition count 2
Applied a total of 398 rules in 4 ms. Remains 2 /201 variables (removed 199) and now considering 2/201 (removed 199) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 2/201 places, 2/201 transitions.
[2023-03-17 10:55:53] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
FORMULA Referendum-PT-0200-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 199 places :
Symmetric choice reduction at 0 with 199 rule applications. Total rules 199 place count 2 transition count 2
Iterating global reduction 0 with 199 rules applied. Total rules applied 398 place count 2 transition count 2
Applied a total of 398 rules in 4 ms. Remains 2 /201 variables (removed 199) and now considering 2/201 (removed 199) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 2/201 places, 2/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 193 places :
Symmetric choice reduction at 0 with 193 rule applications. Total rules 193 place count 8 transition count 8
Iterating global reduction 0 with 193 rules applied. Total rules applied 386 place count 8 transition count 8
Applied a total of 386 rules in 3 ms. Remains 8 /201 variables (removed 193) and now considering 8/201 (removed 193) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 8/201 places, 8/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 190 places :
Symmetric choice reduction at 0 with 190 rule applications. Total rules 190 place count 11 transition count 11
Iterating global reduction 0 with 190 rules applied. Total rules applied 380 place count 11 transition count 11
Applied a total of 380 rules in 4 ms. Remains 11 /201 variables (removed 190) and now considering 11/201 (removed 190) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 11/201 places, 11/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 196 places :
Symmetric choice reduction at 0 with 196 rule applications. Total rules 196 place count 5 transition count 5
Iterating global reduction 0 with 196 rules applied. Total rules applied 392 place count 5 transition count 5
Applied a total of 392 rules in 4 ms. Remains 5 /201 variables (removed 196) and now considering 5/201 (removed 196) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 5/201 places, 5/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 197 places :
Symmetric choice reduction at 0 with 197 rule applications. Total rules 197 place count 4 transition count 4
Iterating global reduction 0 with 197 rules applied. Total rules applied 394 place count 4 transition count 4
Applied a total of 394 rules in 3 ms. Remains 4 /201 variables (removed 197) and now considering 4/201 (removed 197) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 4/201 places, 4/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 197 places :
Symmetric choice reduction at 0 with 197 rule applications. Total rules 197 place count 4 transition count 4
Iterating global reduction 0 with 197 rules applied. Total rules applied 394 place count 4 transition count 4
Applied a total of 394 rules in 2 ms. Remains 4 /201 variables (removed 197) and now considering 4/201 (removed 197) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 4/201 places, 4/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 198 places :
Symmetric choice reduction at 0 with 198 rule applications. Total rules 198 place count 3 transition count 3
Iterating global reduction 0 with 198 rules applied. Total rules applied 396 place count 3 transition count 3
Applied a total of 396 rules in 2 ms. Remains 3 /201 variables (removed 198) and now considering 3/201 (removed 198) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 3/201 places, 3/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 197 places :
Symmetric choice reduction at 0 with 197 rule applications. Total rules 197 place count 4 transition count 4
Iterating global reduction 0 with 197 rules applied. Total rules applied 394 place count 4 transition count 4
Applied a total of 394 rules in 3 ms. Remains 4 /201 variables (removed 197) and now considering 4/201 (removed 197) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 4/201 places, 4/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 4 transitions.
Starting structural reductions in LTL mode, iteration 0 : 201/201 places, 201/201 transitions.
Discarding 197 places :
Symmetric choice reduction at 0 with 197 rule applications. Total rules 197 place count 4 transition count 4
Iterating global reduction 0 with 197 rules applied. Total rules applied 394 place count 4 transition count 4
Applied a total of 394 rules in 2 ms. Remains 4 /201 variables (removed 197) and now considering 4/201 (removed 197) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 4/201 places, 4/201 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:55:53] [INFO ] Input system was already deterministic with 4 transitions.
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 16 ms
[2023-03-17 10:55:53] [INFO ] Flatten gal took : 15 ms
[2023-03-17 10:55:53] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 8 ms.
[2023-03-17 10:55:53] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 201 places, 201 transitions and 401 arcs took 1 ms.
Total runtime 5049 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Referendum-PT-0200
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA Referendum-PT-0200-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Referendum-PT-0200-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679050846890
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:730
lola: LAUNCH task # 36 (type SKEL/SRCH) for 3 Referendum-PT-0200-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 36 (type SKEL/SRCH) for Referendum-PT-0200-CTLFireability-02
lola: result : false
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 37 (type SKEL/SRCH) for 21 Referendum-PT-0200-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 28 (type EXCL) for 27 Referendum-PT-0200-CTLFireability-13
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 37 (type SKEL/SRCH) for Referendum-PT-0200-CTLFireability-11
lola: result : false
lola: markings : 202
lola: fired transitions : 403
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 28 (type EXCL) for Referendum-PT-0200-CTLFireability-13
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 Referendum-PT-0200-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: planning for Referendum-PT-0200-CTLFireability-02 stopped (result already fixed).
lola: Created skeleton in 0.000000 secs.
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:754
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 34 (type EXCL) for Referendum-PT-0200-CTLFireability-15
lola: result : false
lola: markings : 20101
lola: fired transitions : 40202
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 0 Referendum-PT-0200-CTLFireability-01
lola: time limit : 449 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-PT-0200-CTLFireability-02: EFEG false skeleton: state space /EFEG
Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0200-CTLFireability-01: AXAF 0 0 1 0 1 0 0 0
Referendum-PT-0200-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 EXEG EXCL 5/449 2/32 Referendum-PT-0200-CTLFireability-01 373136 m, 74627 m/sec, 3381247 t fired, .
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Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0200-CTLFireability-01: AXAF 0 0 1 0 1 0 0 0
Referendum-PT-0200-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 EXEG EXCL 10/449 4/32 Referendum-PT-0200-CTLFireability-01 709994 m, 67371 m/sec, 6754130 t fired, .
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Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0200-CTLFireability-01: AXAF 0 0 1 0 1 0 0 0
Referendum-PT-0200-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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38 EXEG EXCL 15/449 6/32 Referendum-PT-0200-CTLFireability-01 1018999 m, 61801 m/sec, 10108272 t fired, .
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Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0200-CTLFireability-01: AXAF 0 0 1 0 1 0 0 0
Referendum-PT-0200-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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38 EXEG EXCL 20/449 7/32 Referendum-PT-0200-CTLFireability-01 1334373 m, 63074 m/sec, 13320390 t fired, .
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Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0200-CTLFireability-01: AXAF 0 0 1 0 1 0 0 0
Referendum-PT-0200-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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38 EXEG EXCL 25/449 9/32 Referendum-PT-0200-CTLFireability-01 1631580 m, 59441 m/sec, 16563908 t fired, .
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Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Referendum-PT-0200-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
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38 EXEG EXCL 30/449 10/32 Referendum-PT-0200-CTLFireability-01 1920461 m, 57776 m/sec, 19811476 t fired, .
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Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
Referendum-PT-0200-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0200-CTLFireability-01: AXAF 0 0 1 0 1 0 0 0
Referendum-PT-0200-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
Referendum-PT-0200-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
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38 EXEG EXCL 35/449 12/32 Referendum-PT-0200-CTLFireability-01 2205672 m, 57042 m/sec, 23016309 t fired, .
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38 EXEG EXCL 40/449 13/32 Referendum-PT-0200-CTLFireability-01 2506637 m, 60193 m/sec, 26177915 t fired, .
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Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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38 EXEG EXCL 45/449 15/32 Referendum-PT-0200-CTLFireability-01 2779797 m, 54632 m/sec, 29177857 t fired, .
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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38 EXEG EXCL 50/449 16/32 Referendum-PT-0200-CTLFireability-01 3047556 m, 53551 m/sec, 32292243 t fired, .
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38 EXEG EXCL 55/449 17/32 Referendum-PT-0200-CTLFireability-01 3323801 m, 55249 m/sec, 35425818 t fired, .
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38 EXEG EXCL 60/449 19/32 Referendum-PT-0200-CTLFireability-01 3590815 m, 53402 m/sec, 38548075 t fired, .
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lola: LAUNCH task # 25 (type EXCL) for 24 Referendum-PT-0200-CTLFireability-12
lola: time limit : 551 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for Referendum-PT-0200-CTLFireability-12
lola: result : true
lola: markings : 202
lola: fired transitions : 696
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 Referendum-PT-0200-CTLFireability-10
lola: time limit : 661 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for Referendum-PT-0200-CTLFireability-10
lola: result : true
lola: markings : 19705
lola: fired transitions : 19901
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 Referendum-PT-0200-CTLFireability-09
lola: time limit : 827 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for Referendum-PT-0200-CTLFireability-09
lola: result : false
lola: markings : 202
lola: fired transitions : 410
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 Referendum-PT-0200-CTLFireability-08
lola: time limit : 1102 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for Referendum-PT-0200-CTLFireability-08
lola: result : false
lola: markings : 354
lola: fired transitions : 354
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 Referendum-PT-0200-CTLFireability-07
lola: time limit : 1654 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Referendum-PT-0200-CTLFireability-07
lola: result : true
lola: markings : 202
lola: fired transitions : 402
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Referendum-PT-0200-CTLFireability-03
lola: time limit : 3308 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Referendum-PT-0200-CTLFireability-03
lola: result : true
lola: markings : 202
lola: fired transitions : 201
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 12
FINAL RESULTS
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Referendum-PT-0200-CTLFireability-01: AXAF unknown AGGR
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Referendum-PT-0200-CTLFireability-11: CTL false skeleton: CTL model checker
Referendum-PT-0200-CTLFireability-12: CTL true CTL model checker
Referendum-PT-0200-CTLFireability-13: EXEF true state space /EXEF
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-PT-0200"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Referendum-PT-0200, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199700506"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Referendum-PT-0200.tgz
mv Referendum-PT-0200 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;