Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199700482.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
....................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Referendum-PT-0020, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199700482
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.2M
-rw-r--r-- 1 mcc users 30K Feb 26 17:28 CTLCardinality.txt
-rw-r--r-- 1 mcc users 191K Feb 26 17:28 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 17:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 92K Feb 26 17:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 12K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 44K Feb 26 17:30 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 267K Feb 26 17:30 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 41K Feb 26 17:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 340K Feb 26 17:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 6.9K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 23K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-PT-0020-CTLFireability-00
FORMULA_NAME Referendum-PT-0020-CTLFireability-01
FORMULA_NAME Referendum-PT-0020-CTLFireability-02
FORMULA_NAME Referendum-PT-0020-CTLFireability-03
FORMULA_NAME Referendum-PT-0020-CTLFireability-04
FORMULA_NAME Referendum-PT-0020-CTLFireability-05
FORMULA_NAME Referendum-PT-0020-CTLFireability-06
FORMULA_NAME Referendum-PT-0020-CTLFireability-07
FORMULA_NAME Referendum-PT-0020-CTLFireability-08
FORMULA_NAME Referendum-PT-0020-CTLFireability-09
FORMULA_NAME Referendum-PT-0020-CTLFireability-10
FORMULA_NAME Referendum-PT-0020-CTLFireability-11
FORMULA_NAME Referendum-PT-0020-CTLFireability-12
FORMULA_NAME Referendum-PT-0020-CTLFireability-13
FORMULA_NAME Referendum-PT-0020-CTLFireability-14
FORMULA_NAME Referendum-PT-0020-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679049668950

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Referendum-PT-0020
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 10:41:10] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:41:10] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:41:10] [INFO ] Load time of PNML (sax parser for PT used): 26 ms
[2023-03-17 10:41:10] [INFO ] Transformed 61 places.
[2023-03-17 10:41:10] [INFO ] Transformed 41 transitions.
[2023-03-17 10:41:10] [INFO ] Found NUPN structural information;
[2023-03-17 10:41:10] [INFO ] Parsed PT model containing 61 places and 41 transitions and 101 arcs in 87 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Support contains 21 out of 61 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 61/61 places, 41/41 transitions.
Reduce places removed 40 places and 0 transitions.
Ensure Unique test removed 20 transitions
Reduce isomorphic transitions removed 20 transitions.
Iterating post reduction 0 with 60 rules applied. Total rules applied 60 place count 21 transition count 21
Applied a total of 60 rules in 9 ms. Remains 21 /61 variables (removed 40) and now considering 21/41 (removed 20) transitions.
// Phase 1: matrix 21 rows 21 cols
[2023-03-17 10:41:10] [INFO ] Computed 0 place invariants in 5 ms
[2023-03-17 10:41:10] [INFO ] Implicit Places using invariants in 113 ms returned []
[2023-03-17 10:41:10] [INFO ] Invariant cache hit.
[2023-03-17 10:41:10] [INFO ] Implicit Places using invariants and state equation in 54 ms returned []
Implicit Place search using SMT with State Equation took 191 ms to find 0 implicit places.
[2023-03-17 10:41:10] [INFO ] Invariant cache hit.
[2023-03-17 10:41:10] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 21/61 places, 21/41 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 244 ms. Remains : 21/61 places, 21/41 transitions.
Support contains 21 out of 21 places after structural reductions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 17 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 6 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Finished random walk after 21 steps, including 0 resets, run visited all 36 properties in 11 ms. (steps per millisecond=1 )
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 4 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 5 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Computed a total of 21 stabilizing places and 21 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 21 transition count 21
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA Referendum-PT-0020-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in SI_CTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 7 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 8 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 5 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 3 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Graph (complete) has 20 edges and 21 vertex of which 1 are kept as prefixes of interest. Removing 20 places using SCC suffix rule.1 ms
Discarding 20 places :
Also discarding 20 output transitions
Drop transitions removed 20 transitions
Applied a total of 1 rules in 2 ms. Remains 1 /21 variables (removed 20) and now considering 1/21 (removed 20) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 1/21 places, 1/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 1 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 1 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Applied a total of 0 rules in 0 ms. Remains 21 /21 variables (removed 0) and now considering 21/21 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 21/21 places, 21/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 21 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 12 place count 9 transition count 9
Iterating global reduction 0 with 12 rules applied. Total rules applied 24 place count 9 transition count 9
Applied a total of 24 rules in 2 ms. Remains 9 /21 variables (removed 12) and now considering 9/21 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 9/21 places, 9/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 9 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 5 transition count 5
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 5 transition count 5
Applied a total of 32 rules in 0 ms. Remains 5 /21 variables (removed 16) and now considering 5/21 (removed 16) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 5/21 places, 5/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Graph (complete) has 20 edges and 21 vertex of which 3 are kept as prefixes of interest. Removing 18 places using SCC suffix rule.0 ms
Discarding 18 places :
Also discarding 18 output transitions
Drop transitions removed 18 transitions
Applied a total of 1 rules in 1 ms. Remains 3 /21 variables (removed 18) and now considering 3/21 (removed 18) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 3/21 places, 3/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 3 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 12 transition count 12
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 12 transition count 12
Applied a total of 18 rules in 1 ms. Remains 12 /21 variables (removed 9) and now considering 12/21 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 12/21 places, 12/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 12 transition count 12
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 12 transition count 12
Applied a total of 18 rules in 1 ms. Remains 12 /21 variables (removed 9) and now considering 12/21 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 12/21 places, 12/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Graph (complete) has 20 edges and 21 vertex of which 5 are kept as prefixes of interest. Removing 16 places using SCC suffix rule.0 ms
Discarding 16 places :
Also discarding 16 output transitions
Drop transitions removed 16 transitions
Applied a total of 1 rules in 1 ms. Remains 5 /21 variables (removed 16) and now considering 5/21 (removed 16) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 5/21 places, 5/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 5 transitions.
Starting structural reductions in LTL mode, iteration 0 : 21/21 places, 21/21 transitions.
Discarding 17 places :
Symmetric choice reduction at 0 with 17 rule applications. Total rules 17 place count 4 transition count 4
Iterating global reduction 0 with 17 rules applied. Total rules applied 34 place count 4 transition count 4
Applied a total of 34 rules in 1 ms. Remains 4 /21 variables (removed 17) and now considering 4/21 (removed 17) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 4/21 places, 4/21 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:41:11] [INFO ] Input system was already deterministic with 4 transitions.
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 3 ms
[2023-03-17 10:41:11] [INFO ] Flatten gal took : 4 ms
[2023-03-17 10:41:11] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 6 ms.
[2023-03-17 10:41:11] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 21 places, 21 transitions and 41 arcs took 1 ms.
Total runtime 1216 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Referendum-PT-0020
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA Referendum-PT-0020-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0020-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679049714470

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
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lola: LAUNCH task # 53 (type SKEL/SRCH) for 39 Referendum-PT-0020-CTLFireability-14
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lola: FINISHED task # 53 (type SKEL/SRCH) for Referendum-PT-0020-CTLFireability-14
lola: result : true
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lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
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lola: LAUNCH task # 25 (type EXCL) for 24 Referendum-PT-0020-CTLFireability-08
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
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lola: FINISHED task # 16 (type EXCL) for Referendum-PT-0020-CTLFireability-05
lola: result : true
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lola: LAUNCH task # 13 (type EXCL) for 12 Referendum-PT-0020-CTLFireability-04
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lola: rewrite Frontend/Parser/formula_rewrite.k:726
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 55 (type SKEL/SRCH) for 46 Referendum-PT-0020-CTLFireability-15
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lola: FINISHED task # 55 (type SKEL/SRCH) for Referendum-PT-0020-CTLFireability-15
lola: result : true
lola: markings : 21
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lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: LAUNCH task # 56 (type SKEL/SRCH) for 46 Referendum-PT-0020-CTLFireability-15
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lola: result : true
lola: time used : 0.000000
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/300 3/32 Referendum-PT-0020-CTLFireability-04 513152 m, 46961 m/sec, 4841585 t fired, .

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Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Referendum-PT-0020-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/300 4/32 Referendum-PT-0020-CTLFireability-04 749742 m, 47318 m/sec, 7177632 t fired, .

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Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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13 CTL EXCL 20/300 4/32 Referendum-PT-0020-CTLFireability-04 958159 m, 41683 m/sec, 9404345 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-PT-0020-CTLFireability-04: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 2/325 2/32 Referendum-PT-0020-CTLFireability-13 354370 m, 70874 m/sec, 4893577 t fired, .

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Referendum-PT-0020-CTLFireability-04: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 7/325 5/32 Referendum-PT-0020-CTLFireability-13 1031385 m, 135403 m/sec, 15158454 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-11: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-13: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 5/396 4/32 Referendum-PT-0020-CTLFireability-09 786661 m, 157332 m/sec, 10486531 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-PT-0020-CTLFireability-01: EFAG false tscc_search
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Referendum-PT-0020-CTLFireability-03: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-04: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-09: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-10: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-11: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-13: CTL false CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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Referendum-PT-0020-CTLFireability-06: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 3/1781 3/32 Referendum-PT-0020-CTLFireability-00 737508 m, 147501 m/sec, 7046846 t fired, .

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# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 1 (type EXCL) for Referendum-PT-0020-CTLFireability-00
lola: result : false
lola: markings : 1048577
lola: fired transitions : 10485763
lola: time used : 5.000000
lola: memory pages used : 5
lola: LAUNCH task # 19 (type EXCL) for 18 Referendum-PT-0020-CTLFireability-06
lola: time limit : 3558 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for Referendum-PT-0020-CTLFireability-06
lola: result : false
lola: markings : 22
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-PT-0020-CTLFireability-00: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-01: EFAG false tscc_search
Referendum-PT-0020-CTLFireability-02: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-03: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-04: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-05: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-06: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-07: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-08: CTL true CTL model checker
Referendum-PT-0020-CTLFireability-09: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-10: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-11: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-13: CTL false CTL model checker
Referendum-PT-0020-CTLFireability-14: DISJ true CTL model checker
Referendum-PT-0020-CTLFireability-15: CONJ true CONJ


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-PT-0020"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Referendum-PT-0020, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199700482"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Referendum-PT-0020.tgz
mv Referendum-PT-0020 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;