Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199700474.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..............
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Referendum-PT-0015, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199700474
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 864K
-rw-r--r-- 1 mcc users 19K Feb 26 17:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 132K Feb 26 17:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 17:25 CTLFireability.txt
-rw-r--r-- 1 mcc users 93K Feb 26 17:25 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 12K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 49K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 27K Feb 26 17:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 172K Feb 26 17:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 25K Feb 26 17:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 209K Feb 26 17:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.7K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 18K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-PT-0015-CTLFireability-00
FORMULA_NAME Referendum-PT-0015-CTLFireability-01
FORMULA_NAME Referendum-PT-0015-CTLFireability-02
FORMULA_NAME Referendum-PT-0015-CTLFireability-03
FORMULA_NAME Referendum-PT-0015-CTLFireability-04
FORMULA_NAME Referendum-PT-0015-CTLFireability-05
FORMULA_NAME Referendum-PT-0015-CTLFireability-06
FORMULA_NAME Referendum-PT-0015-CTLFireability-07
FORMULA_NAME Referendum-PT-0015-CTLFireability-08
FORMULA_NAME Referendum-PT-0015-CTLFireability-09
FORMULA_NAME Referendum-PT-0015-CTLFireability-10
FORMULA_NAME Referendum-PT-0015-CTLFireability-11
FORMULA_NAME Referendum-PT-0015-CTLFireability-12
FORMULA_NAME Referendum-PT-0015-CTLFireability-13
FORMULA_NAME Referendum-PT-0015-CTLFireability-14
FORMULA_NAME Referendum-PT-0015-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679049601568

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Referendum-PT-0015
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 10:40:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:40:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:40:03] [INFO ] Load time of PNML (sax parser for PT used): 24 ms
[2023-03-17 10:40:03] [INFO ] Transformed 46 places.
[2023-03-17 10:40:03] [INFO ] Transformed 31 transitions.
[2023-03-17 10:40:03] [INFO ] Found NUPN structural information;
[2023-03-17 10:40:03] [INFO ] Parsed PT model containing 46 places and 31 transitions and 76 arcs in 80 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Support contains 16 out of 46 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 46/46 places, 31/31 transitions.
Reduce places removed 30 places and 0 transitions.
Ensure Unique test removed 15 transitions
Reduce isomorphic transitions removed 15 transitions.
Iterating post reduction 0 with 45 rules applied. Total rules applied 45 place count 16 transition count 16
Applied a total of 45 rules in 8 ms. Remains 16 /46 variables (removed 30) and now considering 16/31 (removed 15) transitions.
// Phase 1: matrix 16 rows 16 cols
[2023-03-17 10:40:03] [INFO ] Computed 0 place invariants in 5 ms
[2023-03-17 10:40:03] [INFO ] Implicit Places using invariants in 104 ms returned []
[2023-03-17 10:40:03] [INFO ] Invariant cache hit.
[2023-03-17 10:40:03] [INFO ] Implicit Places using invariants and state equation in 61 ms returned []
Implicit Place search using SMT with State Equation took 187 ms to find 0 implicit places.
[2023-03-17 10:40:03] [INFO ] Invariant cache hit.
[2023-03-17 10:40:03] [INFO ] Dead Transitions using invariants and state equation in 50 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 16/46 places, 16/31 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 247 ms. Remains : 16/46 places, 16/31 transitions.
Support contains 16 out of 16 places after structural reductions.
[2023-03-17 10:40:03] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-17 10:40:03] [INFO ] Flatten gal took : 18 ms
FORMULA Referendum-PT-0015-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:40:03] [INFO ] Flatten gal took : 7 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Incomplete random walk after 10000 steps, including 588 resets, run finished after 338 ms. (steps per millisecond=29 ) properties (out of 43) seen :39
Incomplete Best-First random walk after 10001 steps, including 73 resets, run finished after 55 ms. (steps per millisecond=181 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 73 resets, run finished after 35 ms. (steps per millisecond=285 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 73 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 73 resets, run finished after 40 ms. (steps per millisecond=250 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-17 10:40:04] [INFO ] Invariant cache hit.
[2023-03-17 10:40:04] [INFO ] After 66ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:1
[2023-03-17 10:40:04] [INFO ] After 36ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 15 simplifications.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 6 ms
[2023-03-17 10:40:04] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
FORMULA Referendum-PT-0015-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Referendum-PT-0015-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 4 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Computed a total of 16 stabilizing places and 16 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 16 transition count 16
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 1 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 2 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Applied a total of 0 rules in 0 ms. Remains 16 /16 variables (removed 0) and now considering 16/16 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 0 ms. Remains : 16/16 places, 16/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 16 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (complete) has 15 edges and 16 vertex of which 2 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 14 output transitions
Drop transitions removed 14 transitions
Applied a total of 1 rules in 1 ms. Remains 2 /16 variables (removed 14) and now considering 2/16 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/16 places, 2/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 8 transition count 8
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 8 transition count 8
Applied a total of 16 rules in 2 ms. Remains 8 /16 variables (removed 8) and now considering 8/16 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 8/16 places, 8/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 8 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Discarding 6 places :
Symmetric choice reduction at 0 with 6 rule applications. Total rules 6 place count 10 transition count 10
Iterating global reduction 0 with 6 rules applied. Total rules applied 12 place count 10 transition count 10
Applied a total of 12 rules in 0 ms. Remains 10 /16 variables (removed 6) and now considering 10/16 (removed 6) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 10/16 places, 10/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 10 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Graph (complete) has 15 edges and 16 vertex of which 2 are kept as prefixes of interest. Removing 14 places using SCC suffix rule.0 ms
Discarding 14 places :
Also discarding 14 output transitions
Drop transitions removed 14 transitions
Applied a total of 1 rules in 0 ms. Remains 2 /16 variables (removed 14) and now considering 2/16 (removed 14) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 0 ms. Remains : 2/16 places, 2/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Discarding 9 places :
Symmetric choice reduction at 0 with 9 rule applications. Total rules 9 place count 7 transition count 7
Iterating global reduction 0 with 9 rules applied. Total rules applied 18 place count 7 transition count 7
Applied a total of 18 rules in 1 ms. Remains 7 /16 variables (removed 9) and now considering 7/16 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 7/16 places, 7/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 7 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 12 transition count 12
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 12 transition count 12
Applied a total of 8 rules in 0 ms. Remains 12 /16 variables (removed 4) and now considering 12/16 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 12/16 places, 12/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 12 transitions.
Starting structural reductions in LTL mode, iteration 0 : 16/16 places, 16/16 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 14 transition count 14
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 14 transition count 14
Applied a total of 4 rules in 0 ms. Remains 14 /16 variables (removed 2) and now considering 14/16 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 14/16 places, 14/16 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:40:04] [INFO ] Input system was already deterministic with 14 transitions.
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 4 ms
[2023-03-17 10:40:04] [INFO ] Flatten gal took : 3 ms
[2023-03-17 10:40:04] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-17 10:40:04] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 16 places, 16 transitions and 31 arcs took 0 ms.
Total runtime 1754 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Referendum-PT-0015
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability

FORMULA Referendum-PT-0015-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-PT-0015-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679049607065

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 10 (type EXCL) for 9 Referendum-PT-0015-CTLFireability-05
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 43 (type FNDP) for 12 Referendum-PT-0015-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 44 (type EQUN) for 12 Referendum-PT-0015-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 46 (type SRCH) for 12 Referendum-PT-0015-CTLFireability-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 46 (type SRCH) for Referendum-PT-0015-CTLFireability-06
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 43 (type FNDP) for Referendum-PT-0015-CTLFireability-06
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 44 (type EQUN) for Referendum-PT-0015-CTLFireability-06 (obsolete)
lola: FINISHED task # 44 (type EQUN) for Referendum-PT-0015-CTLFireability-06
lola: result : unknown
lola: FINISHED task # 10 (type EXCL) for Referendum-PT-0015-CTLFireability-05
lola: result : false
lola: markings : 32769
lola: fired transitions : 278533
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 Referendum-PT-0015-CTLFireability-15
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for Referendum-PT-0015-CTLFireability-15
lola: result : false
lola: markings : 137
lola: fired transitions : 286
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 37 Referendum-PT-0015-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for Referendum-PT-0015-CTLFireability-14
lola: result : true
lola: markings : 16
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 Referendum-PT-0015-CTLFireability-13
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for Referendum-PT-0015-CTLFireability-13
lola: result : false
lola: markings : 17
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 Referendum-PT-0015-CTLFireability-11
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for Referendum-PT-0015-CTLFireability-11
lola: result : true
lola: markings : 606
lola: fired transitions : 2339
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 Referendum-PT-0015-CTLFireability-10
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for Referendum-PT-0015-CTLFireability-10
lola: result : false
lola: markings : 32769
lola: fired transitions : 314410
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Referendum-PT-0015-CTLFireability-03
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Referendum-PT-0015-CTLFireability-03
lola: result : false
lola: markings : 32769
lola: fired transitions : 311297
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 Referendum-PT-0015-CTLFireability-01
lola: time limit : 599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for Referendum-PT-0015-CTLFireability-01
lola: result : false
lola: markings : 32769
lola: fired transitions : 311283
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Referendum-PT-0015-CTLFireability-00
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Referendum-PT-0015-CTLFireability-00
lola: result : true
lola: markings : 32769
lola: fired transitions : 245792
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 Referendum-PT-0015-CTLFireability-08
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for Referendum-PT-0015-CTLFireability-08
lola: result : false
lola: markings : 3
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 Referendum-PT-0015-CTLFireability-12
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for Referendum-PT-0015-CTLFireability-12
lola: result : true
lola: markings : 3
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 17 (type EXCL) for 12 Referendum-PT-0015-CTLFireability-06
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 17 (type EXCL) for Referendum-PT-0015-CTLFireability-06
lola: result : true
lola: markings : 32769
lola: fired transitions : 524290
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 20 (type EXCL) for 19 Referendum-PT-0015-CTLFireability-07
lola: time limit : 3598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 20 (type EXCL) for Referendum-PT-0015-CTLFireability-07
lola: result : false
lola: markings : 17
lola: fired transitions : 52
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-PT-0015-CTLFireability-00: CTL true CTL model checker
Referendum-PT-0015-CTLFireability-01: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-03: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-05: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-06: CONJ true CONJ
Referendum-PT-0015-CTLFireability-07: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-08: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-10: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-11: CTL true CTL model checker
Referendum-PT-0015-CTLFireability-12: CTL true CTL model checker
Referendum-PT-0015-CTLFireability-13: CTL false CTL model checker
Referendum-PT-0015-CTLFireability-14: CTL true CTL model checker
Referendum-PT-0015-CTLFireability-15: CTL false CTL model checker


Time elapsed: 2 secs. Pages in use: 2

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-PT-0015"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Referendum-PT-0015, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199700474"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Referendum-PT-0015.tgz
mv Referendum-PT-0015 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;