Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199600402.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..........................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Referendum-COL-0010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199600402
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 416K
-rw-r--r-- 1 mcc users 5.9K Feb 26 17:24 CTLCardinality.txt
-rw-r--r-- 1 mcc users 56K Feb 26 17:24 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 26 17:23 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 17:23 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.2K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.0K Feb 26 17:26 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 17:26 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 17:25 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 107K Feb 26 17:25 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 3.5K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Referendum-COL-0010-CTLFireability-00
FORMULA_NAME Referendum-COL-0010-CTLFireability-01
FORMULA_NAME Referendum-COL-0010-CTLFireability-02
FORMULA_NAME Referendum-COL-0010-CTLFireability-03
FORMULA_NAME Referendum-COL-0010-CTLFireability-04
FORMULA_NAME Referendum-COL-0010-CTLFireability-05
FORMULA_NAME Referendum-COL-0010-CTLFireability-06
FORMULA_NAME Referendum-COL-0010-CTLFireability-07
FORMULA_NAME Referendum-COL-0010-CTLFireability-08
FORMULA_NAME Referendum-COL-0010-CTLFireability-09
FORMULA_NAME Referendum-COL-0010-CTLFireability-10
FORMULA_NAME Referendum-COL-0010-CTLFireability-11
FORMULA_NAME Referendum-COL-0010-CTLFireability-12
FORMULA_NAME Referendum-COL-0010-CTLFireability-13
FORMULA_NAME Referendum-COL-0010-CTLFireability-14
FORMULA_NAME Referendum-COL-0010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1679048822027

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Referendum-COL-0010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-17 10:27:03] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-17 10:27:03] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-17 10:27:03] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-17 10:27:03] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-17 10:27:04] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 648 ms
[2023-03-17 10:27:04] [INFO ] Imported 4 HL places and 3 HL transitions for a total of 31 PT places and 21.0 transition bindings in 11 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 15 ms.
[2023-03-17 10:27:04] [INFO ] Built PT skeleton of HLPN with 4 places and 3 transitions 6 arcs in 4 ms.
[2023-03-17 10:27:04] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 4 stabilizing places and 3 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 4 transition count 3
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 9 formulas.
FORMULA Referendum-COL-0010-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Referendum-COL-0010-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA Referendum-COL-0010-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 1 properties that can be checked using skeleton over-approximation.
Computed a total of 4 stabilizing places and 3 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 4 transition count 3
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Finished random walk after 1 steps, including 0 resets, run visited all 2 properties in 5 ms. (steps per millisecond=0 )
[2023-03-17 10:27:04] [INFO ] Flatten gal took : 13 ms
[2023-03-17 10:27:04] [INFO ] Flatten gal took : 1 ms
Symmetric sort wr.t. initial and guards and successors and join/free detected :Voters
Arc [3:1*[0]] contains constants of sort Voters
Arc [3:1*[1]] contains constants of sort Voters
Arc [3:1*[2]] contains constants of sort Voters
Arc [3:1*[3]] contains constants of sort Voters
Arc [3:1*[4]] contains constants of sort Voters
Arc [3:1*[5]] contains constants of sort Voters
Arc [3:1*[6]] contains constants of sort Voters
Arc [3:1*[7]] contains constants of sort Voters
Arc [3:1*[8]] contains constants of sort Voters
Arc [3:1*[9]] contains constants of sort Voters
Transition start : constants on arcs in [[3:1*[0]], [3:1*[1]], [3:1*[2]], [3:1*[3]], [3:1*[4]], [3:1*[5]], [3:1*[6]], [3:1*[7]], [3:1*[8]], [3:1*[9]]] introduces in Voters(10) partition with 1 elements that refines current partition to 1 subsets.
Symmetric sort wr.t. initial detected :Voters
Symmetric sort wr.t. initial and guards detected :Voters
Applying symmetric unfolding of full symmetric sort :Voters domain size was 10
[2023-03-17 10:27:04] [INFO ] Unfolded HLPN to a Petri net with 4 places and 3 transitions 6 arcs in 6 ms.
[2023-03-17 10:27:04] [INFO ] Unfolded 13 HLPN properties in 0 ms.
Support contains 2 out of 4 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 4/4 places, 3/3 transitions.
Reduce places removed 2 places and 0 transitions.
Ensure Unique test removed 1 transitions
Reduce isomorphic transitions removed 1 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 2 transition count 2
Applied a total of 3 rules in 5 ms. Remains 2 /4 variables (removed 2) and now considering 2/3 (removed 1) transitions.
// Phase 1: matrix 2 rows 2 cols
[2023-03-17 10:27:04] [INFO ] Computed 0 place invariants in 5 ms
[2023-03-17 10:27:04] [INFO ] Implicit Places using invariants in 104 ms returned []
[2023-03-17 10:27:04] [INFO ] Invariant cache hit.
[2023-03-17 10:27:04] [INFO ] Implicit Places using invariants and state equation in 34 ms returned []
Implicit Place search using SMT with State Equation took 164 ms to find 0 implicit places.
[2023-03-17 10:27:04] [INFO ] Invariant cache hit.
[2023-03-17 10:27:04] [INFO ] Dead Transitions using invariants and state equation in 16 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 2/4 places, 2/3 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 187 ms. Remains : 2/4 places, 2/3 transitions.
Support contains 2 out of 2 places after structural reductions.
[2023-03-17 10:27:04] [INFO ] Flatten gal took : 3 ms
[2023-03-17 10:27:04] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:27:04] [INFO ] Input system was already deterministic with 2 transitions.
Incomplete random walk after 10009 steps, including 769 resets, run finished after 115 ms. (steps per millisecond=87 ) properties (out of 12) seen :8
Incomplete Best-First random walk after 10009 steps, including 769 resets, run finished after 83 ms. (steps per millisecond=120 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10009 steps, including 769 resets, run finished after 90 ms. (steps per millisecond=111 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10009 steps, including 769 resets, run finished after 99 ms. (steps per millisecond=101 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10009 steps, including 769 resets, run finished after 61 ms. (steps per millisecond=164 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-17 10:27:05] [INFO ] Invariant cache hit.
[2023-03-17 10:27:05] [INFO ] After 50ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 4 atomic propositions for a total of 13 simplifications.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 2 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Computed a total of 2 stabilizing places and 2 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 2 transition count 2
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 2 formulas.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 1 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 2 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 2 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 1 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA Referendum-COL-0010-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Support contains 0 out of 2 places (down from 2) after GAL structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 1 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 1 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 1 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
Starting structural reductions in LTL mode, iteration 0 : 2/2 places, 2/2 transitions.
Applied a total of 0 rules in 0 ms. Remains 2 /2 variables (removed 0) and now considering 2/2 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 2/2 places, 2/2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Input system was already deterministic with 2 transitions.
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 0 ms
[2023-03-17 10:27:05] [INFO ] Flatten gal took : 1 ms
[2023-03-17 10:27:05] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-17 10:27:05] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 2 places, 2 transitions and 3 arcs took 0 ms.
Total runtime 1731 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Referendum-COL-0010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA Referendum-COL-0010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Referendum-COL-0010-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1679048826198

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:415
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
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lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 16 (type EXCL) for 9 Referendum-COL-0010-CTLFireability-03
lola: time limit : 144 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 16 (type EXCL) for Referendum-COL-0010-CTLFireability-03
lola: result : false
lola: markings : 11
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 37 (type EXCL) for 30 Referendum-COL-0010-CTLFireability-07
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 85 (type FNDP) for 30 Referendum-COL-0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 86 (type EQUN) for 30 Referendum-COL-0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SRCH) for 30 Referendum-COL-0010-CTLFireability-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 88 (type SRCH) for Referendum-COL-0010-CTLFireability-07
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 37 (type EXCL) for Referendum-COL-0010-CTLFireability-07
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 85 (type FNDP) for Referendum-COL-0010-CTLFireability-07 (obsolete)
lola: CANCELED task # 86 (type EQUN) for Referendum-COL-0010-CTLFireability-07 (obsolete)
lola: LAUNCH task # 14 (type EXCL) for 9 Referendum-COL-0010-CTLFireability-03
lola: time limit : 180 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 14 (type EXCL) for Referendum-COL-0010-CTLFireability-03
lola: result : false
lola: markings : 11
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 62 (type EXCL) for 57 Referendum-COL-0010-CTLFireability-15
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 85 (type FNDP) for Referendum-COL-0010-CTLFireability-07
lola: result : true
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: planning for (null) stopped (result already fixed).
lola: FINISHED task # 62 (type EXCL) for Referendum-COL-0010-CTLFireability-15
lola: result : true
lola: markings : 11
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 74 (type EXCL) for 57 Referendum-COL-0010-CTLFireability-15
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 91 (type FNDP) for 57 Referendum-COL-0010-CTLFireability-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 74 (type EXCL) for Referendum-COL-0010-CTLFireability-15
lola: result : false
lola: markings : 12
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/374/CTLFireability-86.sara.
lola: LAUNCH task # 55 (type EXCL) for 50 Referendum-COL-0010-CTLFireability-14
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 55 (type EXCL) for Referendum-COL-0010-CTLFireability-14
lola: result : true
lola: markings : 11
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 53 (type EXCL) for 50 Referendum-COL-0010-CTLFireability-14
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for Referendum-COL-0010-CTLFireability-14
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 42 (type EXCL) for 41 Referendum-COL-0010-CTLFireability-09
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 91 (type FNDP) for Referendum-COL-0010-CTLFireability-15
lola: result : true
lola:
tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 42 (type EXCL) for Referendum-COL-0010-CTLFireability-09
lola: result : false
lola: markings : 12
lola: fired transitions : 79
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 Referendum-COL-0010-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for Referendum-COL-0010-CTLFireability-06
lola: result : true
lola: markings : 11
lola: fired transitions : 43
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 Referendum-COL-0010-CTLFireability-05
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for Referendum-COL-0010-CTLFireability-05
lola: result : true
lola: markings : 12
lola: fired transitions : 26
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Referendum-COL-0010-CTLFireability-02
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Referendum-COL-0010-CTLFireability-02
lola: result : false
lola: markings : 12
lola: fired transitions : 22
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Referendum-COL-0010-CTLFireability-00
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Referendum-COL-0010-CTLFireability-00
lola: result : false
lola: markings : 12
lola: fired transitions : 49
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 Referendum-COL-0010-CTLFireability-01
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for Referendum-COL-0010-CTLFireability-01
lola: result : false
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 Referendum-COL-0010-CTLFireability-10
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for Referendum-COL-0010-CTLFireability-10
lola: result : false
lola: markings : 12
lola: fired transitions : 56
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 48 (type EXCL) for 47 Referendum-COL-0010-CTLFireability-13
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for Referendum-COL-0010-CTLFireability-13
lola: result : true
lola: markings : 12
lola: fired transitions : 37
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Referendum-COL-0010-CTLFireability-00: CTL false CTL model checker
Referendum-COL-0010-CTLFireability-01: EG false state space / EG
Referendum-COL-0010-CTLFireability-02: CTL false CTL model checker
Referendum-COL-0010-CTLFireability-03: CONJ false CONJ
Referendum-COL-0010-CTLFireability-05: CTL true CTL model checker
Referendum-COL-0010-CTLFireability-06: CTL true CTL model checker
Referendum-COL-0010-CTLFireability-07: DISJ true CTL model checker
Referendum-COL-0010-CTLFireability-09: CTL false CTL model checker
Referendum-COL-0010-CTLFireability-10: CTL false CTL model checker
Referendum-COL-0010-CTLFireability-13: CTL true CTL model checker
Referendum-COL-0010-CTLFireability-14: CONJ true CONJ
Referendum-COL-0010-CTLFireability-15: CONJ false findpath


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Referendum-COL-0010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Referendum-COL-0010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199600402"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Referendum-COL-0010.tgz
mv Referendum-COL-0010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;