Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r327-tall-167889199200132.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is RERS17pb114-PT-8, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r327-tall-167889199200132
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 73M
-rw-r--r-- 1 mcc users 6.2K Feb 26 05:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 63K Feb 26 05:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 8.0K Feb 26 05:00 CTLFireability.txt
-rw-r--r-- 1 mcc users 58K Feb 26 05:00 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.4K Feb 25 16:39 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.0K Feb 25 16:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 05:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 159K Feb 26 05:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 26 05:08 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 59K Feb 26 05:08 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 73M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-00
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-01
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-02
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-03
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-04
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-05
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-06
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-07
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-08
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-09
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-10
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-11
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-12
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-13
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-14
FORMULA_NAME RERS17pb114-PT-8-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1678974614436

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb114-PT-8
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-16 13:50:16] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, LTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-16 13:50:16] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-16 13:50:18] [INFO ] Load time of PNML (sax parser for PT used): 2039 ms
[2023-03-16 13:50:18] [INFO ] Transformed 1446 places.
[2023-03-16 13:50:18] [INFO ] Transformed 151085 transitions.
[2023-03-16 13:50:18] [INFO ] Parsed PT model containing 1446 places and 151085 transitions and 604252 arcs in 2662 ms.
Parsed 16 properties from file /home/mcc/execution/LTLFireability.xml in 35 ms.
Working with output stream class java.io.PrintStream
Initial state reduction rules removed 3 formulas.
FORMULA RERS17pb114-PT-8-LTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RERS17pb114-PT-8-LTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA RERS17pb114-PT-8-LTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 52 out of 1446 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1446/1446 places, 151085/151085 transitions.
Ensure Unique test removed 17 places
Iterating post reduction 0 with 17 rules applied. Total rules applied 17 place count 1429 transition count 151085
Applied a total of 17 rules in 1106 ms. Remains 1429 /1446 variables (removed 17) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 13:50:21] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
// Phase 1: matrix 84691 rows 1429 cols
[2023-03-16 13:50:21] [INFO ] Computed 18 place invariants in 521 ms
[2023-03-16 13:50:31] [INFO ] Implicit Places using invariants in 10043 ms returned []
Implicit Place search using SMT only with invariants took 10071 ms to find 0 implicit places.
[2023-03-16 13:50:31] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:50:31] [INFO ] Invariant cache hit.
[2023-03-16 13:51:01] [INFO ] Performed 86930/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 13:51:23] [INFO ] Dead Transitions using invariants and state equation in 52090 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 1429/1446 places, 151085/151085 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 63298 ms. Remains : 1429/1446 places, 151085/151085 transitions.
Support contains 52 out of 1429 places after structural reductions.
[2023-03-16 13:51:28] [INFO ] Flatten gal took : 4033 ms
[2023-03-16 13:51:32] [INFO ] Flatten gal took : 3641 ms
[2023-03-16 13:51:40] [INFO ] Input system was already deterministic with 151085 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1489 ms. (steps per millisecond=6 ) properties (out of 28) seen :3
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 25) seen :0
Running SMT prover for 25 properties.
[2023-03-16 13:51:43] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:51:43] [INFO ] Invariant cache hit.
[2023-03-16 13:51:44] [INFO ] [Real]Absence check using 18 positive place invariants in 16 ms returned sat
[2023-03-16 13:52:08] [INFO ] After 23915ms SMT Verify possible using state equation in real domain returned unsat :0 sat :25
[2023-03-16 13:52:11] [INFO ] State equation strengthened by 2342 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 13:52:11] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 13:52:11] [INFO ] After 27589ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 25 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 44 out of 1429 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1429 transition count 150573
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 513 place count 1428 transition count 150572
Applied a total of 513 rules in 3318 ms. Remains 1428 /1429 variables (removed 1) and now considering 150572/151085 (removed 513) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 3324 ms. Remains : 1428/1429 places, 150572/151085 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 947 ms. (steps per millisecond=10 ) properties (out of 25) seen :1
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 24) seen :0
Interrupted probabilistic random walk after 5654 steps, run timeout after 3004 ms. (steps per millisecond=1 ) properties seen :{}
Probabilistic random walk after 5654 steps, saw 5241 distinct states, run finished after 3007 ms. (steps per millisecond=1 ) properties seen :0
Running SMT prover for 24 properties.
[2023-03-16 13:52:19] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 13:52:19] [INFO ] Computed 18 place invariants in 432 ms
[2023-03-16 13:52:20] [INFO ] [Real]Absence check using 18 positive place invariants in 17 ms returned sat
[2023-03-16 13:52:44] [INFO ] After 23766ms SMT Verify possible using state equation in real domain returned unsat :0 sat :24
[2023-03-16 13:52:46] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 13:52:46] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 13:52:46] [INFO ] After 26121ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 24 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 42 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1715 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1715 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1284 ms. (steps per millisecond=7 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 28 ms. (steps per millisecond=35 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 29 ms. (steps per millisecond=34 ) properties (out of 24) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=32 ) properties (out of 24) seen :0
Interrupted probabilistic random walk after 4745 steps, run timeout after 3004 ms. (steps per millisecond=1 ) properties seen :{}
Probabilistic random walk after 4745 steps, saw 4402 distinct states, run finished after 3004 ms. (steps per millisecond=1 ) properties seen :0
Running SMT prover for 24 properties.
[2023-03-16 13:52:53] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 13:52:53] [INFO ] Invariant cache hit.
[2023-03-16 13:52:53] [INFO ] [Real]Absence check using 18 positive place invariants in 16 ms returned sat
[2023-03-16 13:53:18] [INFO ] After 23953ms SMT Verify possible using state equation in real domain returned unsat :0 sat :24
[2023-03-16 13:53:19] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.checkAtomicPropositionsLogic(AtomicReducerSR.java:105)
at fr.lip6.move.gal.application.solver.logic.AtomicReducerSR.strongReductions(AtomicReducerSR.java:44)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.preSolveForLogic(LTLPropertySolver.java:176)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:71)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 13:53:19] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 13:53:19] [INFO ] After 25946ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 24 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 42 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1325 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1325 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1256 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 13:53:21] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 13:53:21] [INFO ] Invariant cache hit.
[2023-03-16 13:53:30] [INFO ] Implicit Places using invariants in 8332 ms returned []
Implicit Place search using SMT only with invariants took 8333 ms to find 0 implicit places.
[2023-03-16 13:53:30] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 13:53:30] [INFO ] Invariant cache hit.
[2023-03-16 13:54:00] [INFO ] Performed 93336/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 13:54:19] [INFO ] Dead Transitions using invariants and state equation in 49540 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 59159 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(G((p0||G(((p2||F(p3))&&p1)))))))'
Support contains 6 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 761 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 13:54:21] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
// Phase 1: matrix 84691 rows 1429 cols
[2023-03-16 13:54:21] [INFO ] Computed 18 place invariants in 330 ms
[2023-03-16 13:54:30] [INFO ] Implicit Places using invariants in 8801 ms returned []
Implicit Place search using SMT only with invariants took 8813 ms to find 0 implicit places.
[2023-03-16 13:54:30] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:54:30] [INFO ] Invariant cache hit.
[2023-03-16 13:55:00] [INFO ] Performed 88758/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 13:55:20] [INFO ] Dead Transitions using invariants and state equation in 50887 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60470 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Stuttering acceptance computed with spot in 446 ms :[(OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p1))), (OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p1))), (OR (AND (NOT p0) (NOT p2) (NOT p3)) (AND (NOT p0) (NOT p1))), true, (NOT p3), (OR (NOT p1) (AND (NOT p2) (NOT p3)))]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-00 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=p0, acceptance={} source=2 dest: 2}, { cond=(AND (NOT p0) (NOT p1)), acceptance={} source=2 dest: 3}, { cond=(AND (NOT p0) p1 (NOT p2) (NOT p3)), acceptance={} source=2 dest: 4}, { cond=(AND (NOT p0) p1), acceptance={} source=2 dest: 5}], [{ cond=true, acceptance={0} source=3 dest: 3}], [{ cond=(NOT p3), acceptance={0} source=4 dest: 4}], [{ cond=(NOT p1), acceptance={} source=5 dest: 3}, { cond=(AND p1 (NOT p2) (NOT p3)), acceptance={} source=5 dest: 4}, { cond=p1, acceptance={} source=5 dest: 5}]], initial=0, aps=[p0:(AND (GEQ s263 1) (GEQ s1215 1)), p1:(AND (GEQ s207 1) (GEQ s835 1)), p2:(AND (GEQ s207 1) (GEQ s835 1)), p3:(AND (GEQ s202 1) (GEQ s409 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null][false, false, false, false, false, false]]
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 21 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-00 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-00 finished in 61463 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X((G((F(p2)&&p1))&&p0)))))'
Support contains 6 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 755 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 13:55:22] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:55:22] [INFO ] Invariant cache hit.
[2023-03-16 13:55:31] [INFO ] Implicit Places using invariants in 8907 ms returned []
Implicit Place search using SMT only with invariants took 8908 ms to find 0 implicit places.
[2023-03-16 13:55:31] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:55:31] [INFO ] Invariant cache hit.
[2023-03-16 13:56:01] [INFO ] Performed 92054/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 13:56:20] [INFO ] Dead Transitions using invariants and state equation in 48945 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58617 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Stuttering acceptance computed with spot in 323 ms :[(OR (NOT p0) (NOT p1) (NOT p2)), (OR (NOT p0) (NOT p1) (NOT p2)), (OR (NOT p0) (NOT p1) (NOT p2)), (OR (NOT p0) (NOT p1) (NOT p2)), true, (NOT p2), (OR (NOT p2) (NOT p1))]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-01 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=true, acceptance={} source=1 dest: 2}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=(OR (NOT p0) (NOT p1)), acceptance={} source=3 dest: 4}, { cond=(AND p0 p1 (NOT p2)), acceptance={} source=3 dest: 5}, { cond=(AND p0 p1), acceptance={} source=3 dest: 6}], [{ cond=true, acceptance={0} source=4 dest: 4}], [{ cond=(NOT p2), acceptance={0} source=5 dest: 5}], [{ cond=(NOT p1), acceptance={} source=6 dest: 4}, { cond=(AND p1 (NOT p2)), acceptance={} source=6 dest: 5}, { cond=p1, acceptance={} source=6 dest: 6}]], initial=0, aps=[p0:(AND (GEQ s252 1) (GEQ s279 1)), p1:(AND (GEQ s26 1) (GEQ s1133 1)), p2:(OR (LT s260 1) (LT s1158 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null, null, null, null][false, false, false, false, false, false, false]]
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 5 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-01 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-01 finished in 59432 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((p0||X(G(p1)))))'
Support contains 4 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 666 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 13:56:22] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:56:22] [INFO ] Invariant cache hit.
[2023-03-16 13:56:30] [INFO ] Implicit Places using invariants in 8127 ms returned []
Implicit Place search using SMT only with invariants took 8127 ms to find 0 implicit places.
[2023-03-16 13:56:30] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:56:30] [INFO ] Invariant cache hit.
[2023-03-16 13:57:00] [INFO ] Performed 89363/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 13:57:21] [INFO ] Dead Transitions using invariants and state equation in 51341 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60154 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Stuttering acceptance computed with spot in 97 ms :[true, (AND (NOT p0) (NOT p1)), (NOT p1)]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=p0, acceptance={} source=1 dest: 1}, { cond=(NOT p0), acceptance={} source=1 dest: 2}], [{ cond=(NOT p1), acceptance={} source=2 dest: 0}, { cond=p1, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(AND (GEQ s173 1) (GEQ s1016 1)), p1:(OR (LT s775 1) (LT s999 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 0 reset in 8562 ms.
Product exploration explored 100000 steps with 0 reset in 8576 ms.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [(AND (NOT p0) p1), (X p1), (X (NOT p0)), true, (X (X p1)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 227 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 82 ms :[true, (NOT p1), (NOT p1)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 627 ms. (steps per millisecond=15 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 62 ms. (steps per millisecond=161 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6649 steps, run timeout after 3003 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6649 steps, saw 5716 distinct states, run finished after 3004 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 13:57:44] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:57:44] [INFO ] Invariant cache hit.
[2023-03-16 13:57:44] [INFO ] [Real]Absence check using 18 positive place invariants in 16 ms returned sat
[2023-03-16 13:58:06] [INFO ] After 21854ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 13:58:07] [INFO ] State equation strengthened by 2342 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 13:58:09] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 13:58:09] [INFO ] After 25025ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1429 transition count 150573
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 513 place count 1428 transition count 150572
Applied a total of 513 rules in 2455 ms. Remains 1428 /1429 variables (removed 1) and now considering 150572/151085 (removed 513) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 2458 ms. Remains : 1428/1429 places, 150572/151085 transitions.
Finished random walk after 5490 steps, including 1 resets, run visited all 1 properties in 395 ms. (steps per millisecond=13 )
Knowledge obtained : [(AND (NOT p0) p1), (X p1), (X (NOT p0)), true, (X (X p1)), (X (X (NOT p0)))]
False Knowledge obtained : [(F (NOT p1))]
Knowledge based reduction with 6 factoid took 307 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 102 ms :[true, (NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 84 ms :[true, (NOT p1), (NOT p1)]
Support contains 2 out of 1429 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 749 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 13:58:13] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:58:13] [INFO ] Invariant cache hit.
[2023-03-16 13:58:23] [INFO ] Implicit Places using invariants in 9315 ms returned []
Implicit Place search using SMT only with invariants took 9319 ms to find 0 implicit places.
[2023-03-16 13:58:23] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:58:23] [INFO ] Invariant cache hit.
[2023-03-16 13:58:53] [INFO ] Performed 93733/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 13:59:12] [INFO ] Dead Transitions using invariants and state equation in 49508 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59586 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Computed a total of 1 stabilizing places and 1 stable transitions
Knowledge obtained : [p1, (X p1), true, (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 166 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 80 ms :[true, (NOT p1), (NOT p1)]
Finished random walk after 4572 steps, including 1 resets, run visited all 1 properties in 236 ms. (steps per millisecond=19 )
Knowledge obtained : [p1, (X p1), true, (X (X p1))]
False Knowledge obtained : [(F (NOT p1))]
Knowledge based reduction with 4 factoid took 161 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 83 ms :[true, (NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 88 ms :[true, (NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 90 ms :[true, (NOT p1), (NOT p1)]
Product exploration explored 100000 steps with 0 reset in 8215 ms.
Product exploration explored 100000 steps with 0 reset in 8106 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 88 ms :[true, (NOT p1), (NOT p1)]
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 1322 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 13:59:32] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 13:59:32] [INFO ] Invariant cache hit.
[2023-03-16 14:00:03] [INFO ] Performed 95801/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:00:20] [INFO ] Dead Transitions using invariants and state equation in 47932 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 49260 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 569 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 14:00:21] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 14:00:21] [INFO ] Invariant cache hit.
[2023-03-16 14:00:30] [INFO ] Implicit Places using invariants in 8519 ms returned []
Implicit Place search using SMT only with invariants took 8522 ms to find 0 implicit places.
[2023-03-16 14:00:30] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 14:00:30] [INFO ] Invariant cache hit.
[2023-03-16 14:01:00] [INFO ] Performed 90258/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:01:20] [INFO ] Dead Transitions using invariants and state equation in 50078 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59176 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Treatment of property RERS17pb114-PT-8-LTLFireability-02 finished in 305174 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1543 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:01:28] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:01:28] [INFO ] Computed 18 place invariants in 272 ms
[2023-03-16 14:01:37] [INFO ] Implicit Places using invariants in 9227 ms returned []
Implicit Place search using SMT only with invariants took 9230 ms to find 0 implicit places.
[2023-03-16 14:01:37] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:01:37] [INFO ] Invariant cache hit.
[2023-03-16 14:02:07] [INFO ] Performed 92888/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:02:26] [INFO ] Dead Transitions using invariants and state equation in 49562 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 60342 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 51 ms :[(NOT p0)]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-03 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (GEQ s536 1) (GEQ s577 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 8 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-03 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-03 finished in 60873 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(p0))'
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1252 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:02:28] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:02:28] [INFO ] Invariant cache hit.
[2023-03-16 14:02:37] [INFO ] Implicit Places using invariants in 8936 ms returned []
Implicit Place search using SMT only with invariants took 8937 ms to find 0 implicit places.
[2023-03-16 14:02:37] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:02:37] [INFO ] Invariant cache hit.
[2023-03-16 14:03:07] [INFO ] Performed 90513/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:03:27] [INFO ] Dead Transitions using invariants and state equation in 50089 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 60293 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 108 ms :[true, (NOT p0)]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-04 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={} source=1 dest: 0}, { cond=p0, acceptance={} source=1 dest: 1}]], initial=1, aps=[p0:(OR (LT s1013 1) (LT s1382 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, terminal, very-weak, weak, inherently-weak], stateDesc=[null, null][true, true]]
Product exploration timeout after 91490 steps with 0 reset in 10001 ms.
Product exploration timeout after 99760 steps with 0 reset in 10001 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 194 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 46 ms :[true, (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 490 ms. (steps per millisecond=20 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 81 ms. (steps per millisecond=123 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6809 steps, run timeout after 3006 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6809 steps, saw 5851 distinct states, run finished after 3006 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:03:53] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:03:53] [INFO ] Invariant cache hit.
[2023-03-16 14:03:53] [INFO ] [Real]Absence check using 18 positive place invariants in 15 ms returned sat
[2023-03-16 14:04:15] [INFO ] After 21613ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:04:15] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:04:18] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:04:18] [INFO ] After 25026ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1508 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1513 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 578 ms. (steps per millisecond=17 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 68 ms. (steps per millisecond=147 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6257 steps, run timeout after 3001 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6257 steps, saw 5783 distinct states, run finished after 3001 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:04:23] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:04:24] [INFO ] Computed 18 place invariants in 367 ms
[2023-03-16 14:04:24] [INFO ] [Real]Absence check using 18 positive place invariants in 16 ms returned sat
[2023-03-16 14:04:46] [INFO ] After 21867ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:04:46] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:04:49] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:04:49] [INFO ] After 25032ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1167 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1167 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1201 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:04:51] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:04:51] [INFO ] Invariant cache hit.
[2023-03-16 14:05:00] [INFO ] Implicit Places using invariants in 8452 ms returned []
Implicit Place search using SMT only with invariants took 8455 ms to find 0 implicit places.
[2023-03-16 14:05:00] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:05:00] [INFO ] Invariant cache hit.
[2023-03-16 14:05:30] [INFO ] Performed 96533/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:05:47] [INFO ] Dead Transitions using invariants and state equation in 47162 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 56836 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 160 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 39 ms :[true, (NOT p0)]
Stuttering acceptance computed with spot in 58 ms :[true, (NOT p0)]
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 1128 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:05:49] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:05:49] [INFO ] Computed 18 place invariants in 272 ms
[2023-03-16 14:05:58] [INFO ] Implicit Places using invariants in 9599 ms returned []
Implicit Place search using SMT only with invariants took 9602 ms to find 0 implicit places.
[2023-03-16 14:05:58] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:05:58] [INFO ] Invariant cache hit.
[2023-03-16 14:06:28] [INFO ] Performed 90268/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:06:49] [INFO ] Dead Transitions using invariants and state equation in 50553 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 61289 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 139 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 38 ms :[true, (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 560 ms. (steps per millisecond=17 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6740 steps, run timeout after 3001 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6740 steps, saw 5796 distinct states, run finished after 3002 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:06:54] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:06:54] [INFO ] Invariant cache hit.
[2023-03-16 14:06:54] [INFO ] [Real]Absence check using 18 positive place invariants in 15 ms returned sat
[2023-03-16 14:07:16] [INFO ] After 21455ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:07:16] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:07:19] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:07:19] [INFO ] After 25031ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1705 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1710 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 701 ms. (steps per millisecond=14 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6154 steps, run timeout after 3006 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6154 steps, saw 5692 distinct states, run finished after 3006 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:07:25] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:07:25] [INFO ] Computed 18 place invariants in 365 ms
[2023-03-16 14:07:25] [INFO ] [Real]Absence check using 18 positive place invariants in 16 ms returned sat
[2023-03-16 14:07:47] [INFO ] After 21052ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:07:47] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:07:50] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:07:50] [INFO ] After 25039ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1095 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1096 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1129 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:07:53] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:07:53] [INFO ] Invariant cache hit.
[2023-03-16 14:08:02] [INFO ] Implicit Places using invariants in 9449 ms returned []
Implicit Place search using SMT only with invariants took 9450 ms to find 0 implicit places.
[2023-03-16 14:08:02] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:08:02] [INFO ] Invariant cache hit.
[2023-03-16 14:08:32] [INFO ] Performed 92604/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:08:51] [INFO ] Dead Transitions using invariants and state equation in 49247 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 59845 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Knowledge obtained : [p0, (X p0), true, (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 245 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 52 ms :[true, (NOT p0)]
Stuttering acceptance computed with spot in 51 ms :[true, (NOT p0)]
Stuttering acceptance computed with spot in 57 ms :[true, (NOT p0)]
Product exploration timeout after 95690 steps with 0 reset in 10001 ms.
Product exploration timeout after 98150 steps with 0 reset in 10001 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 1013 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:09:13] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:09:14] [INFO ] Computed 18 place invariants in 373 ms
[2023-03-16 14:09:23] [INFO ] Implicit Places using invariants in 9735 ms returned []
Implicit Place search using SMT only with invariants took 9736 ms to find 0 implicit places.
[2023-03-16 14:09:23] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:09:23] [INFO ] Invariant cache hit.
[2023-03-16 14:09:53] [INFO ] Performed 92307/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:10:13] [INFO ] Dead Transitions using invariants and state equation in 49621 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 60375 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Treatment of property RERS17pb114-PT-8-LTLFireability-04 finished in 471949 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0||(p1 U G(p2))) U G(!p3)))'
Support contains 6 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1457 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:10:20] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:10:20] [INFO ] Invariant cache hit.
[2023-03-16 14:10:29] [INFO ] Implicit Places using invariants in 8593 ms returned []
Implicit Place search using SMT only with invariants took 8595 ms to find 0 implicit places.
[2023-03-16 14:10:29] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:10:29] [INFO ] Invariant cache hit.
[2023-03-16 14:10:59] [INFO ] Performed 91861/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:11:19] [INFO ] Dead Transitions using invariants and state equation in 50158 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 60217 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 299 ms :[p3, true, (NOT p2), (NOT p2), p3, (AND p0 (NOT p2) p3), (OR (AND p0 (NOT p2) p3) (AND p1 (NOT p2) p3))]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-07 automaton TGBA Formula[mat=[[{ cond=(OR (AND (NOT p3) p0) (AND (NOT p3) p2) (AND (NOT p3) p1)), acceptance={} source=0 dest: 0}, { cond=(OR (AND p3 p0) (AND p3 p2) (AND p3 p1)), acceptance={0} source=0 dest: 0}, { cond=(AND p3 (NOT p0) (NOT p2) (NOT p1)), acceptance={} source=0 dest: 1}, { cond=(AND p3 (NOT p0) p2 (NOT p1)), acceptance={} source=0 dest: 2}, { cond=(AND p3 (NOT p0) p1), acceptance={} source=0 dest: 3}, { cond=(AND (NOT p3) (NOT p0) (NOT p2) (NOT p1)), acceptance={} source=0 dest: 4}, { cond=(AND (NOT p3) (NOT p0) p1), acceptance={} source=0 dest: 5}, { cond=(AND (NOT p3) (NOT p0) p2 (NOT p1)), acceptance={} source=0 dest: 6}], [{ cond=true, acceptance={0} source=1 dest: 1}], [{ cond=(NOT p2), acceptance={} source=2 dest: 1}, { cond=p2, acceptance={} source=2 dest: 2}], [{ cond=(AND (NOT p2) (NOT p1)), acceptance={} source=3 dest: 1}, { cond=(AND p2 (NOT p1)), acceptance={} source=3 dest: 2}, { cond=(AND p2 p1), acceptance={} source=3 dest: 3}, { cond=(AND (NOT p2) p1), acceptance={0} source=3 dest: 3}], [{ cond=p3, acceptance={} source=4 dest: 1}, { cond=(NOT p3), acceptance={} source=4 dest: 4}], [{ cond=(AND p3 p0 (NOT p2) (NOT p1)), acceptance={} source=5 dest: 1}, { cond=(AND p3 p0 p2 (NOT p1)), acceptance={} source=5 dest: 2}, { cond=(AND p3 p0 p1), acceptance={} source=5 dest: 3}, { cond=(AND (NOT p3) p0 (NOT p2) (NOT p1)), acceptance={} source=5 dest: 4}, { cond=(AND (NOT p3) p0 p1), acceptance={} source=5 dest: 5}, { cond=(AND (NOT p3) p0 p2 (NOT p1)), acceptance={} source=5 dest: 6}], [{ cond=(OR (AND p3 p0 (NOT p2)) (AND p3 (NOT p2) p1)), acceptance={} source=6 dest: 1}, { cond=(OR (AND p3 p0 p2) (AND p3 p2 p1)), acceptance={} source=6 dest: 2}, { cond=(OR (AND (NOT p3) p0 (NOT p2)) (AND (NOT p3) (NOT p2) p1)), acceptance={} source=6 dest: 4}, { cond=(OR (AND (NOT p3) p0 p2) (AND (NOT p3) p2 p1)), acceptance={} source=6 dest: 6}]], initial=0, aps=[p3:(AND (GEQ s705 1) (GEQ s1269 1) (GEQ s249 1) (GEQ s1275 1)), p0:(AND (GEQ s1127 1) (GEQ s1256 1)), p2:(AND (GEQ s705 1) (GEQ s1269 1)), p1:(AND (GEQ s2...], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null, null, null, null, null, null][true, true, true, true, true, true, true]]
Product exploration timeout after 95110 steps with 0 reset in 10001 ms.
Product exploration explored 100000 steps with 0 reset in 9513 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p3) (NOT p0) (NOT p2) (NOT p1)), (X (NOT (AND (NOT p2) p1))), (X (NOT p3)), (X (NOT (OR (AND p3 p0 p2) (AND p3 p2 p1)))), (X (AND (NOT p2) (NOT p1))), (X (NOT p2)), (X (NOT (AND (NOT p3) p0 (NOT p2) (NOT p1)))), (X (NOT (OR (AND p3 p0 (NOT p2)) (AND p3 (NOT p2) p1)))), (X (AND (NOT p3) (NOT p0) (NOT p2) (NOT p1))), (X (NOT (AND p2 p1))), (X (NOT (AND p3 p0 (NOT p2) (NOT p1)))), (X (NOT (OR (AND (NOT p3) p0 p2) (AND (NOT p3) p2 p1)))), (X (NOT (AND p3 (NOT p0) (NOT p2) (NOT p1)))), (X (NOT (AND p3 (NOT p0) p2 (NOT p1)))), (X (NOT (AND p3 p0 p1))), (X (NOT (OR (AND (NOT p3) p0) (AND (NOT p3) p2) (AND (NOT p3) p1)))), (X (NOT (AND (NOT p3) p0 p2 (NOT p1)))), (X (NOT (OR (AND (NOT p3) p0 (NOT p2)) (AND (NOT p3) (NOT p2) p1)))), (X (NOT (AND p3 p0 p2 (NOT p1)))), (X (NOT (AND (NOT p3) p0 p1))), (X (NOT (AND p3 (NOT p0) p1))), (X (NOT (AND (NOT p3) (NOT p0) p2 (NOT p1)))), (X (NOT (OR (AND p3 p0) (AND p3 p2) (AND p3 p1)))), (X (NOT (AND (NOT p3) (NOT p0) p1))), (X (NOT (AND p2 (NOT p1)))), (X (X (NOT p3))), (X (X (AND (NOT p2) (NOT p1)))), (X (X (NOT (OR (AND p3 p0 (NOT p2)) (AND p3 (NOT p2) p1))))), (X (X (NOT (AND p3 (NOT p0) (NOT p2) (NOT p1))))), true, (X (X (NOT (AND p3 (NOT p0) p2 (NOT p1))))), (X (X (NOT (AND (NOT p3) p0 p2 (NOT p1))))), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (OR (AND p3 p0 p2) (AND p3 p2 p1))))), (X (X (NOT p2))), (X (X (NOT (AND (NOT p3) p0 (NOT p2) (NOT p1))))), (X (X (AND (NOT p3) (NOT p0) (NOT p2) (NOT p1)))), (X (X (NOT (AND p2 p1)))), (X (X (NOT (AND p3 p0 (NOT p2) (NOT p1))))), (X (X (NOT (OR (AND (NOT p3) p0 p2) (AND (NOT p3) p2 p1))))), (X (X (NOT (AND p3 p0 p1)))), (X (X (NOT (OR (AND (NOT p3) p0) (AND (NOT p3) p2) (AND (NOT p3) p1))))), (X (X (NOT (OR (AND (NOT p3) p0 (NOT p2)) (AND (NOT p3) (NOT p2) p1))))), (X (X (NOT (AND p3 p0 p2 (NOT p1))))), (X (X (NOT (AND (NOT p3) p0 p1)))), (X (X (NOT (AND p3 (NOT p0) p1)))), (X (X (NOT (AND (NOT p3) (NOT p0) p2 (NOT p1))))), (X (X (NOT (OR (AND p3 p0) (AND p3 p2) (AND p3 p1))))), (X (X (NOT (AND (NOT p3) (NOT p0) p1)))), (X (X (NOT (AND p2 (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 50 factoid took 2289 ms. Reduced automaton from 7 states, 27 edges and 4 AP (stutter insensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 90 ms :[true, p3, p3]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 747 ms. (steps per millisecond=13 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 91 ms. (steps per millisecond=109 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6454 steps, run timeout after 3001 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6454 steps, saw 5570 distinct states, run finished after 3001 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:11:47] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:11:47] [INFO ] Invariant cache hit.
[2023-03-16 14:11:47] [INFO ] [Real]Absence check using 18 positive place invariants in 14 ms returned sat
[2023-03-16 14:12:07] [INFO ] After 20185ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:12:08] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:12:12] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:12:12] [INFO ] After 25023ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 4 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1583 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1586 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 740 ms. (steps per millisecond=13 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 71 ms. (steps per millisecond=140 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 5400 steps, run timeout after 3005 ms. (steps per millisecond=1 ) properties seen :{}
Probabilistic random walk after 5400 steps, saw 5007 distinct states, run finished after 3005 ms. (steps per millisecond=1 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:12:17] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:12:18] [INFO ] Computed 18 place invariants in 359 ms
[2023-03-16 14:12:18] [INFO ] [Real]Absence check using 18 positive place invariants in 15 ms returned sat
[2023-03-16 14:12:39] [INFO ] After 21433ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:12:40] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:12:43] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:12:43] [INFO ] After 25030ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 4 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1291 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1293 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1263 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:12:45] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:12:45] [INFO ] Invariant cache hit.
[2023-03-16 14:12:54] [INFO ] Implicit Places using invariants in 9006 ms returned []
Implicit Place search using SMT only with invariants took 9011 ms to find 0 implicit places.
[2023-03-16 14:12:54] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:12:54] [INFO ] Invariant cache hit.
[2023-03-16 14:13:25] [INFO ] Performed 91398/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:13:44] [INFO ] Dead Transitions using invariants and state equation in 49811 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 60100 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Knowledge obtained : [(AND (NOT p3) (NOT p0) (NOT p2) (NOT p1)), (X (NOT (AND (NOT p2) p1))), (X (NOT p3)), (X (NOT (OR (AND p3 p0 p2) (AND p3 p2 p1)))), (X (AND (NOT p2) (NOT p1))), (X (NOT p2)), (X (NOT (AND (NOT p3) p0 (NOT p2) (NOT p1)))), (X (NOT (OR (AND p3 p0 (NOT p2)) (AND p3 (NOT p2) p1)))), (X (AND (NOT p3) (NOT p0) (NOT p2) (NOT p1))), (X (NOT (AND p2 p1))), (X (NOT (AND p3 p0 (NOT p2) (NOT p1)))), (X (NOT (OR (AND (NOT p3) p0 p2) (AND (NOT p3) p2 p1)))), (X (NOT (AND p3 (NOT p0) (NOT p2) (NOT p1)))), (X (NOT (AND p3 (NOT p0) p2 (NOT p1)))), (X (NOT (AND p3 p0 p1))), (X (NOT (OR (AND (NOT p3) p0) (AND (NOT p3) p2) (AND (NOT p3) p1)))), (X (NOT (AND (NOT p3) p0 p2 (NOT p1)))), (X (NOT (OR (AND (NOT p3) p0 (NOT p2)) (AND (NOT p3) (NOT p2) p1)))), (X (NOT (AND p3 p0 p2 (NOT p1)))), (X (NOT (AND (NOT p3) p0 p1))), (X (NOT (AND p3 (NOT p0) p1))), (X (NOT (AND (NOT p3) (NOT p0) p2 (NOT p1)))), (X (NOT (OR (AND p3 p0) (AND p3 p2) (AND p3 p1)))), (X (NOT (AND (NOT p3) (NOT p0) p1))), (X (NOT (AND p2 (NOT p1)))), (X (X (NOT p3))), (X (X (AND (NOT p2) (NOT p1)))), (X (X (NOT (OR (AND p3 p0 (NOT p2)) (AND p3 (NOT p2) p1))))), (X (X (NOT (AND p3 (NOT p0) (NOT p2) (NOT p1))))), true, (X (X (NOT (AND p3 (NOT p0) p2 (NOT p1))))), (X (X (NOT (AND (NOT p3) p0 p2 (NOT p1))))), (X (X (NOT (AND (NOT p2) p1)))), (X (X (NOT (OR (AND p3 p0 p2) (AND p3 p2 p1))))), (X (X (NOT p2))), (X (X (NOT (AND (NOT p3) p0 (NOT p2) (NOT p1))))), (X (X (AND (NOT p3) (NOT p0) (NOT p2) (NOT p1)))), (X (X (NOT (AND p2 p1)))), (X (X (NOT (AND p3 p0 (NOT p2) (NOT p1))))), (X (X (NOT (OR (AND (NOT p3) p0 p2) (AND (NOT p3) p2 p1))))), (X (X (NOT (AND p3 p0 p1)))), (X (X (NOT (OR (AND (NOT p3) p0) (AND (NOT p3) p2) (AND (NOT p3) p1))))), (X (X (NOT (OR (AND (NOT p3) p0 (NOT p2)) (AND (NOT p3) (NOT p2) p1))))), (X (X (NOT (AND p3 p0 p2 (NOT p1))))), (X (X (NOT (AND (NOT p3) p0 p1)))), (X (X (NOT (AND p3 (NOT p0) p1)))), (X (X (NOT (AND (NOT p3) (NOT p0) p2 (NOT p1))))), (X (X (NOT (OR (AND p3 p0) (AND p3 p2) (AND p3 p1))))), (X (X (NOT (AND (NOT p3) (NOT p0) p1)))), (X (X (NOT (AND p2 (NOT p1)))))]
False Knowledge obtained : []
Knowledge based reduction with 50 factoid took 1997 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 104 ms :[true, p3, p3]
Stuttering acceptance computed with spot in 74 ms :[true, p3, p3]
Support contains 4 out of 1428 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 648 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:13:47] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:13:48] [INFO ] Computed 18 place invariants in 387 ms
[2023-03-16 14:13:57] [INFO ] Implicit Places using invariants in 9284 ms returned []
Implicit Place search using SMT only with invariants took 9287 ms to find 0 implicit places.
[2023-03-16 14:13:57] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:13:57] [INFO ] Invariant cache hit.
[2023-03-16 14:14:27] [INFO ] Performed 91184/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:14:47] [INFO ] Dead Transitions using invariants and state equation in 49846 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59790 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(NOT p3), (X (NOT p3)), true, (X (X (NOT p3)))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 175 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 81 ms :[true, p3, p3]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 956 ms. (steps per millisecond=10 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 5263 steps, run timeout after 3007 ms. (steps per millisecond=1 ) properties seen :{}
Probabilistic random walk after 5263 steps, saw 4556 distinct states, run finished after 3010 ms. (steps per millisecond=1 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:14:52] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:14:52] [INFO ] Invariant cache hit.
[2023-03-16 14:14:53] [INFO ] [Real]Absence check using 18 positive place invariants in 15 ms returned sat
[2023-03-16 14:15:14] [INFO ] After 21517ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:15:15] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:15:18] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:15:18] [INFO ] After 25030ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 1 ms.
Support contains 4 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1466 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1470 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 837 ms. (steps per millisecond=11 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 5488 steps, run timeout after 3004 ms. (steps per millisecond=1 ) properties seen :{}
Probabilistic random walk after 5488 steps, saw 5088 distinct states, run finished after 3004 ms. (steps per millisecond=1 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:15:23] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:15:24] [INFO ] Computed 18 place invariants in 308 ms
[2023-03-16 14:15:24] [INFO ] [Real]Absence check using 18 positive place invariants in 13 ms returned sat
[2023-03-16 14:15:46] [INFO ] After 21691ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:15:46] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:15:49] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:15:49] [INFO ] After 25032ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 4 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1318 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1319 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1155 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:15:51] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:15:51] [INFO ] Invariant cache hit.
[2023-03-16 14:16:00] [INFO ] Implicit Places using invariants in 9256 ms returned []
Implicit Place search using SMT only with invariants took 9257 ms to find 0 implicit places.
[2023-03-16 14:16:00] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:16:00] [INFO ] Invariant cache hit.
[2023-03-16 14:16:31] [INFO ] Performed 94312/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:16:49] [INFO ] Dead Transitions using invariants and state equation in 48642 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 59084 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Knowledge obtained : [(NOT p3), (X (NOT p3)), true, (X (X (NOT p3)))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 146 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 105 ms :[true, p3, p3]
Stuttering acceptance computed with spot in 83 ms :[true, p3, p3]
Stuttering acceptance computed with spot in 95 ms :[true, p3, p3]
Product exploration timeout after 93270 steps with 0 reset in 10001 ms.
Product exploration timeout after 92260 steps with 0 reset in 10001 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 103 ms :[true, p3, p3]
Support contains 4 out of 1428 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 1020 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:17:11] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:17:12] [INFO ] Computed 18 place invariants in 294 ms
[2023-03-16 14:17:42] [INFO ] Performed 96164/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:17:59] [INFO ] Dead Transitions using invariants and state equation in 47932 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 48959 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Support contains 4 out of 1428 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 597 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:18:00] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:18:00] [INFO ] Invariant cache hit.
[2023-03-16 14:18:09] [INFO ] Implicit Places using invariants in 9218 ms returned []
Implicit Place search using SMT only with invariants took 9222 ms to find 0 implicit places.
[2023-03-16 14:18:09] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:18:09] [INFO ] Invariant cache hit.
[2023-03-16 14:18:39] [INFO ] Performed 97657/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:18:55] [INFO ] Dead Transitions using invariants and state equation in 46339 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 56163 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Treatment of property RERS17pb114-PT-8-LTLFireability-07 finished in 523435 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(F(p0))))'
Support contains 4 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 739 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 14:19:03] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
// Phase 1: matrix 84691 rows 1429 cols
[2023-03-16 14:19:03] [INFO ] Computed 18 place invariants in 315 ms
[2023-03-16 14:19:13] [INFO ] Implicit Places using invariants in 9547 ms returned []
Implicit Place search using SMT only with invariants took 9551 ms to find 0 implicit places.
[2023-03-16 14:19:13] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 14:19:13] [INFO ] Invariant cache hit.
[2023-03-16 14:19:43] [INFO ] Performed 94315/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:20:01] [INFO ] Dead Transitions using invariants and state equation in 48221 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58523 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Stuttering acceptance computed with spot in 130 ms :[(NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-09 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 0}], [{ cond=true, acceptance={} source=2 dest: 1}]], initial=2, aps=[p0:(OR (AND (GEQ s1144 1) (GEQ s1171 1)) (AND (GEQ s754 1) (GEQ s886 1)))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null][false, false, false]]
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 5 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-09 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-09 finished in 59147 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!((F(p0)&&F(p1)))'
Support contains 4 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1146 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:20:03] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:20:03] [INFO ] Computed 18 place invariants in 306 ms
[2023-03-16 14:20:12] [INFO ] Implicit Places using invariants in 9315 ms returned []
Implicit Place search using SMT only with invariants took 9317 ms to find 0 implicit places.
[2023-03-16 14:20:12] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:20:12] [INFO ] Invariant cache hit.
[2023-03-16 14:20:42] [INFO ] Performed 92534/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:21:01] [INFO ] Dead Transitions using invariants and state equation in 49313 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 59780 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 151 ms :[(NOT p1), (NOT p0), (OR (NOT p0) (NOT p1))]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-10 automaton TGBA Formula[mat=[[{ cond=(NOT p1), acceptance={0} source=0 dest: 0}], [{ cond=(NOT p0), acceptance={0} source=1 dest: 1}], [{ cond=(AND p0 (NOT p1)), acceptance={0} source=2 dest: 0}, { cond=(AND (NOT p0) p1), acceptance={0} source=2 dest: 1}, { cond=(AND (NOT p0) (NOT p1)), acceptance={0} source=2 dest: 2}]], initial=2, aps=[p1:(AND (GEQ s94 1) (GEQ s1055 1)), p0:(AND (GEQ s18 1) (GEQ s79 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, colored, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant, very-weak, weak, inherently-weak], stateDesc=[null, null, null][true, true, true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 10 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-10 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-10 finished in 60501 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X(X(X(F(p0)))))'
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 793 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 14:21:03] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
// Phase 1: matrix 84691 rows 1429 cols
[2023-03-16 14:21:03] [INFO ] Computed 18 place invariants in 299 ms
[2023-03-16 14:21:12] [INFO ] Implicit Places using invariants in 8836 ms returned []
Implicit Place search using SMT only with invariants took 8837 ms to find 0 implicit places.
[2023-03-16 14:21:12] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 14:21:12] [INFO ] Invariant cache hit.
[2023-03-16 14:21:42] [INFO ] Performed 92706/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:22:01] [INFO ] Dead Transitions using invariants and state equation in 49449 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59086 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Stuttering acceptance computed with spot in 164 ms :[(NOT p0), (NOT p0), (NOT p0), (NOT p0)]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-11 automaton TGBA Formula[mat=[[{ cond=(NOT p0), acceptance={0} source=0 dest: 0}], [{ cond=true, acceptance={} source=1 dest: 0}], [{ cond=true, acceptance={} source=2 dest: 3}], [{ cond=true, acceptance={} source=3 dest: 1}]], initial=2, aps=[p0:(AND (GEQ s250 1) (GEQ s881 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, very-weak, weak, inherently-weak], stateDesc=[null, null, null, null][false, false, false, false]]
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 5 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-11 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-11 finished in 59748 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F((G(p1)||p0))))'
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1326 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:22:03] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:22:03] [INFO ] Computed 18 place invariants in 268 ms
[2023-03-16 14:22:12] [INFO ] Implicit Places using invariants in 8878 ms returned []
Implicit Place search using SMT only with invariants took 8894 ms to find 0 implicit places.
[2023-03-16 14:22:12] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:22:12] [INFO ] Invariant cache hit.
[2023-03-16 14:22:42] [INFO ] Performed 97030/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:23:00] [INFO ] Dead Transitions using invariants and state equation in 47913 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 58151 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 97 ms :[(AND (NOT p1) (NOT p0)), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-12 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}], [{ cond=(AND p1 (NOT p0)), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p1:(OR (LT s196 1) (LT s351 1)), p0:(OR (LT s196 1) (LT s351 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Product exploration explored 100000 steps with 0 reset in 9120 ms.
Product exploration explored 100000 steps with 0 reset in 9094 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND p1 p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT (AND p1 (NOT p0)))), (X (X (NOT (AND (NOT p1) (NOT p0))))), (X (X (NOT (AND p1 (NOT p0)))))]
False Knowledge obtained : []
Knowledge based reduction with 5 factoid took 198 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 4 edges and 2 AP (stutter insensitive).
Stuttering acceptance computed with spot in 60 ms :[(AND (NOT p0) (NOT p1)), (AND (NOT p0) (NOT p1))]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 783 ms. (steps per millisecond=12 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 67 ms. (steps per millisecond=149 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 2) seen :0
Interrupted probabilistic random walk after 6474 steps, run timeout after 3003 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6474 steps, saw 5586 distinct states, run finished after 3004 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 2 properties.
[2023-03-16 14:23:24] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:23:24] [INFO ] Invariant cache hit.
[2023-03-16 14:23:24] [INFO ] [Real]Absence check using 18 positive place invariants in 13 ms returned sat
[2023-03-16 14:23:46] [INFO ] After 21446ms SMT Verify possible using state equation in real domain returned unsat :1 sat :1
[2023-03-16 14:23:46] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:23:49] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:23:49] [INFO ] After 25034ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Fused 2 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1830 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1837 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 750 ms. (steps per millisecond=13 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 66 ms. (steps per millisecond=151 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6034 steps, run timeout after 3002 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6034 steps, saw 5586 distinct states, run finished after 3002 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:23:55] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:23:55] [INFO ] Computed 18 place invariants in 289 ms
[2023-03-16 14:23:56] [INFO ] [Real]Absence check using 18 positive place invariants in 13 ms returned sat
[2023-03-16 14:24:17] [INFO ] After 21165ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:24:17] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:251)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:24:20] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:24:20] [INFO ] After 25029ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1121 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1122 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1125 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:24:23] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:24:23] [INFO ] Invariant cache hit.
[2023-03-16 14:24:32] [INFO ] Implicit Places using invariants in 8887 ms returned []
Implicit Place search using SMT only with invariants took 8901 ms to find 0 implicit places.
[2023-03-16 14:24:32] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:24:32] [INFO ] Invariant cache hit.
[2023-03-16 14:25:02] [INFO ] Performed 90107/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:25:21] [INFO ] Dead Transitions using invariants and state equation in 49245 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 59288 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Found 1 invariant AP formulas.
Knowledge obtained : [(AND p1 p0), (X (NOT (AND (NOT p1) (NOT p0)))), (X (NOT (AND p1 (NOT p0)))), (X (X (NOT (AND (NOT p1) (NOT p0))))), (X (X (NOT (AND p1 (NOT p0))))), (G (NOT (AND (NOT p0) p1)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 208 ms. Reduced automaton from 2 states, 4 edges and 2 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 80 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 73 ms :[(NOT p0), (NOT p0)]
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 1010 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:25:23] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:25:23] [INFO ] Computed 18 place invariants in 280 ms
[2023-03-16 14:25:33] [INFO ] Implicit Places using invariants in 10127 ms returned []
Implicit Place search using SMT only with invariants took 10128 ms to find 0 implicit places.
[2023-03-16 14:25:33] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:25:33] [INFO ] Invariant cache hit.
[2023-03-16 14:26:03] [INFO ] Performed 91696/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:26:22] [INFO ] Dead Transitions using invariants and state equation in 49596 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 60739 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 118 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 70 ms :[(NOT p0), (NOT p0)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 728 ms. (steps per millisecond=13 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 64 ms. (steps per millisecond=156 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6384 steps, run timeout after 3004 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6384 steps, saw 5512 distinct states, run finished after 3006 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:26:28] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:26:28] [INFO ] Invariant cache hit.
[2023-03-16 14:26:28] [INFO ] [Real]Absence check using 18 positive place invariants in 13 ms returned sat
[2023-03-16 14:26:49] [INFO ] After 21135ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:26:50] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:26:53] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:26:53] [INFO ] After 25030ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1531 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1536 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 558 ms. (steps per millisecond=17 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 187 ms. (steps per millisecond=53 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 5698 steps, run timeout after 3007 ms. (steps per millisecond=1 ) properties seen :{}
Probabilistic random walk after 5698 steps, saw 5281 distinct states, run finished after 3007 ms. (steps per millisecond=1 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:26:58] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:26:59] [INFO ] Computed 18 place invariants in 379 ms
[2023-03-16 14:26:59] [INFO ] [Real]Absence check using 18 positive place invariants in 15 ms returned sat
[2023-03-16 14:27:20] [INFO ] After 20901ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:27:21] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStutteringLTLTest(LTLPropertySolver.java:225)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.runStructuralLTLCheck(LTLPropertySolver.java:76)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:762)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:27:24] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:27:24] [INFO ] After 25030ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1173 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1173 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1177 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:27:26] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:27:26] [INFO ] Invariant cache hit.
[2023-03-16 14:27:35] [INFO ] Implicit Places using invariants in 9275 ms returned []
Implicit Place search using SMT only with invariants took 9277 ms to find 0 implicit places.
[2023-03-16 14:27:36] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:27:36] [INFO ] Invariant cache hit.
[2023-03-16 14:28:06] [INFO ] Performed 90466/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:28:26] [INFO ] Dead Transitions using invariants and state equation in 50252 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 60723 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Knowledge obtained : [p0, (X p0), (X (X p0))]
False Knowledge obtained : []
Knowledge based reduction with 3 factoid took 123 ms. Reduced automaton from 2 states, 3 edges and 1 AP (stutter insensitive) to 2 states, 3 edges and 1 AP (stutter insensitive).
Stuttering acceptance computed with spot in 70 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 74 ms :[(NOT p0), (NOT p0)]
Stuttering acceptance computed with spot in 81 ms :[(NOT p0), (NOT p0)]
Product exploration explored 100000 steps with 0 reset in 8166 ms.
Product exploration explored 100000 steps with 0 reset in 8039 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 997 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:28:44] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:28:44] [INFO ] Computed 18 place invariants in 261 ms
[2023-03-16 14:28:52] [INFO ] Implicit Places using invariants in 8316 ms returned []
Implicit Place search using SMT only with invariants took 8327 ms to find 0 implicit places.
[2023-03-16 14:28:52] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:28:52] [INFO ] Invariant cache hit.
[2023-03-16 14:29:22] [INFO ] Performed 91456/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:29:42] [INFO ] Dead Transitions using invariants and state equation in 49526 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 58860 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Treatment of property RERS17pb114-PT-8-LTLFireability-12 finished in 466774 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F(G(p0)))'
Support contains 2 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1296 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:29:50] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:29:50] [INFO ] Invariant cache hit.
[2023-03-16 14:29:59] [INFO ] Implicit Places using invariants in 9055 ms returned []
Implicit Place search using SMT only with invariants took 9057 ms to find 0 implicit places.
[2023-03-16 14:29:59] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:29:59] [INFO ] Invariant cache hit.
[2023-03-16 14:30:29] [INFO ] Performed 92472/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:30:48] [INFO ] Dead Transitions using invariants and state equation in 49592 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 59951 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 53 ms :[(NOT p0)]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-13 automaton TGBA Formula[mat=[[{ cond=p0, acceptance={} source=0 dest: 0}, { cond=(NOT p0), acceptance={0} source=0 dest: 0}]], initial=0, aps=[p0:(AND (GEQ s32 1) (GEQ s281 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-invariant], stateDesc=[null][true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 8 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-13 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-13 finished in 60516 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(F((G(F(p0))||G(p1))))'
Support contains 4 out of 1429 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1097 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:30:50] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:30:50] [INFO ] Invariant cache hit.
[2023-03-16 14:31:00] [INFO ] Implicit Places using invariants in 9554 ms returned []
Implicit Place search using SMT only with invariants took 9556 ms to find 0 implicit places.
[2023-03-16 14:31:00] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:31:00] [INFO ] Invariant cache hit.
[2023-03-16 14:31:30] [INFO ] Performed 92994/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:31:49] [INFO ] Dead Transitions using invariants and state equation in 49672 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 60332 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Stuttering acceptance computed with spot in 89 ms :[(AND (NOT p1) (NOT p0)), (AND (NOT p1) (NOT p0))]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-14 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 0}, { cond=(AND (NOT p1) (NOT p0)), acceptance={} source=0 dest: 1}], [{ cond=(AND p1 (NOT p0)), acceptance={} source=1 dest: 1}, { cond=(AND (NOT p1) (NOT p0)), acceptance={0} source=1 dest: 1}]], initial=0, aps=[p1:(AND (GEQ s200 1) (GEQ s217 1)), p0:(AND (GEQ s238 1) (GEQ s1111 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-invariant], stateDesc=[null, null][true, true]]
Stuttering criterion allowed to conclude after 0 steps with 0 reset in 9 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-14 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-14 finished in 61065 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(X((p0 U ((p1||X(G(!p2))) U p3))))'
Support contains 8 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Applied a total of 0 rules in 789 ms. Remains 1429 /1429 variables (removed 0) and now considering 151085/151085 (removed 0) transitions.
[2023-03-16 14:31:51] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
// Phase 1: matrix 84691 rows 1429 cols
[2023-03-16 14:31:51] [INFO ] Computed 18 place invariants in 336 ms
[2023-03-16 14:32:00] [INFO ] Implicit Places using invariants in 8899 ms returned []
Implicit Place search using SMT only with invariants took 8900 ms to find 0 implicit places.
[2023-03-16 14:32:00] [INFO ] Flow matrix only has 84691 transitions (discarded 66394 similar events)
[2023-03-16 14:32:00] [INFO ] Invariant cache hit.
[2023-03-16 14:32:30] [INFO ] Performed 90982/151085 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:32:50] [INFO ] Dead Transitions using invariants and state equation in 49982 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 59703 ms. Remains : 1429/1429 places, 151085/151085 transitions.
Stuttering acceptance computed with spot in 180 ms :[(NOT p3), (NOT p3), p2, (NOT p3), true]
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-15 automaton TGBA Formula[mat=[[{ cond=true, acceptance={} source=0 dest: 1}], [{ cond=(AND (NOT p3) p0), acceptance={0} source=1 dest: 1}, { cond=(AND (NOT p3) (NOT p1) (NOT p0)), acceptance={} source=1 dest: 2}, { cond=(AND (NOT p3) (NOT p0)), acceptance={} source=1 dest: 3}], [{ cond=(NOT p2), acceptance={} source=2 dest: 2}, { cond=p2, acceptance={} source=2 dest: 4}], [{ cond=(AND (NOT p3) (NOT p1)), acceptance={} source=3 dest: 2}, { cond=(NOT p3), acceptance={0} source=3 dest: 3}], [{ cond=true, acceptance={0} source=4 dest: 4}]], initial=0, aps=[p3:(AND (GEQ s499 1) (GEQ s565 1)), p0:(AND (GEQ s267 1) (GEQ s1103 1)), p1:(AND (GEQ s189 1) (GEQ s1033 1)), p2:(AND (GEQ s479 1) (GEQ s722 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, no-univ-branch, stutter-sensitive], stateDesc=[null, null, null, null, null][false, false, false, false, false]]
Stuttering criterion allowed to conclude after 1 steps with 0 reset in 5 ms.
FORMULA RERS17pb114-PT-8-LTLFireability-15 FALSE TECHNIQUES STUTTER_TEST
Treatment of property RERS17pb114-PT-8-LTLFireability-15 finished in 60378 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G((p0||X(G(p1)))))'
Found a Lengthening insensitive property : RERS17pb114-PT-8-LTLFireability-02
Stuttering acceptance computed with spot in 77 ms :[true, (AND (NOT p0) (NOT p1)), (NOT p1)]
Support contains 4 out of 1429 places. Attempting structural reductions.
Starting structural reductions in LI_LTL mode, iteration 0 : 1429/1429 places, 151085/151085 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 1081 ms. Remains 1428 /1429 variables (removed 1) and now considering 151084/151085 (removed 1) transitions.
[2023-03-16 14:32:52] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:32:52] [INFO ] Computed 18 place invariants in 284 ms
[2023-03-16 14:33:01] [INFO ] Implicit Places using invariants in 9096 ms returned []
Implicit Place search using SMT only with invariants took 9106 ms to find 0 implicit places.
[2023-03-16 14:33:01] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:33:01] [INFO ] Invariant cache hit.
[2023-03-16 14:33:31] [INFO ] Performed 90134/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:33:52] [INFO ] Dead Transitions using invariants and state equation in 50932 ms found 0 transitions.
Finished structural reductions in LI_LTL mode , in 1 iterations and 61138 ms. Remains : 1428/1429 places, 151084/151085 transitions.
Running random walk in product with property : RERS17pb114-PT-8-LTLFireability-02 automaton TGBA Formula[mat=[[{ cond=true, acceptance={0} source=0 dest: 0}], [{ cond=p0, acceptance={} source=1 dest: 1}, { cond=(NOT p0), acceptance={} source=1 dest: 2}], [{ cond=(NOT p1), acceptance={} source=2 dest: 0}, { cond=p1, acceptance={} source=2 dest: 2}]], initial=1, aps=[p0:(AND (GEQ s173 1) (GEQ s1016 1)), p1:(OR (LT s775 1) (LT s999 1))], nbAcceptance=1, properties=[trans-labels, explicit-labels, trans-acc, complete, deterministic, no-univ-branch, unambiguous, semi-deterministic, stutter-sensitive, terminal, very-weak, weak, inherently-weak, sl-invariant], stateDesc=[null, null, null][false, false, false]]
Product exploration explored 100000 steps with 0 reset in 8289 ms.
Product exploration timeout after 84940 steps with 0 reset in 10001 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [(AND (NOT p0) p1), (X p1), (X (NOT p0)), true, (X (X p1)), (X (X (NOT p0)))]
False Knowledge obtained : []
Knowledge based reduction with 6 factoid took 227 ms. Reduced automaton from 3 states, 5 edges and 2 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 82 ms :[true, (NOT p1), (NOT p1)]
Finished random walk after 8498 steps, including 2 resets, run visited all 1 properties in 360 ms. (steps per millisecond=23 )
Knowledge obtained : [(AND (NOT p0) p1), (X p1), (X (NOT p0)), true, (X (X p1)), (X (X (NOT p0)))]
False Knowledge obtained : [(F (NOT p1))]
Knowledge based reduction with 6 factoid took 334 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 76 ms :[true, (NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 78 ms :[true, (NOT p1), (NOT p1)]
Support contains 2 out of 1428 places. Attempting structural reductions.
Property had overlarge support with respect to TGBA, discarding it for now.
Starting structural reductions in LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 577 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:34:13] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:34:13] [INFO ] Invariant cache hit.
[2023-03-16 14:34:22] [INFO ] Implicit Places using invariants in 8792 ms returned []
Implicit Place search using SMT only with invariants took 8798 ms to find 0 implicit places.
[2023-03-16 14:34:22] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:34:22] [INFO ] Invariant cache hit.
[2023-03-16 14:34:52] [INFO ] Performed 92206/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:35:12] [INFO ] Dead Transitions using invariants and state equation in 49610 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 58995 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Computed a total of 0 stabilizing places and 0 stable transitions
Knowledge obtained : [p1, (X p1), true, (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 141 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 74 ms :[true, (NOT p1), (NOT p1)]
Incomplete random walk after 10000 steps, including 2 resets, run finished after 733 ms. (steps per millisecond=13 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 59 ms. (steps per millisecond=169 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6362 steps, run timeout after 3007 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6362 steps, saw 5494 distinct states, run finished after 3007 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:35:17] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:35:17] [INFO ] Invariant cache hit.
[2023-03-16 14:35:17] [INFO ] [Real]Absence check using 18 positive place invariants in 13 ms returned sat
[2023-03-16 14:35:38] [INFO ] After 20674ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:35:39] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Broken pipe ...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:35:42] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:35:42] [INFO ] After 25019ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Drop transitions removed 512 transitions
Reduce isomorphic transitions removed 512 transitions.
Iterating post reduction 0 with 512 rules applied. Total rules applied 512 place count 1428 transition count 150572
Applied a total of 512 rules in 1359 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/151084 (removed 512) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1362 ms. Remains : 1428/1428 places, 150572/151084 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 688 ms. (steps per millisecond=14 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 60 ms. (steps per millisecond=166 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 6290 steps, run timeout after 3001 ms. (steps per millisecond=2 ) properties seen :{}
Probabilistic random walk after 6290 steps, saw 5812 distinct states, run finished after 3002 ms. (steps per millisecond=2 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-16 14:35:48] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
// Phase 1: matrix 84689 rows 1428 cols
[2023-03-16 14:35:48] [INFO ] Computed 18 place invariants in 291 ms
[2023-03-16 14:35:48] [INFO ] [Real]Absence check using 18 positive place invariants in 14 ms returned sat
[2023-03-16 14:36:09] [INFO ] After 20822ms SMT Verify possible using state equation in real domain returned unsat :0 sat :1
[2023-03-16 14:36:10] [INFO ] State equation strengthened by 773 read => feed constraints.
java.lang.RuntimeException: SMT solver raised an error when submitting script. Raised (error "Failed to assert expression: java.io.IOException: Stream close...
at fr.lip6.move.gal.structural.smt.SMTUtils.execAndCheckResult(SMTUtils.java:251)
at fr.lip6.move.gal.structural.smt.DeadlockTester.verifyPossible(DeadlockTester.java:642)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMTIncremental(DeadlockTester.java:339)
at fr.lip6.move.gal.structural.smt.DeadlockTester.testUnreachableWithSMT(DeadlockTester.java:223)
at fr.lip6.move.gal.application.solver.ReachabilitySolver.applyReductions(ReachabilitySolver.java:95)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.addInvarianceKnowledge(LTLPropertySolver.java:701)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.applyKnowledgeBasedReductions(LTLPropertySolver.java:568)
at fr.lip6.move.gal.application.solver.ltl.LTLPropertySolver.checkLTLProperty(LTLPropertySolver.java:261)
at fr.lip6.move.gal.application.solver.ltl.LTLLengthAwareSolver.runSLCLLTLTest(LTLLengthAwareSolver.java:100)
at fr.lip6.move.gal.application.Application.startNoEx(Application.java:764)
at fr.lip6.move.gal.application.Application.start(Application.java:178)
at fr.lip6.move.gal.itscl.application.Application.start(Application.java:45)
at org.eclipse.equinox.internal.app.EclipseAppHandle.run(EclipseAppHandle.java:203)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.runApplication(EclipseAppLauncher.java:136)
at org.eclipse.core.runtime.internal.adaptor.EclipseAppLauncher.start(EclipseAppLauncher.java:104)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:402)
at org.eclipse.core.runtime.adaptor.EclipseStarter.run(EclipseStarter.java:255)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke0(Native Method)
at java.base/jdk.internal.reflect.NativeMethodAccessorImpl.invoke(NativeMethodAccessorImpl.java:77)
at java.base/jdk.internal.reflect.DelegatingMethodAccessorImpl.invoke(DelegatingMethodAccessorImpl.java:43)
at java.base/java.lang.reflect.Method.invoke(Method.java:568)
at org.eclipse.equinox.launcher.Main.invokeFramework(Main.java:659)
at org.eclipse.equinox.launcher.Main.basicRun(Main.java:596)
at org.eclipse.equinox.launcher.Main.run(Main.java:1467)
at org.eclipse.equinox.launcher.Main.main(Main.java:1440)
[2023-03-16 14:36:13] [WARNING] SMT solver failed with error :SMT solver raised an error when submitting script.... while checking expressions.
[2023-03-16 14:36:13] [INFO ] After 25014ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 1 ms.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1227 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 1227 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 1428/1428 places, 150572/150572 transitions.
Applied a total of 0 rules in 1282 ms. Remains 1428 /1428 variables (removed 0) and now considering 150572/150572 (removed 0) transitions.
[2023-03-16 14:36:16] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:36:16] [INFO ] Invariant cache hit.
[2023-03-16 14:36:25] [INFO ] Implicit Places using invariants in 9289 ms returned []
Implicit Place search using SMT only with invariants took 9290 ms to find 0 implicit places.
[2023-03-16 14:36:25] [INFO ] Flow matrix only has 84689 transitions (discarded 65883 similar events)
[2023-03-16 14:36:25] [INFO ] Invariant cache hit.
[2023-03-16 14:36:55] [INFO ] Performed 91790/150572 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:37:15] [INFO ] Dead Transitions using invariants and state equation in 49957 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 60566 ms. Remains : 1428/1428 places, 150572/150572 transitions.
Knowledge obtained : [p1, (X p1), true, (X (X p1))]
False Knowledge obtained : []
Knowledge based reduction with 4 factoid took 141 ms. Reduced automaton from 3 states, 4 edges and 1 AP (stutter sensitive) to 3 states, 4 edges and 1 AP (stutter sensitive).
Stuttering acceptance computed with spot in 114 ms :[true, (NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 94 ms :[true, (NOT p1), (NOT p1)]
Stuttering acceptance computed with spot in 77 ms :[true, (NOT p1), (NOT p1)]
Product exploration explored 100000 steps with 0 reset in 9377 ms.
Product exploration explored 100000 steps with 0 reset in 9220 ms.
Applying partial POR strategy [true, false, true]
Stuttering acceptance computed with spot in 110 ms :[true, (NOT p1), (NOT p1)]
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in SI_LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 968 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:37:36] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
// Phase 1: matrix 84690 rows 1428 cols
[2023-03-16 14:37:36] [INFO ] Computed 18 place invariants in 357 ms
[2023-03-16 14:38:06] [INFO ] Performed 95920/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:38:24] [INFO ] Dead Transitions using invariants and state equation in 48640 ms found 0 transitions.
Finished structural reductions in SI_LTL mode , in 1 iterations and 49617 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Support contains 2 out of 1428 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 1428/1428 places, 151084/151084 transitions.
Applied a total of 0 rules in 724 ms. Remains 1428 /1428 variables (removed 0) and now considering 151084/151084 (removed 0) transitions.
[2023-03-16 14:38:25] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:38:25] [INFO ] Invariant cache hit.
[2023-03-16 14:38:34] [INFO ] Implicit Places using invariants in 8588 ms returned []
Implicit Place search using SMT only with invariants took 8588 ms to find 0 implicit places.
[2023-03-16 14:38:34] [INFO ] Flow matrix only has 84690 transitions (discarded 66394 similar events)
[2023-03-16 14:38:34] [INFO ] Invariant cache hit.
[2023-03-16 14:39:04] [INFO ] Performed 89652/151084 'is it Dead' test of which 0 returned DEAD in 30 seconds.
[2023-03-16 14:39:25] [INFO ] Dead Transitions using invariants and state equation in 51021 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 60342 ms. Remains : 1428/1428 places, 151084/151084 transitions.
Treatment of property RERS17pb114-PT-8-LTLFireability-02 finished in 400849 ms.
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(p0))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(((p0||(p1 U G(p2))) U G(!p3)))'
Running Spot : '/home/mcc/BenchKit/itstools/itstools/plugins/fr.lip6.ltl.spot.binaries_1.0.0.202303021504/bin/ltl2tgba-linux64' '--check=stutter' '--hoaf=tv' '-f' '!(G(F((G(p1)||p0))))'
[2023-03-16 14:39:35] [INFO ] Flatten gal took : 3313 ms
[2023-03-16 14:39:35] [INFO ] Export to MCC of 4 properties in file /home/mcc/execution/LTLFireability.sr.xml took 1 ms.
[2023-03-16 14:39:35] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 1429 places, 151085 transitions and 604235 arcs took 298 ms.
Total runtime 2959795 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT RERS17pb114-PT-8
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
LTLFireability
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393232 kB
MemFree: 14271744 kB
After kill :
MemTotal: 16393232 kB
MemFree: 15897952 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination LTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/LTLFireability.xml
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 33 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 38 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 43 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 48 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 53 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 58 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 63 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 68 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 73 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 78 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 83 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 88 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 93 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 98 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 103 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 108 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 113 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 118 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 123 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 128 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 133 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 138 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 143 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 148 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 153 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 158 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 163 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 168 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 173 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 178 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 183 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 188 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 193 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 198 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 203 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 208 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 213 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 218 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 223 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 228 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 233 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 238 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 243 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 248 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 253 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 258 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 263 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 268 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 273 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 278 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 283 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 288 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 293 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 298 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 303 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 308 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 313 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 318 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 323 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 328 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 333 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 338 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 343 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 348 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 353 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 358 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 363 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 368 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 373 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 378 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 383 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 388 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 393 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 398 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 403 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 408 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 413 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 418 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 423 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 428 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 433 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 438 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 443 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 448 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 453 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 458 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 463 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 468 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 473 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 478 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 483 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 488 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 493 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 498 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 503 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 508 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 513 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 518 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 523 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 528 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 533 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 538 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 543 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 548 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 553 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 558 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 563 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 568 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 573 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 578 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 583 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 588 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 593 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 598 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 603 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 608 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 613 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 618 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 623 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 628 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb114-PT-8-LTLFireability-02: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-07: LTL 0 0 0 0 0 0 0 0
RERS17pb114-PT-8-LTLFireability-12: LTL 0 0 0 0 0 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 633 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 4
lola: caught signal Terminated - aborting LoLA

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
RERS17pb114-PT-8-LTLFireability-02: LTL unknown AGGR
RERS17pb114-PT-8-LTLFireability-04: AG unknown AGGR
RERS17pb114-PT-8-LTLFireability-07: LTL unknown AGGR
RERS17pb114-PT-8-LTLFireability-12: LTL unknown AGGR


Time elapsed: 637 secs. Pages in use: 0

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb114-PT-8"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is RERS17pb114-PT-8, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r327-tall-167889199200132"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb114-PT-8.tgz
mv RERS17pb114-PT-8 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;