About the Execution of LoLA for ResAllocation-PT-R050C002
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
1103.695 | 40155.00 | 38041.00 | 185.20 | TT?FFFFFTFFFFFF? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r326-tall-167889198800764.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ResAllocation-PT-R050C002, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r326-tall-167889198800764
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 704K
-rw-r--r-- 1 mcc users 6.6K Feb 25 15:30 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 25 15:30 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 25 15:29 CTLFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 25 15:29 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.7K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:45 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:45 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:45 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:45 LTLFireability.xml
-rw-r--r-- 1 mcc users 16K Feb 25 15:32 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 167K Feb 25 15:32 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 25 15:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 64K Feb 25 15:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:45 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:45 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 212K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-00
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-01
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-02
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-03
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-04
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-05
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-06
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-07
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-08
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-09
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-10
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-11
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-12
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-13
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-14
FORMULA_NAME ResAllocation-PT-R050C002-LTLFireability-15
=== Now, execution of the tool begins
BK_START 1679078290899
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ResAllocation-PT-R050C002
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT ResAllocation-PT-R050C002
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability
FORMULA ResAllocation-PT-R050C002-LTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ResAllocation-PT-R050C002-LTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1679078331054
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:499
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:496
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:524
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:527
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 ResAllocation-PT-R050C002-LTLFireability-00
lola: time limit : 112 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-00
lola: result : true
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 ResAllocation-PT-R050C002-LTLFireability-10
lola: time limit : 116 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 43 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-10
lola: result : false
lola: markings : 1029
lola: fired transitions : 1029
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 50 (type EXCL) for 45 ResAllocation-PT-R050C002-LTLFireability-11
lola: time limit : 128 sec
lola: memory limit: 32 pages
lola: FINISHED task # 50 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-11
lola: result : false
lola: markings : 1919
lola: fired transitions : 1919
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 59 (type EXCL) for 58 ResAllocation-PT-R050C002-LTLFireability-14
lola: time limit : 149 sec
lola: memory limit: 32 pages
lola: FINISHED task # 59 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-14
lola: result : false
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 56 (type EXCL) for 55 ResAllocation-PT-R050C002-LTLFireability-13
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: FINISHED task # 56 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-13
lola: result : false
lola: markings : 285
lola: fired transitions : 298
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 53 (type EXCL) for 52 ResAllocation-PT-R050C002-LTLFireability-12
lola: time limit : 189 sec
lola: memory limit: 32 pages
lola: FINISHED task # 53 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-12
lola: result : false
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 34 (type EXCL) for 33 ResAllocation-PT-R050C002-LTLFireability-07
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-07
lola: result : false
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 26 ResAllocation-PT-R050C002-LTLFireability-06
lola: time limit : 239 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-06
lola: result : false
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ResAllocation-PT-R050C002-LTLFireability-01
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-01
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 14 (type EXCL) for 9 ResAllocation-PT-R050C002-LTLFireability-03
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 14 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-03
lola: result : false
lola: markings : 1769
lola: fired transitions : 1769
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 ResAllocation-PT-R050C002-LTLFireability-08
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-08
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 19 ResAllocation-PT-R050C002-LTLFireability-05
lola: time limit : 449 sec
lola: memory limit: 32 pages
lola: FINISHED task # 22 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-05
lola: result : true
lola: markings : 12
lola: fired transitions : 14
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 17 (type EXCL) for 16 ResAllocation-PT-R050C002-LTLFireability-04
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 17 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-04
lola: result : false
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type EXCL) for 39 ResAllocation-PT-R050C002-LTLFireability-09
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 64 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-09
lola: result : true
lola: markings : 105
lola: fired transitions : 105
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 7 (type EXCL) for 6 ResAllocation-PT-R050C002-LTLFireability-02
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R050C002-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R050C002-LTLFireability-05: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R050C002-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 4/1199 9/32 ResAllocation-PT-R050C002-LTLFireability-02 1361372 m, 272274 m/sec, 6819899 t fired, .
Time elapsed: 5 secs. Pages in use: 9
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R050C002-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R050C002-LTLFireability-05: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R050C002-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 9/1199 17/32 ResAllocation-PT-R050C002-LTLFireability-02 2525338 m, 232793 m/sec, 13157150 t fired, .
Time elapsed: 10 secs. Pages in use: 17
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ResAllocation-PT-R050C002-LTLFireability-02: LTL 0 0 1 0 1 0 0 0
ResAllocation-PT-R050C002-LTLFireability-05: CONJ 0 1 0 0 3 0 0 0
ResAllocation-PT-R050C002-LTLFireability-15: LTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 LTL EXCL 14/1199 28/32 ResAllocation-PT-R050C002-LTLFireability-02 4160938 m, 327120 m/sec, 18776506 t fired, .
Time elapsed: 15 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-02 (memory limit exceeded)
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ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
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lola: LAUNCH task # 62 (type EXCL) for 61 ResAllocation-PT-R050C002-LTLFireability-15
lola: time limit : 1789 sec
lola: memory limit: 32 pages
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ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
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62 LTL EXCL 4/1789 11/32 ResAllocation-PT-R050C002-LTLFireability-15 1573808 m, 314761 m/sec, 8684574 t fired, .
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ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
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ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
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ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
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ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
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ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
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lola: CANCELED task # 62 (type EXCL) for ResAllocation-PT-R050C002-LTLFireability-15 (memory limit exceeded)
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ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
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lola: result : false
lola: markings : 106
lola: fired transitions : 106
lola: time used : 0.000000
lola: memory pages used : 1
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ResAllocation-PT-R050C002-LTLFireability-00: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-01: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-02: LTL unknown AGGR
ResAllocation-PT-R050C002-LTLFireability-03: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-04: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-05: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-06: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-07: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-08: LTL true LTL model checker
ResAllocation-PT-R050C002-LTLFireability-09: F false state space / EG
ResAllocation-PT-R050C002-LTLFireability-10: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-11: CONJ false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-12: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-13: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-14: LTL false LTL model checker
ResAllocation-PT-R050C002-LTLFireability-15: LTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ResAllocation-PT-R050C002"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ResAllocation-PT-R050C002, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r326-tall-167889198800764"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ResAllocation-PT-R050C002.tgz
mv ResAllocation-PT-R050C002 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;