About the Execution of LoLA for RERS17pb115-PT-4
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 16217.775 | 2342841.00 | 9120764.00 | 15258.50 | [undef] | Cannot compute |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r326-tall-167889198100173.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is RERS17pb115-PT-4, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r326-tall-167889198100173
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 70M
-rw-r--r-- 1 mcc users 6.4K Feb 25 13:57 CTLCardinality.txt
-rw-r--r-- 1 mcc users 70K Feb 25 13:57 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 25 13:54 CTLFireability.txt
-rw-r--r-- 1 mcc users 35K Feb 25 13:54 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:39 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 14:07 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 120K Feb 25 14:07 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 13K Feb 25 14:01 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 25 14:01 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 69M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of positive values
NUM_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-00
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-01
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-02
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-03
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-04
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-05
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-06
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-07
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-08
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-09
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-10
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-11
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-12
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-13
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-14
FORMULA_NAME RERS17pb115-PT-4-UpperBounds-15
=== Now, execution of the tool begins
BK_START 1678989329353
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=UpperBounds
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb115-PT-4
Not applying reductions.
Model is PT
UpperBounds PT
starting LoLA
BK_INPUT RERS17pb115-PT-4
BK_EXAMINATION: UpperBounds
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
Upper Bounds
BK_STOP 1678991672194
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/UpperBounds.xml
lola: Rule S: 0 transitions removed,0 places removed
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb115-PT-4-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 6 secs. Pages in use: 0
# running tasks: 0 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb115-PT-4-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 11 secs. Pages in use: 0
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
RERS17pb115-PT-4-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 16 secs. Pages in use: 0
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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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RERS17pb115-PT-4-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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RERS17pb115-PT-4-UpperBounds-00: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
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RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
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RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-13: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-14: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-15: BOUND 0 0 0 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
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RERS17pb115-PT-4-UpperBounds-01: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-02: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-03: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-04: BOUND 0 0 0 0 1 0 0 0
RERS17pb115-PT-4-UpperBounds-05: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-06: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-07: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-08: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-09: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-10: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-11: BOUND 0 0 0 0 0 0 0 0
RERS17pb115-PT-4-UpperBounds-12: BOUND 0 0 0 0 0 0 0 0
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/home/mcc/BenchKit/bin//../lola/bin//../BenchKit_head.sh: line 63: 375 Killed lola --conf=$BIN_DIR/configfiles/upperboundsconf --formula=$DIR/UpperBounds.xml $DIR/model.pnml
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb115-PT-4"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is RERS17pb115-PT-4, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r326-tall-167889198100173"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb115-PT-4.tgz
mv RERS17pb115-PT-4 execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;