fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r326-tall-167889198000142
Last Updated
May 14, 2023

About the Execution of LoLA for RERS17pb114-PT-9

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
16193.867 3600000.00 3649050.00 11573.70 [undef] Time out reached

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r326-tall-167889198000142.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is RERS17pb114-PT-9, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r326-tall-167889198000142
=====================================================================


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preparation of the directory to be used:
/home/mcc/execution
total 73M
-rw-r--r-- 1 mcc users 8.7K Feb 26 05:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 99K Feb 26 05:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.7K Feb 26 04:57 CTLFireability.txt
-rw-r--r-- 1 mcc users 47K Feb 26 04:57 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:41 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:39 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:39 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:39 LTLFireability.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:39 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 05:11 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 162K Feb 26 05:11 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 6.8K Feb 26 05:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 37K Feb 26 05:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:39 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:39 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 73M Mar 5 18:23 model.pnml

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content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-00
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-01
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-02
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-03
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-04
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-05
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-06
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-07
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-08
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-09
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-10
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-11
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-12
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-13
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-14
FORMULA_NAME RERS17pb114-PT-9-ReachabilityCardinality-15

=== Now, execution of the tool begins

BK_START 1678977432410

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=RERS17pb114-PT-9
Not applying reductions.
Model is PT
ReachabilityCardinality PT
starting LoLA
BK_INPUT RERS17pb114-PT-9
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393216 kB
MemFree: 155876 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16245452 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
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RERS17pb114-PT-9-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-00: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-01: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-02: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-07: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-03: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-04: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-05: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-06: AG 0 0 0 0 0 0 0 0
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RERS17pb114-PT-9-ReachabilityCardinality-08: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
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RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
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RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
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RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
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RERS17pb114-PT-9-ReachabilityCardinality-09: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-10: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-11: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-12: EF 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-13: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-14: AG 0 0 0 0 0 0 0 0
RERS17pb114-PT-9-ReachabilityCardinality-15: EF 0 0 0 0 0 0 0 0

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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="RERS17pb114-PT-9"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is RERS17pb114-PT-9, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r326-tall-167889198000142"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/RERS17pb114-PT-9.tgz
mv RERS17pb114-PT-9 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' ReachabilityCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;