Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r321-tall-167889192100397.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool marcie
Input is Railroad-PT-100, examination is UpperBounds
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 1
Run identifier is r321-tall-167889192100397
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.6M
-rw-r--r-- 1 mcc users 5.8K Feb 25 22:34 CTLCardinality.txt
-rw-r--r-- 1 mcc users 51K Feb 25 22:34 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.7K Feb 25 22:33 CTLFireability.txt
-rw-r--r-- 1 mcc users 34K Feb 25 22:33 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:41 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:42 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:42 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:42 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:42 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 25 22:38 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 110K Feb 25 22:38 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 25 22:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 79K Feb 25 22:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:42 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.7K Feb 25 16:42 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 5.2M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of positive values
NUM_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Railroad-PT-100-UpperBounds-00
FORMULA_NAME Railroad-PT-100-UpperBounds-01
FORMULA_NAME Railroad-PT-100-UpperBounds-02
FORMULA_NAME Railroad-PT-100-UpperBounds-03
FORMULA_NAME Railroad-PT-100-UpperBounds-04
FORMULA_NAME Railroad-PT-100-UpperBounds-05
FORMULA_NAME Railroad-PT-100-UpperBounds-06
FORMULA_NAME Railroad-PT-100-UpperBounds-07
FORMULA_NAME Railroad-PT-100-UpperBounds-08
FORMULA_NAME Railroad-PT-100-UpperBounds-09
FORMULA_NAME Railroad-PT-100-UpperBounds-10
FORMULA_NAME Railroad-PT-100-UpperBounds-11
FORMULA_NAME Railroad-PT-100-UpperBounds-12
FORMULA_NAME Railroad-PT-100-UpperBounds-13
FORMULA_NAME Railroad-PT-100-UpperBounds-14
FORMULA_NAME Railroad-PT-100-UpperBounds-15

=== Now, execution of the tool begins

BK_START 1678931575321

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=marcie
BK_EXAMINATION=UpperBounds
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Railroad-PT-100
Not applying reductions.
Model is PT
UpperBounds PT
timeout --kill-after=10s --signal=SIGINT 1m for testing only

Marcie built on Linux at 2019-11-18.
A model checker for Generalized Stochastic Petri nets

authors: Alex Tovchigrechko (IDD package and CTL model checking)

Martin Schwarick (Symbolic numerical analysis and CSL model checking)

Christian Rohr (Simulative and approximative numerical model checking)

marcie@informatik.tu-cottbus.de

called as: /home/mcc/BenchKit/bin//../marcie/bin/marcie --net-file=model.pnml --mcc-file=UpperBounds.xml --memory=6 --mcc-mode

parse successfull
net created successfully

Net: Railroad_PT_100
(NrP: 1018 NrTr: 10506 NrArc: 62728)

parse formulas
formulas created successfully
place and transition orderings generation:0m 1.614sec

net check time: 0m 0.010sec

init dd package: 0m 2.762sec

TIME LIMIT: Killed by timeout after 3600 seconds
MemTotal: 16393932 kB
MemFree: 10694416 kB
After kill :
MemTotal: 16393932 kB
MemFree: 16175560 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

check for maximal unmarked siphon
found
The net has a maximal unmarked siphon:
pl_P130_1
pl_P0_1
pl_P125_1
pl_P128_1
pl_P129_1
pl_P142_1
pl_P149_1
pl_P157_1
pl_P159_1
pl_P15_1
pl_P11_1
pl_P166_1
pl_P16_1
pl_P174_1
pl_P180_1
pl_P182_1
pl_P196_1
pl_P200_1
pl_P218_90
pl_P218_91
pl_P218_92
pl_P213_1
pl_P216_1
pl_P218_10
pl_P218_100
pl_P218_101
pl_P218_11
pl_P218_12
pl_P218_13
pl_P218_14
pl_P218_15
pl_P218_16
pl_P218_17
pl_P218_18
pl_P218_19
pl_P218_2
pl_P218_20
pl_P218_21
pl_P218_22
pl_P218_23
pl_P218_24
pl_P218_25
pl_P218_26
pl_P218_27
pl_P218_28
pl_P218_29
pl_P218_30
pl_P218_31
pl_P218_32
pl_P218_33
pl_P218_34
pl_P218_35
pl_P218_36
pl_P218_37
pl_P218_38
pl_P218_39
pl_P218_4
pl_P218_40
pl_P218_41
pl_P218_42
pl_P218_43
pl_P218_44
pl_P218_45
pl_P218_46
pl_P218_47
pl_P218_48
pl_P218_49
pl_P218_5
pl_P218_50
pl_P218_51
pl_P218_52
pl_P218_53
pl_P218_54
pl_P218_55
pl_P218_56
pl_P218_57
pl_P218_58
pl_P218_59
pl_P218_6
pl_P218_60
pl_P218_61
pl_P218_62
pl_P218_63
pl_P218_64
pl_P218_65
pl_P218_66
pl_P218_67
pl_P218_68
pl_P218_69
pl_P218_7
pl_P218_70
pl_P218_71
pl_P218_72
pl_P218_73
pl_P218_74
pl_P218_75
pl_P218_76
pl_P218_77
pl_P218_78
pl_P218_79
pl_P218_8
pl_P218_80
pl_P218_81
pl_P218_82
pl_P218_83
pl_P218_84
pl_P218_85
pl_P218_86
pl_P218_87
pl_P218_88
pl_P218_89
pl_P218_9
pl_P218_93
pl_P218_94
pl_P218_95
pl_P218_96
pl_P218_97
pl_P218_98
pl_P218_99
pl_P21_1
pl_P229_1
pl_P234_1
pl_P239_1
pl_P240_1
pl_P252_1
pl_P25_1
pl_P262_1
pl_P267_1
pl_P26_1
pl_P274_1
pl_P279_1
pl_P281_1
pl_P299_1
pl_P29_101
pl_P2_1
pl_P300_1
pl_P303_1
pl_P500_1
pl_P502_10
pl_P502_100
pl_P502_101
pl_P502_11
pl_P502_12
pl_P502_13
pl_P502_14
pl_P502_15
pl_P502_16
pl_P502_17
pl_P502_18
pl_P305_1
pl_P307_1
pl_P314_1
pl_P316_1
pl_P319_1
pl_P321_1
pl_P322_1
pl_P336_1
pl_P33_1
pl_P343_1
pl_P347_1
pl_P351_1
pl_P352_1
pl_P356_1
pl_P360_1
pl_P368_1
pl_P369_1
pl_P36_1
pl_P371_1
pl_P379_1
pl_P381_1
pl_P386_1
pl_P388_1
pl_P389_1
pl_P397_1
pl_P403_1
pl_P406_1
pl_P408_1
pl_P40_1
pl_P412_1
pl_P413_1
pl_P414_1
pl_P41_1
pl_P429_1
pl_P434_1
pl_P435_101
pl_P437_1
pl_P450_1
pl_P451_1
pl_P459_1
pl_P465_1
pl_P469_1
pl_P470_1
pl_P471_1
pl_P478_1
pl_P47_1
pl_P483_1
pl_P488_1
pl_P489_1
pl_P48_1
pl_P495_1
pl_P502_19
pl_P502_20
pl_P502_21
pl_P502_22
pl_P502_23
pl_P502_24
pl_P502_25
pl_P502_26
pl_P502_27
pl_P502_28
pl_P502_29
pl_P502_30
pl_P502_31
pl_P502_32
pl_P502_33
pl_P502_34
pl_P502_35
pl_P502_36
pl_P502_37
pl_P502_38
pl_P502_39
pl_P502_4
pl_P502_40
pl_P502_41
pl_P502_42
pl_P502_43
pl_P502_44
pl_P502_45
pl_P502_46
pl_P502_47
pl_P502_48
pl_P502_49
pl_P502_5
pl_P502_50
pl_P502_51
pl_P502_52
pl_P502_53
pl_P502_54
pl_P502_55
pl_P502_56
pl_P502_57
pl_P502_58
pl_P502_59
pl_P502_6
pl_P502_60
pl_P502_61
pl_P502_62
pl_P502_63
pl_P502_64
pl_P502_65
pl_P502_66
pl_P502_67
pl_P502_68
pl_P502_69
pl_P502_7
pl_P502_70
pl_P502_71
pl_P502_72
pl_P502_73
pl_P502_74
pl_P502_75
pl_P502_76
pl_P502_77
pl_P502_78
pl_P502_79
pl_P502_8
pl_P502_80
pl_P502_81
pl_P502_82
pl_P502_83
pl_P502_84
pl_P502_85
pl_P502_86
pl_P502_87
pl_P502_88
pl_P502_89
pl_P502_9
pl_P502_90
pl_P502_91
pl_P502_92
pl_P502_93
pl_P502_94
pl_P502_95
pl_P502_96
pl_P502_97
pl_P502_98
pl_P502_99
pl_P506_1
pl_P507_1
pl_P509_1
pl_P62_1
pl_P64_1
pl_P67_1
pl_P69_1
pl_P84_1
pl_P91_1
pl_P99_1
pl_P115_1
pl_P113_1
pl_P121_1
pl_P107_1

The net has transition(s) that can never fire:
tr_T135_9898
tr_T135_9797
tr_T135_5151
tr_T135_9595
tr_T135_5050
tr_T135_505
tr_T135_9494
tr_T135_9393
tr_T135_4949
tr_T135_9292
tr_T135_4848
tr_T135_9191
tr_T135_4747
tr_T135_9090
tr_T135_909
tr_T135_4646
tr_T135_8989
tr_T135_4545
tr_T135_8888
tr_T135_8787
tr_T135_4444
tr_T135_8686
tr_T135_4343
tr_T135_8585
tr_T135_4242
tr_T135_8484
tr_T135_4141
tr_T135_8383
tr_T135_8282
tr_T135_4040
tr_T135_404
tr_T135_8181
tr_T135_3939
tr_T135_8080
tr_T135_808
tr_T135_3838
tr_T135_7979
tr_T135_3737
tr_T135_7878
tr_T135_3636
tr_T135_7777
tr_T135_3535
tr_T135_7676
tr_T135_7575
tr_T135_3434
tr_T135_7474
tr_T135_3333
tr_T135_7373
tr_T135_3232
tr_T135_7272
tr_T135_3131
tr_T135_7171
tr_T135_3030
tr_T135_303
tr_T135_7070
tr_T135_707
tr_T135_6969
tr_T135_9999
tr_T135_2929
tr_T135_6868
tr_T135_2828
tr_T135_6767
tr_T135_2727
tr_T135_6666
tr_T135_2626
tr_T135_6565
tr_T135_6464
tr_T135_2525
tr_T135_6363
tr_T135_2424
tr_T135_6262
tr_T135_2323
tr_T135_6161
tr_T135_2222
tr_T135_6060
tr_T135_606
tr_T135_5959
tr_T135_2121
tr_T135_5858
tr_T135_2020
tr_T135_5757
tr_T135_1919
tr_T135_5656
tr_T135_1818
tr_T135_5555
tr_T135_1717
tr_T135_5454
tr_T135_1616
tr_T135_5353
tr_T135_1515
tr_T135_9696
tr_T135_5252
tr_T125_202
tr_T135_1010
tr_T135_10100
tr_T135_10201
tr_T135_1111
tr_T135_1212
tr_T135_1313
tr_T135_1414

check for constant places
pl_P0_1
pl_P107_1
pl_P113_1
pl_P115_1
pl_P11_1
pl_P121_1
pl_P125_1
pl_P128_1
pl_P129_1
pl_P130_1
pl_P142_1
pl_P149_1
pl_P157_1
pl_P159_1
pl_P15_1
pl_P166_1
pl_P16_1
pl_P174_1
pl_P180_1
pl_P182_1
pl_P196_1
pl_P200_1
pl_P213_1
pl_P216_1
pl_P218_10
pl_P218_100
pl_P218_101
pl_P218_11
pl_P218_12
pl_P218_13
pl_P218_14
pl_P218_15
pl_P218_16
pl_P218_17
pl_P218_18
pl_P218_19
pl_P218_2
pl_P218_20
pl_P218_21
pl_P218_22
pl_P218_23
pl_P218_24
pl_P218_25
pl_P218_26
pl_P218_27
pl_P218_28
pl_P218_29
pl_P218_30
pl_P218_31
pl_P218_32
pl_P218_33
pl_P218_34
pl_P218_35
pl_P218_36
pl_P218_37
pl_P218_38
pl_P218_39
pl_P218_4
pl_P218_40
pl_P218_41
pl_P218_42
pl_P218_43
pl_P218_44
pl_P218_45
pl_P218_46
pl_P218_47
pl_P218_48
pl_P218_49
pl_P218_5
pl_P218_50
pl_P218_51
pl_P218_52
pl_P218_53
pl_P218_54
pl_P218_55
pl_P218_56
pl_P218_57
pl_P218_58
pl_P218_59
pl_P218_6
pl_P218_60
pl_P218_61
pl_P218_62
pl_P218_63
pl_P218_64
pl_P218_65
pl_P218_66
pl_P218_67
pl_P218_68
pl_P218_69
pl_P218_7
pl_P218_70
pl_P218_71
pl_P218_72
pl_P218_73
pl_P218_74
pl_P218_75
pl_P218_76
pl_P218_77
pl_P218_78
pl_P218_79
pl_P218_8
pl_P218_80
pl_P218_81
pl_P218_82
pl_P218_83
pl_P218_84
pl_P218_85
pl_P218_86
pl_P218_87
pl_P218_88
pl_P218_89
pl_P218_9
pl_P218_90
pl_P218_91
pl_P218_92
pl_P218_93
pl_P218_94
pl_P218_95
pl_P218_96
pl_P218_97
pl_P218_98
pl_P218_99
pl_P21_1
pl_P229_1
pl_P234_1
pl_P239_1
pl_P240_1
pl_P252_1
pl_P25_1
pl_P262_1
pl_P267_1
pl_P26_1
pl_P274_1
pl_P279_1
pl_P281_1
pl_P299_1
pl_P2_1
pl_P300_1
pl_P303_1
pl_P305_1
pl_P307_1
pl_P314_1
pl_P316_1
pl_P319_1
pl_P321_1
pl_P322_1
pl_P336_1
pl_P33_1
pl_P343_1
pl_P347_1
pl_P351_1
pl_P352_1
pl_P356_1
pl_P360_1
pl_P368_1
pl_P369_1
pl_P36_1
pl_P371_1
pl_P379_1
pl_P381_1
pl_P386_1
pl_P388_1
pl_P389_1
pl_P397_1
pl_P403_1
pl_P406_1
pl_P408_1
pl_P40_1
pl_P412_1
pl_P413_1
pl_P414_1
pl_P41_1
pl_P429_1
pl_P434_1
pl_P437_1
pl_P450_1
pl_P451_1
pl_P459_1
pl_P465_1
pl_P469_1
pl_P470_1
pl_P471_1
pl_P478_1
pl_P47_1
pl_P483_1
pl_P488_1
pl_P489_1
pl_P48_1
pl_P495_1
pl_P500_1
pl_P502_10
pl_P502_100
pl_P502_101
pl_P502_11
pl_P502_12
pl_P502_13
pl_P502_14
pl_P502_15
pl_P502_16
pl_P502_17
pl_P502_18
pl_P502_19
pl_P502_20
pl_P502_21
pl_P502_22
pl_P502_23
pl_P502_24
pl_P502_25
pl_P502_26
pl_P502_27
pl_P502_28
pl_P502_29
pl_P502_30
pl_P502_31
pl_P502_32
pl_P502_33
pl_P502_34
pl_P502_35
pl_P502_36
pl_P502_37
pl_P502_38
pl_P502_39
pl_P502_4
pl_P502_40
pl_P502_41
pl_P502_42
pl_P502_43
pl_P502_44
pl_P502_45
pl_P502_46
pl_P502_47
pl_P502_48
pl_P502_49
pl_P502_5
pl_P502_50
pl_P502_51
pl_P502_52
pl_P502_53
pl_P502_54
pl_P502_55
pl_P502_56
pl_P502_57
pl_P502_58
pl_P502_59
pl_P502_6
pl_P502_60
pl_P502_61
pl_P502_62
pl_P502_63
pl_P502_64
pl_P502_65
pl_P502_66
pl_P502_67
pl_P502_68
pl_P502_69
pl_P502_7
pl_P502_70
pl_P502_71
pl_P502_72
pl_P502_73
pl_P502_74
pl_P502_75
pl_P502_76
pl_P502_77
pl_P502_78
pl_P502_79
pl_P502_8
pl_P502_80
pl_P502_81
pl_P502_82
pl_P502_83
pl_P502_84
pl_P502_85
pl_P502_86
pl_P502_87
pl_P502_88
pl_P502_89
pl_P502_9
pl_P502_90
pl_P502_91
pl_P502_92
pl_P502_93
pl_P502_94
pl_P502_95
pl_P502_96
pl_P502_97
pl_P502_98
pl_P502_99
pl_P506_1
pl_P507_1
pl_P509_1
pl_P62_1
pl_P64_1
pl_P67_1
pl_P69_1
pl_P84_1
pl_P91_1
pl_P99_1
found 299 constant places
check if there are places and transitions
ok
check if there are transitions without pre-places
ok
check if at least one transition is enabled in m0
ok
check if there are transitions that can never fire
ok


initing FirstDep: 0m 0.043sec

1735 3697 6320 9016 11850 14327 17458 20333 23522 26783 30212 33547 37096 40288 44322 48020 119713

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Railroad-PT-100"
export BK_EXAMINATION="UpperBounds"
export BK_TOOL="marcie"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool marcie"
echo " Input is Railroad-PT-100, examination is UpperBounds"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 1"
echo " Run identifier is r321-tall-167889192100397"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Railroad-PT-100.tgz
mv Railroad-PT-100 execution
cd execution
if [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "UpperBounds" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] || [ "UpperBounds" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "UpperBounds" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "UpperBounds" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "UpperBounds.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property UpperBounds.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "UpperBounds.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' UpperBounds.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "UpperBounds" = "ReachabilityDeadlock" ] || [ "UpperBounds" = "QuasiLiveness" ] || [ "UpperBounds" = "StableMarking" ] || [ "UpperBounds" = "Liveness" ] || [ "UpperBounds" = "OneSafe" ] ; then
echo "FORMULA_NAME UpperBounds"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;