About the Execution of LTSMin+red for QuasiCertifProtocol-PT-10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
3272.188 | 3585888.00 | 14306888.00 | 397.20 | ?????T??????T??? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r297-tall-167873951000874.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.....................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool ltsminxred
Input is QuasiCertifProtocol-PT-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r297-tall-167873951000874
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1000K
-rw-r--r-- 1 mcc users 30K Feb 26 01:23 CTLCardinality.txt
-rw-r--r-- 1 mcc users 235K Feb 26 01:23 CTLCardinality.xml
-rw-r--r-- 1 mcc users 9.4K Feb 26 01:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 68K Feb 26 01:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 6.3K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 37K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 35K Feb 26 01:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 262K Feb 26 01:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 26 01:24 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 63K Feb 26 01:24 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 5.2K Feb 25 16:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 149K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-00
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-01
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-02
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-03
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-04
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-05
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-06
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-07
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-08
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-09
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-10
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-11
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-12
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-13
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-14
FORMULA_NAME QuasiCertifProtocol-PT-10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1679666467330
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=ltsminxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=QuasiCertifProtocol-PT-10
Applying reductions before tool ltsmin
Invoking reducer
Running Version 202303021504
[2023-03-24 14:01:09] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-24 14:01:09] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-24 14:01:09] [INFO ] Load time of PNML (sax parser for PT used): 63 ms
[2023-03-24 14:01:09] [INFO ] Transformed 550 places.
[2023-03-24 14:01:09] [INFO ] Transformed 176 transitions.
[2023-03-24 14:01:09] [INFO ] Parsed PT model containing 550 places and 176 transitions and 1287 arcs in 138 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Support contains 502 out of 550 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 550/550 places, 176/176 transitions.
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 0 with 26 rules applied. Total rules applied 26 place count 524 transition count 176
Applied a total of 26 rules in 19 ms. Remains 524 /550 variables (removed 26) and now considering 176/176 (removed 0) transitions.
// Phase 1: matrix 176 rows 524 cols
[2023-03-24 14:01:09] [INFO ] Computed 350 place invariants in 36 ms
[2023-03-24 14:01:10] [INFO ] Implicit Places using invariants in 401 ms returned []
[2023-03-24 14:01:10] [INFO ] Invariant cache hit.
[2023-03-24 14:01:10] [INFO ] Implicit Places using invariants and state equation in 293 ms returned []
Implicit Place search using SMT with State Equation took 742 ms to find 0 implicit places.
[2023-03-24 14:01:10] [INFO ] Invariant cache hit.
[2023-03-24 14:01:10] [INFO ] Dead Transitions using invariants and state equation in 211 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 524/550 places, 176/176 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 976 ms. Remains : 524/550 places, 176/176 transitions.
Support contains 502 out of 524 places after structural reductions.
[2023-03-24 14:01:10] [INFO ] Flatten gal took : 69 ms
[2023-03-24 14:01:10] [INFO ] Flatten gal took : 52 ms
[2023-03-24 14:01:11] [INFO ] Input system was already deterministic with 176 transitions.
Incomplete random walk after 10000 steps, including 692 resets, run finished after 533 ms. (steps per millisecond=18 ) properties (out of 58) seen :11
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 35 ms. (steps per millisecond=28 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1000 steps, including 5 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1000 steps, including 7 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 47) seen :0
Running SMT prover for 47 properties.
[2023-03-24 14:01:12] [INFO ] Invariant cache hit.
[2023-03-24 14:01:12] [INFO ] [Real]Absence check using 0 positive and 350 generalized place invariants in 63 ms returned sat
[2023-03-24 14:01:13] [INFO ] After 805ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:46
[2023-03-24 14:01:13] [INFO ] [Nat]Absence check using 0 positive and 350 generalized place invariants in 79 ms returned sat
[2023-03-24 14:01:16] [INFO ] After 2021ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :45
[2023-03-24 14:01:17] [INFO ] After 3803ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :45
Attempting to minimize the solution found.
Minimization took 1234 ms.
[2023-03-24 14:01:19] [INFO ] After 6028ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :45
Fused 47 Parikh solutions to 44 different solutions.
Finished Parikh walk after 83 steps, including 0 resets, run visited all 6 properties in 4 ms. (steps per millisecond=20 )
Parikh walk visited 45 properties in 66 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 29 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 28 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 176 transitions.
Computed a total of 524 stabilizing places and 176 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 524 transition count 176
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA QuasiCertifProtocol-PT-10-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 45 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 45 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 20 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 19 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 10 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 28 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 18 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 4 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 19 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 33 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 7 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 14 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 15 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.5 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 36 ms. Remains 511 /524 variables (removed 13) and now considering 173/176 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 36 ms. Remains : 511/524 places, 173/176 transitions.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 12 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 13 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 173 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 7 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 13 ms
[2023-03-24 14:01:19] [INFO ] Flatten gal took : 13 ms
[2023-03-24 14:01:19] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.3 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 22 ms. Remains 511 /524 variables (removed 13) and now considering 173/176 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 23 ms. Remains : 511/524 places, 173/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 26 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 12 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 173 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.19 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Applied a total of 1 rules in 39 ms. Remains 512 /524 variables (removed 12) and now considering 174/176 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 39 ms. Remains : 512/524 places, 174/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 22 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 18 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 174 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.3 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 23 ms. Remains 511 /524 variables (removed 13) and now considering 173/176 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 24 ms. Remains : 511/524 places, 173/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 12 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 27 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 173 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.18 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 37 ms. Remains 511 /524 variables (removed 13) and now considering 173/176 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 511/524 places, 173/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 29 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 13 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 173 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 9 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 28 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 14 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 357 are kept as prefixes of interest. Removing 167 places using SCC suffix rule.15 ms
Discarding 167 places :
Also discarding 25 output transitions
Drop transitions removed 25 transitions
Reduce places removed 1 places and 1 transitions.
Ensure Unique test removed 22 transitions
Reduce isomorphic transitions removed 22 transitions.
Iterating post reduction 0 with 22 rules applied. Total rules applied 23 place count 356 transition count 128
Applied a total of 23 rules in 32 ms. Remains 356 /524 variables (removed 168) and now considering 128/176 (removed 48) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 32 ms. Remains : 356/524 places, 128/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 8 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 7 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 128 transitions.
Finished random walk after 816 steps, including 50 resets, run visited all 1 properties in 7 ms. (steps per millisecond=116 )
FORMULA QuasiCertifProtocol-PT-10-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 17 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 11 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 12 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.2 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 511 transition count 173
Applied a total of 2 rules in 30 ms. Remains 511 /524 variables (removed 13) and now considering 173/176 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 511/524 places, 173/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 11 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 12 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 173 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 6 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 11 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 12 ms
[2023-03-24 14:01:20] [INFO ] Input system was already deterministic with 176 transitions.
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 16 ms
[2023-03-24 14:01:20] [INFO ] Flatten gal took : 15 ms
[2023-03-24 14:01:20] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 18 ms.
[2023-03-24 14:01:20] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 524 places, 176 transitions and 1182 arcs took 2 ms.
Total runtime 11585 ms.
There are residual formulas that ITS could not solve within timeout
pnml2lts-sym model.pnml --lace-workers=4 --vset=lddmc --saturation=sat -rbs,w2W,ru,hf --sylvan-sizes=20,28,20,28 --ctl=/tmp/471/ctl_0_ --ctl=/tmp/471/ctl_1_ --ctl=/tmp/471/ctl_2_ --ctl=/tmp/471/ctl_3_ --ctl=/tmp/471/ctl_4_ --ctl=/tmp/471/ctl_5_ --ctl=/tmp/471/ctl_6_ --ctl=/tmp/471/ctl_7_ --ctl=/tmp/471/ctl_8_ --ctl=/tmp/471/ctl_9_ --ctl=/tmp/471/ctl_10_ --ctl=/tmp/471/ctl_11_ --ctl=/tmp/471/ctl_12_ --ctl=/tmp/471/ctl_13_ --mu-par --mu-opt
TIME LIMIT: Killed by timeout after 3570 seconds
MemTotal: 16393216 kB
MemFree: 12875540 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16096880 kB
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-00
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-01
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-02
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-03
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-04
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-06
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-07
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-08
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-09
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-10
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-11
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-13
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-14
Could not compute solution for formula : QuasiCertifProtocol-PT-10-CTLFireability-15
BK_STOP 1679670053218
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
mcc2023
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-00
ctl formula formula --ctl=/tmp/471/ctl_0_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-01
ctl formula formula --ctl=/tmp/471/ctl_1_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-02
ctl formula formula --ctl=/tmp/471/ctl_2_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-03
ctl formula formula --ctl=/tmp/471/ctl_3_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-04
ctl formula formula --ctl=/tmp/471/ctl_4_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-06
ctl formula formula --ctl=/tmp/471/ctl_5_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-07
ctl formula formula --ctl=/tmp/471/ctl_6_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-08
ctl formula formula --ctl=/tmp/471/ctl_7_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-09
ctl formula formula --ctl=/tmp/471/ctl_8_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-10
ctl formula formula --ctl=/tmp/471/ctl_9_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-11
ctl formula formula --ctl=/tmp/471/ctl_10_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-13
ctl formula formula --ctl=/tmp/471/ctl_11_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-14
ctl formula formula --ctl=/tmp/471/ctl_12_
ctl formula name QuasiCertifProtocol-PT-10-CTLFireability-15
ctl formula formula --ctl=/tmp/471/ctl_13_
pnml2lts-sym: Exploration order is bfs-prev
pnml2lts-sym: Saturation strategy is sat
pnml2lts-sym: Guided search strategy is unguided
pnml2lts-sym: Attractor strategy is default
pnml2lts-sym: opening model.pnml
pnml2lts-sym: Edge label is id
Warning: program compiled against libxml 210 using older 209
pnml2lts-sym: Petri net has 524 places, 176 transitions and 1182 arcs
pnml2lts-sym: Petri net Petri analyzed
pnml2lts-sym: There are no safe places
pnml2lts-sym: Loading Petri net took 0.010 real 0.000 user 0.000 sys
pnml2lts-sym: Initializing regrouping layer
pnml2lts-sym: Regroup specification: bs,w2W,ru,hf
pnml2lts-sym: Regroup Boost's Sloan
pnml2lts-sym: Regroup over-approximate must-write to may-write
pnml2lts-sym: Regroup Row sUbsume
pnml2lts-sym: Reqroup Horizontal Flip
pnml2lts-sym: Regrouping: 176->171 groups
pnml2lts-sym: Regrouping took 0.110 real 0.120 user 0.000 sys
pnml2lts-sym: state vector length is 524; there are 171 groups
pnml2lts-sym: Creating a multi-core ListDD domain.
pnml2lts-sym: Sylvan allocates 15.000 GB virtual memory for nodes table and operation cache.
pnml2lts-sym: Initial nodes table and operation cache requires 60.00 MB.
pnml2lts-sym: Using GBgetTransitionsShortR2W as next-state function
pnml2lts-sym: got initial state
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: parsing CTL formula
pnml2lts-sym: converting CTL to mu-calculus...
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
pnml2lts-sym: vset_sylvan: starting garbage collection
pnml2lts-sym: vset_sylvan: garbage collection done
Killing (15) : 477
Killing (9) : 477
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="ltsminxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool ltsminxred"
echo " Input is QuasiCertifProtocol-PT-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r297-tall-167873951000874"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-10.tgz
mv QuasiCertifProtocol-PT-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;