Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948500858.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is QuasiCertifProtocol-PT-02, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948500858
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 7.0K Feb 26 01:27 CTLCardinality.txt
-rw-r--r-- 1 mcc users 64K Feb 26 01:27 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.0K Feb 26 01:26 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 01:26 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:36 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:36 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 17K Feb 26 01:29 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 149K Feb 26 01:29 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.8K Feb 26 01:28 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 26 01:28 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 55K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-00
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-01
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-02
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-03
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-04
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-05
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-06
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-07
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-08
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-09
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-10
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-11
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-12
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-13
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-14
FORMULA_NAME QuasiCertifProtocol-PT-02-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678916996995

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=QuasiCertifProtocol-PT-02
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 21:49:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 21:49:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 21:49:58] [INFO ] Load time of PNML (sax parser for PT used): 31 ms
[2023-03-15 21:49:58] [INFO ] Transformed 86 places.
[2023-03-15 21:49:58] [INFO ] Transformed 56 transitions.
[2023-03-15 21:49:58] [INFO ] Parsed PT model containing 86 places and 56 transitions and 223 arcs in 87 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 9 ms.
Support contains 76 out of 86 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 86/86 places, 56/56 transitions.
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 76 transition count 56
Applied a total of 10 rules in 10 ms. Remains 76 /86 variables (removed 10) and now considering 56/56 (removed 0) transitions.
// Phase 1: matrix 56 rows 76 cols
[2023-03-15 21:49:58] [INFO ] Computed 22 place invariants in 17 ms
[2023-03-15 21:49:58] [INFO ] Implicit Places using invariants in 166 ms returned []
[2023-03-15 21:49:58] [INFO ] Invariant cache hit.
[2023-03-15 21:49:58] [INFO ] Implicit Places using invariants and state equation in 168 ms returned []
Implicit Place search using SMT with State Equation took 357 ms to find 0 implicit places.
[2023-03-15 21:49:58] [INFO ] Invariant cache hit.
[2023-03-15 21:49:58] [INFO ] Dead Transitions using invariants and state equation in 73 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 76/86 places, 56/56 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 441 ms. Remains : 76/86 places, 56/56 transitions.
Support contains 76 out of 76 places after structural reductions.
[2023-03-15 21:49:59] [INFO ] Flatten gal took : 22 ms
[2023-03-15 21:49:59] [INFO ] Flatten gal took : 11 ms
[2023-03-15 21:49:59] [INFO ] Input system was already deterministic with 56 transitions.
Incomplete random walk after 10000 steps, including 1643 resets, run finished after 476 ms. (steps per millisecond=21 ) properties (out of 57) seen :19
Incomplete Best-First random walk after 1000 steps, including 25 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 38) seen :7
Incomplete Best-First random walk after 1001 steps, including 25 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 35 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 26 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 56 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 57 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 25 resets, run finished after 11 ms. (steps per millisecond=90 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 29 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 55 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 25 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 58 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 58 resets, run finished after 13 ms. (steps per millisecond=76 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 60 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 24 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 25 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 56 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 33 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 58 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 25 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 51 resets, run finished after 13 ms. (steps per millisecond=77 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 56 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 26 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 26 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 57 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 27 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 24 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 54 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 56 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 58 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1001 steps, including 27 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 31) seen :0
Incomplete Best-First random walk after 1000 steps, including 66 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 31) seen :0
Running SMT prover for 31 properties.
[2023-03-15 21:50:00] [INFO ] Invariant cache hit.
[2023-03-15 21:50:00] [INFO ] [Real]Absence check using 0 positive and 22 generalized place invariants in 3 ms returned sat
[2023-03-15 21:50:00] [INFO ] After 124ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:31
[2023-03-15 21:50:00] [INFO ] [Nat]Absence check using 0 positive and 22 generalized place invariants in 3 ms returned sat
[2023-03-15 21:50:00] [INFO ] After 138ms SMT Verify possible using state equation in natural domain returned unsat :5 sat :26
[2023-03-15 21:50:00] [INFO ] After 309ms SMT Verify possible using trap constraints in natural domain returned unsat :5 sat :26
Attempting to minimize the solution found.
Minimization took 122 ms.
[2023-03-15 21:50:00] [INFO ] After 582ms SMT Verify possible using all constraints in natural domain returned unsat :5 sat :26
Fused 31 Parikh solutions to 22 different solutions.
Finished Parikh walk after 26 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=26 )
Parikh walk visited 26 properties in 8 ms.
Successfully simplified 5 atomic propositions for a total of 16 simplifications.
FORMULA QuasiCertifProtocol-PT-02-CTLFireability-01 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-PT-02-CTLFireability-08 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 21:50:00] [INFO ] Initial state reduction rules for CTL removed 2 formulas.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 6 ms
FORMULA QuasiCertifProtocol-PT-02-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-PT-02-CTLFireability-05 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 6 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 56 transitions.
Computed a total of 76 stabilizing places and 56 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 76 transition count 56
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Reduce places removed 1 places and 1 transitions.
Partial Post-agglomeration rule applied 2 times.
Drop transitions removed 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 2 place count 75 transition count 55
Applied a total of 2 rules in 12 ms. Remains 75 /76 variables (removed 1) and now considering 55/56 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 75/76 places, 55/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 9 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 5 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 76 /76 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 76/76 places, 56/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Applied a total of 0 rules in 2 ms. Remains 76 /76 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 76/76 places, 56/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Graph (complete) has 137 edges and 76 vertex of which 72 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 72 transition count 54
Applied a total of 2 rules in 6 ms. Remains 72 /76 variables (removed 4) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 72/76 places, 54/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 76 /76 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 76/76 places, 56/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Graph (complete) has 137 edges and 76 vertex of which 72 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.0 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 71 transition count 53
Applied a total of 2 rules in 7 ms. Remains 71 /76 variables (removed 5) and now considering 53/56 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 7 ms. Remains : 71/76 places, 53/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Graph (complete) has 137 edges and 76 vertex of which 72 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.1 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 3 ms. Remains 71 /76 variables (removed 5) and now considering 53/56 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 71/76 places, 53/56 transitions.
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:00] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:00] [INFO ] Input system was already deterministic with 53 transitions.
Starting structural reductions in LTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Applied a total of 0 rules in 1 ms. Remains 76 /76 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1 ms. Remains : 76/76 places, 56/56 transitions.
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:01] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Graph (complete) has 137 edges and 76 vertex of which 72 are kept as prefixes of interest. Removing 4 places using SCC suffix rule.0 ms
Discarding 4 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 72 transition count 54
Applied a total of 2 rules in 5 ms. Remains 72 /76 variables (removed 4) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 5 ms. Remains : 72/76 places, 54/56 transitions.
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:01] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Reduce places removed 1 places and 1 transitions.
Applied a total of 0 rules in 3 ms. Remains 75 /76 variables (removed 1) and now considering 55/56 (removed 1) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 3 ms. Remains : 75/76 places, 55/56 transitions.
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:01] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Partial Post-agglomeration rule applied 1 times.
Drop transitions removed 1 transitions
Iterating global reduction 0 with 1 rules applied. Total rules applied 1 place count 76 transition count 56
Applied a total of 1 rules in 6 ms. Remains 76 /76 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 6 ms. Remains : 76/76 places, 56/56 transitions.
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:01] [INFO ] Input system was already deterministic with 56 transitions.
Starting structural reductions in LTL mode, iteration 0 : 76/76 places, 56/56 transitions.
Applied a total of 0 rules in 2 ms. Remains 76 /76 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 76/76 places, 56/56 transitions.
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 6 ms
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 3 ms
[2023-03-15 21:50:01] [INFO ] Input system was already deterministic with 56 transitions.
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:01] [INFO ] Flatten gal took : 4 ms
[2023-03-15 21:50:01] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 2 ms.
[2023-03-15 21:50:01] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 76 places, 56 transitions and 190 arcs took 1 ms.
Total runtime 2729 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT QuasiCertifProtocol-PT-02
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-PT-02-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678917002168

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 4 (type EXCL) for 3 QuasiCertifProtocol-PT-02-CTLFireability-02
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 4 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-02
lola: result : false
lola: markings : 260
lola: fired transitions : 625
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 QuasiCertifProtocol-PT-02-CTLFireability-04
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-04
lola: result : false
lola: markings : 6
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 QuasiCertifProtocol-PT-02-CTLFireability-06
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 13 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-06
lola: result : true
lola: markings : 32
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 7 (type EXCL) for 6 QuasiCertifProtocol-PT-02-CTLFireability-03
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 7 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-03
lola: result : false
lola: markings : 9
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 QuasiCertifProtocol-PT-02-CTLFireability-07
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-07
lola: result : true
lola: markings : 5
lola: fired transitions : 4
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 QuasiCertifProtocol-PT-02-CTLFireability-00
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-00
lola: result : true
lola: markings : 7
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 QuasiCertifProtocol-PT-02-CTLFireability-11
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-11
lola: result : false
lola: markings : 10
lola: fired transitions : 39
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 QuasiCertifProtocol-PT-02-CTLFireability-13
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 31 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-13
lola: result : false
lola: markings : 10
lola: fired transitions : 10
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 22 (type EXCL) for 21 QuasiCertifProtocol-PT-02-CTLFireability-10
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 22 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-10
lola: result : true
lola: markings : 24
lola: fired transitions : 39
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 QuasiCertifProtocol-PT-02-CTLFireability-12
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-12
lola: result : true
lola: markings : 17
lola: fired transitions : 46
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 QuasiCertifProtocol-PT-02-CTLFireability-15
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-15
lola: result : true
lola: markings : 12
lola: fired transitions : 16
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 QuasiCertifProtocol-PT-02-CTLFireability-09
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for QuasiCertifProtocol-PT-02-CTLFireability-09
lola: result : false
lola: markings : 258
lola: fired transitions : 531
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-PT-02-CTLFireability-00: EG true state space / EG
QuasiCertifProtocol-PT-02-CTLFireability-02: CTL false CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-03: CTL false CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-04: CTL false CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-06: CTL true CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-07: EG true state space / EG
QuasiCertifProtocol-PT-02-CTLFireability-09: CTL false CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-10: CTL true CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-11: CTL false CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-12: CTL true CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-13: CTL false CTL model checker
QuasiCertifProtocol-PT-02-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-PT-02"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is QuasiCertifProtocol-PT-02, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948500858"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-PT-02.tgz
mv QuasiCertifProtocol-PT-02 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;