Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948400818.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is QuasiCertifProtocol-COL-10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948400818
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 472K
-rw-r--r-- 1 mcc users 9.0K Feb 26 01:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 98K Feb 26 01:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 26 01:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 60K Feb 26 01:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.8K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:37 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:37 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:37 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:37 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.9K Feb 26 01:25 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 26 01:25 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 01:23 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 36K Feb 26 01:23 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:37 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:37 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 72K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-00
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-01
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-02
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-03
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-04
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-05
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-06
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-07
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-08
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-09
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-10
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-11
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-12
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-13
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-14
FORMULA_NAME QuasiCertifProtocol-COL-10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678912585876

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=QuasiCertifProtocol-COL-10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 20:36:27] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 20:36:27] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 20:36:27] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 20:36:27] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 20:36:28] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 666 ms
[2023-03-15 20:36:28] [INFO ] Imported 30 HL places and 26 HL transitions for a total of 550 PT places and 176.0 transition bindings in 14 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
[2023-03-15 20:36:28] [INFO ] Built PT skeleton of HLPN with 30 places and 26 transitions 77 arcs in 4 ms.
[2023-03-15 20:36:28] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 30 stabilizing places and 26 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 30 transition count 26
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 13 formulas.
FORMULA QuasiCertifProtocol-COL-10-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-COL-10-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-COL-10-CTLFireability-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Remains 9 properties that can be checked using skeleton over-approximation.
Computed a total of 30 stabilizing places and 26 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 30 transition count 26
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Incomplete random walk after 10010 steps, including 552 resets, run finished after 228 ms. (steps per millisecond=43 ) properties (out of 26) seen :19
Incomplete Best-First random walk after 10000 steps, including 173 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 174 resets, run finished after 79 ms. (steps per millisecond=126 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 177 resets, run finished after 65 ms. (steps per millisecond=153 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 177 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10003 steps, including 209 resets, run finished after 50 ms. (steps per millisecond=200 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 144 resets, run finished after 45 ms. (steps per millisecond=222 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10000 steps, including 176 resets, run finished after 46 ms. (steps per millisecond=217 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
// Phase 1: matrix 26 rows 30 cols
[2023-03-15 20:36:28] [INFO ] Computed 5 place invariants in 8 ms
[2023-03-15 20:36:29] [INFO ] [Real]Absence check using 5 positive place invariants in 14 ms returned sat
[2023-03-15 20:36:29] [INFO ] After 193ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:5
[2023-03-15 20:36:29] [INFO ] [Nat]Absence check using 5 positive place invariants in 2 ms returned sat
[2023-03-15 20:36:29] [INFO ] After 25ms SMT Verify possible using state equation in natural domain returned unsat :2 sat :5
[2023-03-15 20:36:29] [INFO ] After 46ms SMT Verify possible using trap constraints in natural domain returned unsat :2 sat :5
Attempting to minimize the solution found.
Minimization took 13 ms.
[2023-03-15 20:36:29] [INFO ] After 121ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :5
Fused 7 Parikh solutions to 3 different solutions.
Finished Parikh walk after 42 steps, including 0 resets, run visited all 5 properties in 3 ms. (steps per millisecond=14 )
Parikh walk visited 5 properties in 3 ms.
Successfully simplified 2 atomic propositions for a total of 9 simplifications.
[2023-03-15 20:36:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 20:36:29] [INFO ] Flatten gal took : 23 ms
[2023-03-15 20:36:29] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA QuasiCertifProtocol-COL-10-CTLFireability-13 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA QuasiCertifProtocol-COL-10-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 20:36:29] [INFO ] Flatten gal took : 8 ms
Domain [tsid(11), tsid(11)] of place n9 breaks symmetries in sort tsid
[2023-03-15 20:36:29] [INFO ] Unfolded HLPN to a Petri net with 550 places and 176 transitions 1287 arcs in 14 ms.
[2023-03-15 20:36:29] [INFO ] Unfolded 11 HLPN properties in 0 ms.
Support contains 524 out of 550 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 550/550 places, 176/176 transitions.
Reduce places removed 26 places and 0 transitions.
Iterating post reduction 0 with 26 rules applied. Total rules applied 26 place count 524 transition count 176
Applied a total of 26 rules in 9 ms. Remains 524 /550 variables (removed 26) and now considering 176/176 (removed 0) transitions.
// Phase 1: matrix 176 rows 524 cols
[2023-03-15 20:36:29] [INFO ] Computed 350 place invariants in 36 ms
[2023-03-15 20:36:29] [INFO ] Implicit Places using invariants in 181 ms returned []
[2023-03-15 20:36:29] [INFO ] Invariant cache hit.
[2023-03-15 20:36:29] [INFO ] Implicit Places using invariants and state equation in 232 ms returned []
Implicit Place search using SMT with State Equation took 415 ms to find 0 implicit places.
[2023-03-15 20:36:29] [INFO ] Invariant cache hit.
[2023-03-15 20:36:29] [INFO ] Dead Transitions using invariants and state equation in 192 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 524/550 places, 176/176 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 617 ms. Remains : 524/550 places, 176/176 transitions.
Support contains 524 out of 524 places after structural reductions.
[2023-03-15 20:36:30] [INFO ] Flatten gal took : 51 ms
[2023-03-15 20:36:30] [INFO ] Flatten gal took : 58 ms
[2023-03-15 20:36:30] [INFO ] Input system was already deterministic with 176 transitions.
Incomplete random walk after 10000 steps, including 691 resets, run finished after 345 ms. (steps per millisecond=28 ) properties (out of 44) seen :10
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 30 ms. (steps per millisecond=33 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 7 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1000 steps, including 6 resets, run finished after 7 ms. (steps per millisecond=142 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 6 ms. (steps per millisecond=166 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 34) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 34) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 7 ms. (steps per millisecond=143 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 4 ms. (steps per millisecond=250 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 7 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 8 ms. (steps per millisecond=125 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 9 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 5 ms. (steps per millisecond=200 ) properties (out of 33) seen :0
Incomplete Best-First random walk after 1001 steps, including 6 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 33) seen :0
Running SMT prover for 33 properties.
[2023-03-15 20:36:30] [INFO ] Invariant cache hit.
[2023-03-15 20:36:31] [INFO ] [Real]Absence check using 0 positive and 350 generalized place invariants in 49 ms returned sat
[2023-03-15 20:36:31] [INFO ] After 498ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:31
[2023-03-15 20:36:32] [INFO ] [Nat]Absence check using 0 positive and 350 generalized place invariants in 47 ms returned sat
[2023-03-15 20:36:33] [INFO ] After 1492ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :27
[2023-03-15 20:36:35] [INFO ] After 2788ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :27
Attempting to minimize the solution found.
Minimization took 994 ms.
[2023-03-15 20:36:36] [INFO ] After 4449ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :27
Fused 33 Parikh solutions to 25 different solutions.
Finished Parikh walk after 88 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=44 )
Parikh walk visited 27 properties in 20 ms.
Successfully simplified 6 atomic propositions for a total of 11 simplifications.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 30 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 31 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Computed a total of 524 stabilizing places and 176 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 524 transition count 176
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 27 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 27 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 19 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 19 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 6 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 18 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 17 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 15 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 15 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 13 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 14 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 8 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 14 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 14 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Graph (complete) has 2161 edges and 524 vertex of which 512 are kept as prefixes of interest. Removing 12 places using SCC suffix rule.4 ms
Discarding 12 places :
Also discarding 2 output transitions
Drop transitions removed 2 transitions
Reduce places removed 1 places and 1 transitions.
Applied a total of 1 rules in 27 ms. Remains 511 /524 variables (removed 13) and now considering 173/176 (removed 3) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 29 ms. Remains : 511/524 places, 173/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 173 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 8 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 12 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 13 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 9 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 13 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 2 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 17 ms
[2023-03-15 20:36:36] [INFO ] Flatten gal took : 15 ms
[2023-03-15 20:36:36] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 4 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 13 ms
[2023-03-15 20:36:37] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 3 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 13 ms
[2023-03-15 20:36:37] [INFO ] Input system was already deterministic with 176 transitions.
Starting structural reductions in LTL mode, iteration 0 : 524/524 places, 176/176 transitions.
Applied a total of 0 rules in 6 ms. Remains 524 /524 variables (removed 0) and now considering 176/176 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 524/524 places, 176/176 transitions.
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 11 ms
[2023-03-15 20:36:37] [INFO ] Input system was already deterministic with 176 transitions.
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 22 ms
[2023-03-15 20:36:37] [INFO ] Flatten gal took : 21 ms
[2023-03-15 20:36:37] [INFO ] Export to MCC of 11 properties in file /home/mcc/execution/CTLFireability.sr.xml took 13 ms.
[2023-03-15 20:36:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 524 places, 176 transitions and 1182 arcs took 2 ms.
Total runtime 10004 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT QuasiCertifProtocol-COL-10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/367
CTLFireability

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA QuasiCertifProtocol-COL-10-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678912841973

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/367/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/367/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/367/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:391
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: LAUNCH task # 7 (type EXCL) for 6 QuasiCertifProtocol-COL-10-CTLFireability-03
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for QuasiCertifProtocol-COL-10-CTLFireability-03
lola: result : true
lola: markings : 14
lola: fired transitions : 38
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 16 (type EXCL) for 15 QuasiCertifProtocol-COL-10-CTLFireability-08
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 16 (type EXCL) for QuasiCertifProtocol-COL-10-CTLFireability-08
lola: result : false
lola: markings : 3067
lola: fired transitions : 15064
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 QuasiCertifProtocol-COL-10-CTLFireability-09
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/399 3/32 QuasiCertifProtocol-COL-10-CTLFireability-09 486710 m, 97342 m/sec, 3540467 t fired, .

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QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/399 6/32 QuasiCertifProtocol-COL-10-CTLFireability-09 975667 m, 97791 m/sec, 7080397 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/399 10/32 QuasiCertifProtocol-COL-10-CTLFireability-09 1497592 m, 104385 m/sec, 10558231 t fired, .

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QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/399 12/32 QuasiCertifProtocol-COL-10-CTLFireability-09 1967573 m, 93996 m/sec, 13946896 t fired, .

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QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/399 14/32 QuasiCertifProtocol-COL-10-CTLFireability-09 2381592 m, 82803 m/sec, 17002876 t fired, .

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QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
QuasiCertifProtocol-COL-10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
QuasiCertifProtocol-COL-10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 30/399 17/32 QuasiCertifProtocol-COL-10-CTLFireability-09 2889240 m, 101529 m/sec, 20436005 t fired, .

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1 CTL EXCL 75/1731 26/32 QuasiCertifProtocol-COL-10-CTLFireability-01 4156683 m, 38430 m/sec, 53189514 t fired, .

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1 CTL EXCL 80/1731 28/32 QuasiCertifProtocol-COL-10-CTLFireability-01 4414112 m, 51485 m/sec, 56605284 t fired, .

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1 CTL EXCL 85/1731 29/32 QuasiCertifProtocol-COL-10-CTLFireability-01 4644348 m, 46047 m/sec, 60012087 t fired, .

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FINAL RESULTS
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QuasiCertifProtocol-COL-10-CTLFireability-01: CTL unknown AGGR
QuasiCertifProtocol-COL-10-CTLFireability-02: CTL unknown AGGR
QuasiCertifProtocol-COL-10-CTLFireability-03: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-06: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-07: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-08: CTL false CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-09: CTL unknown AGGR
QuasiCertifProtocol-COL-10-CTLFireability-10: CTL true CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-11: CTL false CTL model checker
QuasiCertifProtocol-COL-10-CTLFireability-12: CTL true CTL model checker
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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="QuasiCertifProtocol-COL-10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is QuasiCertifProtocol-COL-10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948400818"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/QuasiCertifProtocol-COL-10.tgz
mv QuasiCertifProtocol-COL-10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;