About the Execution of LoLa+red for PolyORBLF-PT-S04J04T10
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
5585.451 | 327248.00 | 350712.00 | 989.40 | T??F??FTTTFTTFFF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948100554.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
........................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PolyORBLF-PT-S04J04T10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948100554
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 6.2M
-rw-r--r-- 1 mcc users 27K Feb 26 13:42 CTLCardinality.txt
-rw-r--r-- 1 mcc users 142K Feb 26 13:42 CTLCardinality.xml
-rw-r--r-- 1 mcc users 101K Feb 26 13:39 CTLFireability.txt
-rw-r--r-- 1 mcc users 457K Feb 26 13:39 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 15K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 53K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 9.2K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 44K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 25K Feb 26 13:59 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 143K Feb 26 13:59 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 196K Feb 26 13:57 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 805K Feb 26 13:57 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.9K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.2M Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-00
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-01
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-02
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-03
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-04
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-05
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-06
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-07
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-08
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-09
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-10
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-11
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-12
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-13
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-14
FORMULA_NAME PolyORBLF-PT-S04J04T10-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678863178048
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-PT-S04J04T10
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 06:52:59] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 06:52:59] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 06:52:59] [INFO ] Load time of PNML (sax parser for PT used): 246 ms
[2023-03-15 06:52:59] [INFO ] Transformed 870 places.
[2023-03-15 06:52:59] [INFO ] Transformed 5034 transitions.
[2023-03-15 06:52:59] [INFO ] Parsed PT model containing 870 places and 5034 transitions and 34774 arcs in 417 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 27 ms.
[2023-03-15 06:53:00] [INFO ] Reduced 440 identical enabling conditions.
[2023-03-15 06:53:00] [INFO ] Reduced 60 identical enabling conditions.
[2023-03-15 06:53:00] [INFO ] Reduced 2210 identical enabling conditions.
[2023-03-15 06:53:00] [INFO ] Reduced 60 identical enabling conditions.
Ensure Unique test removed 2710 transitions
Reduce redundant transitions removed 2710 transitions.
Support contains 679 out of 870 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 2324/2324 transitions.
Applied a total of 0 rules in 61 ms. Remains 870 /870 variables (removed 0) and now considering 2324/2324 (removed 0) transitions.
[2023-03-15 06:53:00] [INFO ] Flow matrix only has 2284 transitions (discarded 40 similar events)
// Phase 1: matrix 2284 rows 870 cols
[2023-03-15 06:53:00] [INFO ] Computed 58 place invariants in 147 ms
[2023-03-15 06:53:03] [INFO ] Dead Transitions using invariants and state equation in 2910 ms found 540 transitions.
Found 540 dead transitions using SMT.
Drop transitions removed 540 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 540 transitions.
[2023-03-15 06:53:03] [INFO ] Flow matrix only has 1744 transitions (discarded 40 similar events)
// Phase 1: matrix 1744 rows 870 cols
[2023-03-15 06:53:03] [INFO ] Computed 58 place invariants in 67 ms
[2023-03-15 06:53:03] [INFO ] Implicit Places using invariants in 322 ms returned []
[2023-03-15 06:53:03] [INFO ] Flow matrix only has 1744 transitions (discarded 40 similar events)
[2023-03-15 06:53:03] [INFO ] Invariant cache hit.
[2023-03-15 06:53:04] [INFO ] State equation strengthened by 200 read => feed constraints.
[2023-03-15 06:53:06] [INFO ] Implicit Places using invariants and state equation in 2633 ms returned []
Implicit Place search using SMT with State Equation took 2958 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 870/870 places, 1784/2324 transitions.
Applied a total of 0 rules in 26 ms. Remains 870 /870 variables (removed 0) and now considering 1784/1784 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5981 ms. Remains : 870/870 places, 1784/2324 transitions.
Support contains 679 out of 870 places after structural reductions.
[2023-03-15 06:53:06] [INFO ] Flatten gal took : 209 ms
[2023-03-15 06:53:07] [INFO ] Flatten gal took : 152 ms
[2023-03-15 06:53:07] [INFO ] Input system was already deterministic with 1784 transitions.
Support contains 678 out of 870 places (down from 679) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 3 resets, run finished after 749 ms. (steps per millisecond=13 ) properties (out of 66) seen :47
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 56 ms. (steps per millisecond=17 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 41 ms. (steps per millisecond=24 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 27 ms. (steps per millisecond=37 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 32 ms. (steps per millisecond=31 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=50 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 26 ms. (steps per millisecond=38 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=58 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=62 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 23 ms. (steps per millisecond=43 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=47 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 25 ms. (steps per millisecond=40 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=66 ) properties (out of 19) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 19 ms. (steps per millisecond=52 ) properties (out of 19) seen :0
Running SMT prover for 19 properties.
[2023-03-15 06:53:08] [INFO ] Flow matrix only has 1744 transitions (discarded 40 similar events)
[2023-03-15 06:53:08] [INFO ] Invariant cache hit.
[2023-03-15 06:53:10] [INFO ] [Real]Absence check using 14 positive place invariants in 8 ms returned sat
[2023-03-15 06:53:10] [INFO ] [Real]Absence check using 14 positive and 44 generalized place invariants in 48 ms returned sat
[2023-03-15 06:53:10] [INFO ] After 684ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:17
[2023-03-15 06:53:10] [INFO ] [Nat]Absence check using 14 positive place invariants in 10 ms returned sat
[2023-03-15 06:53:10] [INFO ] [Nat]Absence check using 14 positive and 44 generalized place invariants in 56 ms returned sat
[2023-03-15 06:53:10] [INFO ] After 442ms SMT Verify possible using all constraints in natural domain returned unsat :19 sat :0
Fused 19 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 19 atomic propositions for a total of 16 simplifications.
Initial state reduction rules removed 2 formulas.
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-00 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 06:53:10] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 06:53:10] [INFO ] Flatten gal took : 79 ms
[2023-03-15 06:53:10] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 06:53:11] [INFO ] Flatten gal took : 88 ms
[2023-03-15 06:53:11] [INFO ] Input system was already deterministic with 1784 transitions.
Support contains 536 out of 870 places (down from 539) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 98 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:11] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
// Phase 1: matrix 1724 rows 846 cols
[2023-03-15 06:53:11] [INFO ] Computed 54 place invariants in 39 ms
[2023-03-15 06:53:13] [INFO ] Dead Transitions using invariants and state equation in 2224 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2324 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:13] [INFO ] Flatten gal took : 60 ms
[2023-03-15 06:53:13] [INFO ] Flatten gal took : 62 ms
[2023-03-15 06:53:13] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Applied a total of 4 rules in 18 ms. Remains 866 /870 variables (removed 4) and now considering 1784/1784 (removed 0) transitions.
[2023-03-15 06:53:14] [INFO ] Flow matrix only has 1744 transitions (discarded 40 similar events)
// Phase 1: matrix 1744 rows 866 cols
[2023-03-15 06:53:14] [INFO ] Computed 54 place invariants in 44 ms
[2023-03-15 06:53:16] [INFO ] Dead Transitions using invariants and state equation in 2298 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2319 ms. Remains : 866/870 places, 1784/1784 transitions.
[2023-03-15 06:53:16] [INFO ] Flatten gal took : 110 ms
[2023-03-15 06:53:16] [INFO ] Flatten gal took : 132 ms
[2023-03-15 06:53:16] [INFO ] Input system was already deterministic with 1784 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 105 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:17] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
// Phase 1: matrix 1724 rows 846 cols
[2023-03-15 06:53:17] [INFO ] Computed 54 place invariants in 50 ms
[2023-03-15 06:53:19] [INFO ] Dead Transitions using invariants and state equation in 2187 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2313 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:19] [INFO ] Flatten gal took : 55 ms
[2023-03-15 06:53:19] [INFO ] Flatten gal took : 56 ms
[2023-03-15 06:53:19] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 41 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:19] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
[2023-03-15 06:53:19] [INFO ] Invariant cache hit.
[2023-03-15 06:53:21] [INFO ] Dead Transitions using invariants and state equation in 2124 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2167 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:21] [INFO ] Flatten gal took : 53 ms
[2023-03-15 06:53:21] [INFO ] Flatten gal took : 56 ms
[2023-03-15 06:53:21] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 32 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:21] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
[2023-03-15 06:53:21] [INFO ] Invariant cache hit.
[2023-03-15 06:53:24] [INFO ] Dead Transitions using invariants and state equation in 2177 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2216 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:24] [INFO ] Flatten gal took : 52 ms
[2023-03-15 06:53:24] [INFO ] Flatten gal took : 58 ms
[2023-03-15 06:53:24] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 40 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:24] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
[2023-03-15 06:53:24] [INFO ] Invariant cache hit.
[2023-03-15 06:53:26] [INFO ] Dead Transitions using invariants and state equation in 2179 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2221 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:26] [INFO ] Flatten gal took : 50 ms
[2023-03-15 06:53:26] [INFO ] Flatten gal took : 52 ms
[2023-03-15 06:53:26] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Drop transitions removed 50 transitions
Trivial Post-agglo rules discarded 50 transitions
Performed 50 trivial Post agglomeration. Transition count delta: 50
Iterating post reduction 0 with 50 rules applied. Total rules applied 50 place count 866 transition count 1734
Reduce places removed 50 places and 0 transitions.
Performed 10 Post agglomeration using F-continuation condition.Transition count delta: 10
Iterating post reduction 1 with 60 rules applied. Total rules applied 110 place count 816 transition count 1724
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 120 place count 806 transition count 1724
Performed 100 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 100 Pre rules applied. Total rules applied 120 place count 806 transition count 1624
Deduced a syphon composed of 100 places in 1 ms
Reduce places removed 100 places and 0 transitions.
Iterating global reduction 3 with 200 rules applied. Total rules applied 320 place count 706 transition count 1624
Performed 100 Post agglomeration using F-continuation condition.Transition count delta: 100
Deduced a syphon composed of 100 places in 1 ms
Reduce places removed 100 places and 0 transitions.
Iterating global reduction 3 with 200 rules applied. Total rules applied 520 place count 606 transition count 1524
Applied a total of 520 rules in 147 ms. Remains 606 /870 variables (removed 264) and now considering 1524/1784 (removed 260) transitions.
[2023-03-15 06:53:27] [INFO ] Flow matrix only has 1484 transitions (discarded 40 similar events)
// Phase 1: matrix 1484 rows 606 cols
[2023-03-15 06:53:27] [INFO ] Computed 54 place invariants in 29 ms
[2023-03-15 06:53:28] [INFO ] Dead Transitions using invariants and state equation in 1230 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1378 ms. Remains : 606/870 places, 1524/1784 transitions.
[2023-03-15 06:53:28] [INFO ] Flatten gal took : 47 ms
[2023-03-15 06:53:28] [INFO ] Flatten gal took : 47 ms
[2023-03-15 06:53:28] [INFO ] Input system was already deterministic with 1524 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 42 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:28] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
// Phase 1: matrix 1724 rows 846 cols
[2023-03-15 06:53:28] [INFO ] Computed 54 place invariants in 36 ms
[2023-03-15 06:53:30] [INFO ] Dead Transitions using invariants and state equation in 2137 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2182 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:30] [INFO ] Flatten gal took : 48 ms
[2023-03-15 06:53:30] [INFO ] Flatten gal took : 51 ms
[2023-03-15 06:53:30] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 55 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:30] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
[2023-03-15 06:53:30] [INFO ] Invariant cache hit.
[2023-03-15 06:53:33] [INFO ] Dead Transitions using invariants and state equation in 2268 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2325 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:33] [INFO ] Flatten gal took : 49 ms
[2023-03-15 06:53:33] [INFO ] Flatten gal took : 53 ms
[2023-03-15 06:53:33] [INFO ] Input system was already deterministic with 1764 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Drop transitions removed 90 transitions
Trivial Post-agglo rules discarded 90 transitions
Performed 90 trivial Post agglomeration. Transition count delta: 90
Iterating post reduction 0 with 90 rules applied. Total rules applied 90 place count 866 transition count 1694
Reduce places removed 90 places and 0 transitions.
Iterating post reduction 1 with 90 rules applied. Total rules applied 180 place count 776 transition count 1694
Performed 99 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 99 Pre rules applied. Total rules applied 180 place count 776 transition count 1595
Deduced a syphon composed of 99 places in 1 ms
Reduce places removed 99 places and 0 transitions.
Iterating global reduction 2 with 198 rules applied. Total rules applied 378 place count 677 transition count 1595
Performed 100 Post agglomeration using F-continuation condition.Transition count delta: 100
Deduced a syphon composed of 100 places in 1 ms
Reduce places removed 100 places and 0 transitions.
Iterating global reduction 2 with 200 rules applied. Total rules applied 578 place count 577 transition count 1495
Applied a total of 578 rules in 83 ms. Remains 577 /870 variables (removed 293) and now considering 1495/1784 (removed 289) transitions.
[2023-03-15 06:53:33] [INFO ] Flow matrix only has 1455 transitions (discarded 40 similar events)
// Phase 1: matrix 1455 rows 577 cols
[2023-03-15 06:53:33] [INFO ] Computed 54 place invariants in 31 ms
[2023-03-15 06:53:34] [INFO ] Dead Transitions using invariants and state equation in 1194 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1280 ms. Remains : 577/870 places, 1495/1784 transitions.
[2023-03-15 06:53:34] [INFO ] Flatten gal took : 42 ms
[2023-03-15 06:53:34] [INFO ] Flatten gal took : 45 ms
[2023-03-15 06:53:34] [INFO ] Input system was already deterministic with 1495 transitions.
Finished random walk after 752 steps, including 0 resets, run visited all 1 properties in 6 ms. (steps per millisecond=125 )
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 870/870 places, 1784/1784 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 866 transition count 1784
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 14 place count 856 transition count 1774
Iterating global reduction 1 with 10 rules applied. Total rules applied 24 place count 856 transition count 1774
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 34 place count 846 transition count 1764
Iterating global reduction 1 with 10 rules applied. Total rules applied 44 place count 846 transition count 1764
Applied a total of 44 rules in 38 ms. Remains 846 /870 variables (removed 24) and now considering 1764/1784 (removed 20) transitions.
[2023-03-15 06:53:34] [INFO ] Flow matrix only has 1724 transitions (discarded 40 similar events)
// Phase 1: matrix 1724 rows 846 cols
[2023-03-15 06:53:34] [INFO ] Computed 54 place invariants in 58 ms
[2023-03-15 06:53:37] [INFO ] Dead Transitions using invariants and state equation in 2199 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2239 ms. Remains : 846/870 places, 1764/1784 transitions.
[2023-03-15 06:53:37] [INFO ] Flatten gal took : 48 ms
[2023-03-15 06:53:37] [INFO ] Flatten gal took : 51 ms
[2023-03-15 06:53:37] [INFO ] Input system was already deterministic with 1764 transitions.
[2023-03-15 06:53:37] [INFO ] Flatten gal took : 65 ms
[2023-03-15 06:53:37] [INFO ] Flatten gal took : 67 ms
[2023-03-15 06:53:37] [INFO ] Export to MCC of 10 properties in file /home/mcc/execution/CTLFireability.sr.xml took 15 ms.
[2023-03-15 06:53:37] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 870 places, 1784 transitions and 8064 arcs took 8 ms.
Total runtime 38213 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PolyORBLF-PT-S04J04T10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-PT-S04J04T10-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678863505296
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:196
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:207
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: NOTDEADLOCKFREE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: LAUNCH task # 38 (type SKEL/SRCH) for 21 PolyORBLF-PT-S04J04T10-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 38 (type SKEL/SRCH) for PolyORBLF-PT-S04J04T10-CTLFireability-09
lola: result : true
lola: markings : 77
lola: fired transitions : 76
lola: time used : 0.000000
lola: memory pages used : 1
lola: NOTDEADLOCKFREE
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: LAUNCH task # 39 (type SKEL/SRCH) for 21 PolyORBLF-PT-S04J04T10-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 39 (type SKEL/SRCH) for PolyORBLF-PT-S04J04T10-CTLFireability-09
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 4 (type EXCL) for 3 PolyORBLF-PT-S04J04T10-CTLFireability-02
lola: time limit : 323 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:715
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:746
lola: rewrite Frontend/Parser/formula_rewrite.k:787
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PolyORBLF-PT-S04J04T10-CTLFireability-13: AGEFAG 0 1 0 0 1 0 0 0
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FINAL RESULTS
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PolyORBLF-PT-S04J04T10-CTLFireability-01: CTL unknown AGGR
PolyORBLF-PT-S04J04T10-CTLFireability-02: CTL unknown AGGR
PolyORBLF-PT-S04J04T10-CTLFireability-03: CTL false CTL model checker
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-PT-S04J04T10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PolyORBLF-PT-S04J04T10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948100554"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-PT-S04J04T10.tgz
mv PolyORBLF-PT-S04J04T10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;