About the Execution of LoLa+red for PolyORBLF-COL-S06J06T08
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 12745.983 | 471627.00 | 494841.00 | 705.30 | FTFF?TF?T?T?FT?F | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r295-tall-167873948000482.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PolyORBLF-COL-S06J06T08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873948000482
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 604K
-rw-r--r-- 1 mcc users 7.7K Feb 26 14:04 CTLCardinality.txt
-rw-r--r-- 1 mcc users 71K Feb 26 14:04 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.1K Feb 26 13:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 26 13:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.3K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 14:43 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 119K Feb 26 14:43 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 9.7K Feb 26 14:36 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 76K Feb 26 14:36 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 154K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-00
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-01
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-02
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-03
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-04
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-05
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-06
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-07
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-08
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-09
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-10
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-11
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-12
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-13
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-14
FORMULA_NAME PolyORBLF-COL-S06J06T08-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678849824009
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-COL-S06J06T08
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 03:10:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 03:10:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 03:10:25] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 03:10:25] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 03:10:26] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 708 ms
[2023-03-15 03:10:26] [INFO ] Imported 81 HL places and 65 HL transitions for a total of 894 PT places and 14420.0 transition bindings in 20 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
[2023-03-15 03:10:26] [INFO ] Built PT skeleton of HLPN with 81 places and 65 transitions 254 arcs in 5 ms.
[2023-03-15 03:10:26] [INFO ] Skeletonized 16 HLPN properties in 2 ms.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 16 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Incomplete random walk after 10002 steps, including 976 resets, run finished after 291 ms. (steps per millisecond=34 ) properties (out of 51) seen :22
Incomplete Best-First random walk after 1000 steps, including 12 resets, run finished after 24 ms. (steps per millisecond=41 ) properties (out of 29) seen :18
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 11) seen :4
Incomplete Best-First random walk after 1001 steps, including 8 resets, run finished after 18 ms. (steps per millisecond=55 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 1000 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 1000 steps, including 3 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 1001 steps, including 3 resets, run finished after 9 ms. (steps per millisecond=111 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-15 03:10:26] [INFO ] Flow matrix only has 64 transitions (discarded 1 similar events)
// Phase 1: matrix 64 rows 81 cols
[2023-03-15 03:10:26] [INFO ] Computed 26 place invariants in 12 ms
[2023-03-15 03:10:26] [INFO ] [Real]Absence check using 11 positive place invariants in 4 ms returned sat
[2023-03-15 03:10:26] [INFO ] [Real]Absence check using 11 positive and 15 generalized place invariants in 4 ms returned sat
[2023-03-15 03:10:26] [INFO ] After 173ms SMT Verify possible using all constraints in real domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 03:10:26] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 03:10:26] [INFO ] Flatten gal took : 34 ms
[2023-03-15 03:10:26] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-06 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 03:10:26] [INFO ] Flatten gal took : 8 ms
Transition T_2315 forces synchronizations/join behavior on parameter t of sort Threads
Transition GoPerformWork forces synchronizations/join behavior on parameter j of sort Jobs
Transition T_0376 forces synchronizations/join behavior on parameter s of sort Sources
[2023-03-15 03:10:27] [INFO ] Unfolded HLPN to a Petri net with 894 places and 14334 transitions 119772 arcs in 256 ms.
[2023-03-15 03:10:27] [INFO ] Unfolded 13 HLPN properties in 4 ms.
[2023-03-15 03:10:27] [INFO ] Reduced 9360 identical enabling conditions.
[2023-03-15 03:10:27] [INFO ] Reduced 9360 identical enabling conditions.
Ensure Unique test removed 10760 transitions
Reduce redundant transitions removed 10760 transitions.
Support contains 616 out of 894 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 894/894 places, 3574/3574 transitions.
Ensure Unique test removed 6 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 888 transition count 3574
Applied a total of 6 rules in 115 ms. Remains 888 /894 variables (removed 6) and now considering 3574/3574 (removed 0) transitions.
[2023-03-15 03:10:27] [INFO ] Flow matrix only has 3526 transitions (discarded 48 similar events)
// Phase 1: matrix 3526 rows 888 cols
[2023-03-15 03:10:27] [INFO ] Computed 56 place invariants in 225 ms
[2023-03-15 03:10:29] [INFO ] Dead Transitions using invariants and state equation in 1562 ms found 1224 transitions.
Found 1224 dead transitions using SMT.
Drop transitions removed 1224 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 1224 transitions.
[2023-03-15 03:10:29] [INFO ] Flow matrix only has 2302 transitions (discarded 48 similar events)
// Phase 1: matrix 2302 rows 888 cols
[2023-03-15 03:10:29] [INFO ] Computed 56 place invariants in 83 ms
[2023-03-15 03:10:29] [INFO ] Implicit Places using invariants in 318 ms returned [694, 695, 696, 697, 698, 699, 700, 701]
Discarding 8 places :
Implicit Place search using SMT only with invariants took 323 ms to find 8 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 880/894 places, 2350/3574 transitions.
Applied a total of 0 rules in 26 ms. Remains 880 /880 variables (removed 0) and now considering 2350/2350 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 2030 ms. Remains : 880/894 places, 2350/3574 transitions.
Support contains 616 out of 880 places after structural reductions.
[2023-03-15 03:10:29] [INFO ] Flatten gal took : 254 ms
[2023-03-15 03:10:30] [INFO ] Flatten gal took : 213 ms
[2023-03-15 03:10:31] [INFO ] Input system was already deterministic with 2350 transitions.
Incomplete random walk after 10000 steps, including 55 resets, run finished after 754 ms. (steps per millisecond=13 ) properties (out of 47) seen :43
Incomplete Best-First random walk after 10000 steps, including 20 resets, run finished after 283 ms. (steps per millisecond=35 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 5 resets, run finished after 1366 ms. (steps per millisecond=7 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 31 resets, run finished after 304 ms. (steps per millisecond=32 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 24 resets, run finished after 311 ms. (steps per millisecond=32 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
[2023-03-15 03:10:34] [INFO ] Flow matrix only has 2302 transitions (discarded 48 similar events)
// Phase 1: matrix 2302 rows 880 cols
[2023-03-15 03:10:34] [INFO ] Computed 48 place invariants in 42 ms
[2023-03-15 03:10:36] [INFO ] [Real]Absence check using 16 positive place invariants in 8 ms returned sat
[2023-03-15 03:10:36] [INFO ] [Real]Absence check using 16 positive and 32 generalized place invariants in 42 ms returned sat
[2023-03-15 03:10:37] [INFO ] After 427ms SMT Verify possible using all constraints in real domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 13 simplifications.
[2023-03-15 03:10:37] [INFO ] Flatten gal took : 127 ms
[2023-03-15 03:10:37] [INFO ] Flatten gal took : 147 ms
[2023-03-15 03:10:38] [INFO ] Input system was already deterministic with 2350 transitions.
Support contains 591 out of 880 places (down from 599) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 872 transition count 2342
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 872 transition count 2342
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 864 transition count 2334
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 864 transition count 2334
Applied a total of 32 rules in 87 ms. Remains 864 /880 variables (removed 16) and now considering 2334/2350 (removed 16) transitions.
[2023-03-15 03:10:38] [INFO ] Flow matrix only has 2286 transitions (discarded 48 similar events)
// Phase 1: matrix 2286 rows 864 cols
[2023-03-15 03:10:38] [INFO ] Computed 48 place invariants in 41 ms
[2023-03-15 03:10:39] [INFO ] Dead Transitions using invariants and state equation in 1003 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1091 ms. Remains : 864/880 places, 2334/2350 transitions.
[2023-03-15 03:10:39] [INFO ] Flatten gal took : 85 ms
[2023-03-15 03:10:39] [INFO ] Flatten gal took : 134 ms
[2023-03-15 03:10:39] [INFO ] Input system was already deterministic with 2334 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Drop transitions removed 48 transitions
Trivial Post-agglo rules discarded 48 transitions
Performed 48 trivial Post agglomeration. Transition count delta: 48
Iterating post reduction 0 with 48 rules applied. Total rules applied 48 place count 880 transition count 2302
Reduce places removed 48 places and 0 transitions.
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Iterating post reduction 1 with 64 rules applied. Total rules applied 112 place count 832 transition count 2286
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 128 place count 816 transition count 2286
Performed 64 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 64 Pre rules applied. Total rules applied 128 place count 816 transition count 2222
Deduced a syphon composed of 64 places in 1 ms
Reduce places removed 64 places and 0 transitions.
Iterating global reduction 3 with 128 rules applied. Total rules applied 256 place count 752 transition count 2222
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 264 place count 744 transition count 2214
Iterating global reduction 3 with 8 rules applied. Total rules applied 272 place count 744 transition count 2214
Performed 80 Post agglomeration using F-continuation condition.Transition count delta: 80
Deduced a syphon composed of 80 places in 1 ms
Reduce places removed 80 places and 0 transitions.
Iterating global reduction 3 with 160 rules applied. Total rules applied 432 place count 664 transition count 2134
Applied a total of 432 rules in 183 ms. Remains 664 /880 variables (removed 216) and now considering 2134/2350 (removed 216) transitions.
[2023-03-15 03:10:39] [INFO ] Flow matrix only has 2086 transitions (discarded 48 similar events)
// Phase 1: matrix 2086 rows 664 cols
[2023-03-15 03:10:39] [INFO ] Computed 48 place invariants in 44 ms
[2023-03-15 03:10:40] [INFO ] Dead Transitions using invariants and state equation in 862 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1052 ms. Remains : 664/880 places, 2134/2350 transitions.
[2023-03-15 03:10:40] [INFO ] Flatten gal took : 76 ms
[2023-03-15 03:10:40] [INFO ] Flatten gal took : 81 ms
[2023-03-15 03:10:41] [INFO ] Input system was already deterministic with 2134 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Drop transitions removed 56 transitions
Trivial Post-agglo rules discarded 56 transitions
Performed 56 trivial Post agglomeration. Transition count delta: 56
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 880 transition count 2294
Reduce places removed 56 places and 0 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Iterating post reduction 1 with 64 rules applied. Total rules applied 120 place count 824 transition count 2286
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 128 place count 816 transition count 2286
Performed 112 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 112 Pre rules applied. Total rules applied 128 place count 816 transition count 2174
Deduced a syphon composed of 112 places in 1 ms
Reduce places removed 112 places and 0 transitions.
Iterating global reduction 3 with 224 rules applied. Total rules applied 352 place count 704 transition count 2174
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 360 place count 696 transition count 2166
Iterating global reduction 3 with 8 rules applied. Total rules applied 368 place count 696 transition count 2166
Performed 96 Post agglomeration using F-continuation condition.Transition count delta: 96
Deduced a syphon composed of 96 places in 3 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 3 with 192 rules applied. Total rules applied 560 place count 600 transition count 2070
Applied a total of 560 rules in 123 ms. Remains 600 /880 variables (removed 280) and now considering 2070/2350 (removed 280) transitions.
[2023-03-15 03:10:41] [INFO ] Flow matrix only has 2022 transitions (discarded 48 similar events)
// Phase 1: matrix 2022 rows 600 cols
[2023-03-15 03:10:41] [INFO ] Computed 48 place invariants in 60 ms
[2023-03-15 03:10:42] [INFO ] Dead Transitions using invariants and state equation in 811 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 936 ms. Remains : 600/880 places, 2070/2350 transitions.
[2023-03-15 03:10:42] [INFO ] Flatten gal took : 73 ms
[2023-03-15 03:10:42] [INFO ] Flatten gal took : 78 ms
[2023-03-15 03:10:42] [INFO ] Input system was already deterministic with 2070 transitions.
Finished random walk after 820 steps, including 11 resets, run visited all 1 properties in 7 ms. (steps per millisecond=117 )
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in SI_CTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Drop transitions removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 880 transition count 2334
Reduce places removed 16 places and 0 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Iterating post reduction 1 with 24 rules applied. Total rules applied 40 place count 864 transition count 2326
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 48 place count 856 transition count 2326
Performed 24 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 24 Pre rules applied. Total rules applied 48 place count 856 transition count 2302
Deduced a syphon composed of 24 places in 4 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 3 with 48 rules applied. Total rules applied 96 place count 832 transition count 2302
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 104 place count 824 transition count 2294
Iterating global reduction 3 with 8 rules applied. Total rules applied 112 place count 824 transition count 2294
Performed 56 Post agglomeration using F-continuation condition.Transition count delta: 56
Deduced a syphon composed of 56 places in 3 ms
Reduce places removed 56 places and 0 transitions.
Iterating global reduction 3 with 112 rules applied. Total rules applied 224 place count 768 transition count 2238
Applied a total of 224 rules in 135 ms. Remains 768 /880 variables (removed 112) and now considering 2238/2350 (removed 112) transitions.
[2023-03-15 03:10:42] [INFO ] Flow matrix only has 2190 transitions (discarded 48 similar events)
// Phase 1: matrix 2190 rows 768 cols
[2023-03-15 03:10:42] [INFO ] Computed 48 place invariants in 38 ms
[2023-03-15 03:10:43] [INFO ] Dead Transitions using invariants and state equation in 909 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 1047 ms. Remains : 768/880 places, 2238/2350 transitions.
[2023-03-15 03:10:43] [INFO ] Flatten gal took : 86 ms
[2023-03-15 03:10:43] [INFO ] Flatten gal took : 102 ms
[2023-03-15 03:10:43] [INFO ] Input system was already deterministic with 2238 transitions.
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Applied a total of 0 rules in 16 ms. Remains 880 /880 variables (removed 0) and now considering 2350/2350 (removed 0) transitions.
[2023-03-15 03:10:43] [INFO ] Flow matrix only has 2302 transitions (discarded 48 similar events)
// Phase 1: matrix 2302 rows 880 cols
[2023-03-15 03:10:43] [INFO ] Computed 48 place invariants in 51 ms
[2023-03-15 03:10:44] [INFO ] Dead Transitions using invariants and state equation in 1009 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1026 ms. Remains : 880/880 places, 2350/2350 transitions.
[2023-03-15 03:10:44] [INFO ] Flatten gal took : 82 ms
[2023-03-15 03:10:45] [INFO ] Flatten gal took : 90 ms
[2023-03-15 03:10:45] [INFO ] Input system was already deterministic with 2350 transitions.
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 872 transition count 2342
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 872 transition count 2342
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 864 transition count 2334
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 864 transition count 2334
Applied a total of 32 rules in 42 ms. Remains 864 /880 variables (removed 16) and now considering 2334/2350 (removed 16) transitions.
[2023-03-15 03:10:45] [INFO ] Flow matrix only has 2286 transitions (discarded 48 similar events)
// Phase 1: matrix 2286 rows 864 cols
[2023-03-15 03:10:45] [INFO ] Computed 48 place invariants in 40 ms
[2023-03-15 03:10:46] [INFO ] Dead Transitions using invariants and state equation in 1033 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1077 ms. Remains : 864/880 places, 2334/2350 transitions.
[2023-03-15 03:10:46] [INFO ] Flatten gal took : 82 ms
[2023-03-15 03:10:46] [INFO ] Flatten gal took : 93 ms
[2023-03-15 03:10:46] [INFO ] Input system was already deterministic with 2334 transitions.
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 872 transition count 2342
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 872 transition count 2342
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 864 transition count 2334
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 864 transition count 2334
Applied a total of 32 rules in 31 ms. Remains 864 /880 variables (removed 16) and now considering 2334/2350 (removed 16) transitions.
[2023-03-15 03:10:46] [INFO ] Flow matrix only has 2286 transitions (discarded 48 similar events)
[2023-03-15 03:10:46] [INFO ] Invariant cache hit.
[2023-03-15 03:10:47] [INFO ] Dead Transitions using invariants and state equation in 924 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 956 ms. Remains : 864/880 places, 2334/2350 transitions.
[2023-03-15 03:10:47] [INFO ] Flatten gal took : 78 ms
[2023-03-15 03:10:47] [INFO ] Flatten gal took : 83 ms
[2023-03-15 03:10:48] [INFO ] Input system was already deterministic with 2334 transitions.
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 872 transition count 2342
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 872 transition count 2342
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 864 transition count 2334
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 864 transition count 2334
Applied a total of 32 rules in 32 ms. Remains 864 /880 variables (removed 16) and now considering 2334/2350 (removed 16) transitions.
[2023-03-15 03:10:48] [INFO ] Flow matrix only has 2286 transitions (discarded 48 similar events)
[2023-03-15 03:10:48] [INFO ] Invariant cache hit.
[2023-03-15 03:10:49] [INFO ] Dead Transitions using invariants and state equation in 849 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 883 ms. Remains : 864/880 places, 2334/2350 transitions.
[2023-03-15 03:10:49] [INFO ] Flatten gal took : 76 ms
[2023-03-15 03:10:49] [INFO ] Flatten gal took : 82 ms
[2023-03-15 03:10:49] [INFO ] Input system was already deterministic with 2334 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Drop transitions removed 16 transitions
Trivial Post-agglo rules discarded 16 transitions
Performed 16 trivial Post agglomeration. Transition count delta: 16
Iterating post reduction 0 with 16 rules applied. Total rules applied 16 place count 880 transition count 2334
Reduce places removed 16 places and 0 transitions.
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Iterating post reduction 1 with 32 rules applied. Total rules applied 48 place count 864 transition count 2318
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 64 place count 848 transition count 2318
Performed 72 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 72 Pre rules applied. Total rules applied 64 place count 848 transition count 2246
Deduced a syphon composed of 72 places in 1 ms
Reduce places removed 72 places and 0 transitions.
Iterating global reduction 3 with 144 rules applied. Total rules applied 208 place count 776 transition count 2246
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 216 place count 768 transition count 2238
Iterating global reduction 3 with 8 rules applied. Total rules applied 224 place count 768 transition count 2238
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Deduced a syphon composed of 64 places in 1 ms
Reduce places removed 64 places and 0 transitions.
Iterating global reduction 3 with 128 rules applied. Total rules applied 352 place count 704 transition count 2174
Applied a total of 352 rules in 89 ms. Remains 704 /880 variables (removed 176) and now considering 2174/2350 (removed 176) transitions.
[2023-03-15 03:10:49] [INFO ] Flow matrix only has 2126 transitions (discarded 48 similar events)
// Phase 1: matrix 2126 rows 704 cols
[2023-03-15 03:10:49] [INFO ] Computed 48 place invariants in 57 ms
[2023-03-15 03:10:50] [INFO ] Dead Transitions using invariants and state equation in 852 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 942 ms. Remains : 704/880 places, 2174/2350 transitions.
[2023-03-15 03:10:50] [INFO ] Flatten gal took : 70 ms
[2023-03-15 03:10:50] [INFO ] Flatten gal took : 75 ms
[2023-03-15 03:10:50] [INFO ] Input system was already deterministic with 2174 transitions.
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 8 place count 872 transition count 2342
Iterating global reduction 0 with 8 rules applied. Total rules applied 16 place count 872 transition count 2342
Discarding 8 places :
Symmetric choice reduction at 0 with 8 rule applications. Total rules 24 place count 864 transition count 2334
Iterating global reduction 0 with 8 rules applied. Total rules applied 32 place count 864 transition count 2334
Applied a total of 32 rules in 29 ms. Remains 864 /880 variables (removed 16) and now considering 2334/2350 (removed 16) transitions.
[2023-03-15 03:10:50] [INFO ] Flow matrix only has 2286 transitions (discarded 48 similar events)
// Phase 1: matrix 2286 rows 864 cols
[2023-03-15 03:10:50] [INFO ] Computed 48 place invariants in 37 ms
[2023-03-15 03:10:51] [INFO ] Dead Transitions using invariants and state equation in 921 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 951 ms. Remains : 864/880 places, 2334/2350 transitions.
[2023-03-15 03:10:51] [INFO ] Flatten gal took : 72 ms
[2023-03-15 03:10:51] [INFO ] Flatten gal took : 78 ms
[2023-03-15 03:10:51] [INFO ] Input system was already deterministic with 2334 transitions.
Starting structural reductions in LTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Applied a total of 0 rules in 9 ms. Remains 880 /880 variables (removed 0) and now considering 2350/2350 (removed 0) transitions.
[2023-03-15 03:10:51] [INFO ] Flow matrix only has 2302 transitions (discarded 48 similar events)
// Phase 1: matrix 2302 rows 880 cols
[2023-03-15 03:10:51] [INFO ] Computed 48 place invariants in 46 ms
[2023-03-15 03:10:52] [INFO ] Dead Transitions using invariants and state equation in 934 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 944 ms. Remains : 880/880 places, 2350/2350 transitions.
[2023-03-15 03:10:52] [INFO ] Flatten gal took : 76 ms
[2023-03-15 03:10:52] [INFO ] Flatten gal took : 84 ms
[2023-03-15 03:10:53] [INFO ] Input system was already deterministic with 2350 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 880 transition count 2318
Reduce places removed 32 places and 0 transitions.
Performed 8 Post agglomeration using F-continuation condition.Transition count delta: 8
Iterating post reduction 1 with 40 rules applied. Total rules applied 72 place count 848 transition count 2310
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 2 with 8 rules applied. Total rules applied 80 place count 840 transition count 2310
Performed 120 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 120 Pre rules applied. Total rules applied 80 place count 840 transition count 2190
Deduced a syphon composed of 120 places in 1 ms
Reduce places removed 120 places and 0 transitions.
Iterating global reduction 3 with 240 rules applied. Total rules applied 320 place count 720 transition count 2190
Performed 64 Post agglomeration using F-continuation condition.Transition count delta: 64
Deduced a syphon composed of 64 places in 1 ms
Reduce places removed 64 places and 0 transitions.
Iterating global reduction 3 with 128 rules applied. Total rules applied 448 place count 656 transition count 2126
Applied a total of 448 rules in 86 ms. Remains 656 /880 variables (removed 224) and now considering 2126/2350 (removed 224) transitions.
[2023-03-15 03:10:53] [INFO ] Flow matrix only has 2078 transitions (discarded 48 similar events)
// Phase 1: matrix 2078 rows 656 cols
[2023-03-15 03:10:53] [INFO ] Computed 48 place invariants in 37 ms
[2023-03-15 03:10:54] [INFO ] Dead Transitions using invariants and state equation in 825 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 913 ms. Remains : 656/880 places, 2126/2350 transitions.
[2023-03-15 03:10:54] [INFO ] Flatten gal took : 70 ms
[2023-03-15 03:10:54] [INFO ] Flatten gal took : 75 ms
[2023-03-15 03:10:54] [INFO ] Input system was already deterministic with 2126 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 880/880 places, 2350/2350 transitions.
Drop transitions removed 40 transitions
Trivial Post-agglo rules discarded 40 transitions
Performed 40 trivial Post agglomeration. Transition count delta: 40
Iterating post reduction 0 with 40 rules applied. Total rules applied 40 place count 880 transition count 2310
Reduce places removed 40 places and 0 transitions.
Performed 16 Post agglomeration using F-continuation condition.Transition count delta: 16
Iterating post reduction 1 with 56 rules applied. Total rules applied 96 place count 840 transition count 2294
Reduce places removed 16 places and 0 transitions.
Iterating post reduction 2 with 16 rules applied. Total rules applied 112 place count 824 transition count 2294
Performed 120 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 120 Pre rules applied. Total rules applied 112 place count 824 transition count 2174
Deduced a syphon composed of 120 places in 1 ms
Reduce places removed 120 places and 0 transitions.
Iterating global reduction 3 with 240 rules applied. Total rules applied 352 place count 704 transition count 2174
Discarding 8 places :
Symmetric choice reduction at 3 with 8 rule applications. Total rules 360 place count 696 transition count 2166
Iterating global reduction 3 with 8 rules applied. Total rules applied 368 place count 696 transition count 2166
Performed 72 Post agglomeration using F-continuation condition.Transition count delta: 72
Deduced a syphon composed of 72 places in 1 ms
Reduce places removed 72 places and 0 transitions.
Iterating global reduction 3 with 144 rules applied. Total rules applied 512 place count 624 transition count 2094
Applied a total of 512 rules in 85 ms. Remains 624 /880 variables (removed 256) and now considering 2094/2350 (removed 256) transitions.
[2023-03-15 03:10:54] [INFO ] Flow matrix only has 2046 transitions (discarded 48 similar events)
// Phase 1: matrix 2046 rows 624 cols
[2023-03-15 03:10:54] [INFO ] Computed 48 place invariants in 40 ms
[2023-03-15 03:10:55] [INFO ] Dead Transitions using invariants and state equation in 819 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 906 ms. Remains : 624/880 places, 2094/2350 transitions.
[2023-03-15 03:10:55] [INFO ] Flatten gal took : 69 ms
[2023-03-15 03:10:55] [INFO ] Flatten gal took : 74 ms
[2023-03-15 03:10:55] [INFO ] Input system was already deterministic with 2094 transitions.
[2023-03-15 03:10:55] [INFO ] Flatten gal took : 112 ms
[2023-03-15 03:10:55] [INFO ] Flatten gal took : 113 ms
[2023-03-15 03:10:56] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 23 ms.
[2023-03-15 03:10:56] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 880 places, 2350 transitions and 11942 arcs took 11 ms.
Total runtime 30887 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PolyORBLF-COL-S06J06T08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376
CTLFireability
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S06J06T08-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678850295636
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: LAUNCH task # 37 (type EXCL) for 0 PolyORBLF-COL-S06J06T08-CTLFireability-00
lola: time limit : 293 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 38 (type FNDP) for 0 PolyORBLF-COL-S06J06T08-CTLFireability-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 38 (type FNDP) for PolyORBLF-COL-S06J06T08-CTLFireability-00
lola: result : true
lola: fired transitions : 204
lola: tried executions : 1
lola: time used : 1.000000
lola: memory pages used : 0
lola: CANCELED task # 37 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-00 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 22 (type EXCL) for 21 PolyORBLF-COL-S06J06T08-CTLFireability-11
lola: time limit : 319 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 3/319 2/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 168470 m, 33694 m/sec, 813423 t fired, .
Time elapsed: 87 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 8/319 4/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 413528 m, 49011 m/sec, 2021772 t fired, .
Time elapsed: 92 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 13/319 6/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 663186 m, 49931 m/sec, 3228715 t fired, .
Time elapsed: 97 secs. Pages in use: 6
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 18/319 8/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 916638 m, 50690 m/sec, 4425371 t fired, .
Time elapsed: 102 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 23/319 10/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 1171439 m, 50960 m/sec, 5613024 t fired, .
Time elapsed: 107 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 28/319 12/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 1416417 m, 48995 m/sec, 6815008 t fired, .
Time elapsed: 112 secs. Pages in use: 12
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 33/319 14/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 1667132 m, 50143 m/sec, 8000499 t fired, .
Time elapsed: 117 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 38/319 16/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 1918507 m, 50275 m/sec, 9186812 t fired, .
Time elapsed: 122 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 43/319 18/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 2171332 m, 50565 m/sec, 10365457 t fired, .
Time elapsed: 127 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 48/319 20/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 2427981 m, 51329 m/sec, 11535810 t fired, .
Time elapsed: 132 secs. Pages in use: 20
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 53/319 22/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 2674829 m, 49369 m/sec, 12713631 t fired, .
Time elapsed: 137 secs. Pages in use: 22
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 58/319 25/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 2929098 m, 50853 m/sec, 13874314 t fired, .
Time elapsed: 142 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 63/319 27/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 3180088 m, 50198 m/sec, 15039614 t fired, .
Time elapsed: 147 secs. Pages in use: 27
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 68/319 29/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 3432220 m, 50426 m/sec, 16184438 t fired, .
Time elapsed: 152 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 74/319 31/32 PolyORBLF-COL-S06J06T08-CTLFireability-11 3694633 m, 52482 m/sec, 17325772 t fired, .
Time elapsed: 158 secs. Pages in use: 31
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 22 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 163 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 28 (type EXCL) for 27 PolyORBLF-COL-S06J06T08-CTLFireability-13
lola: time limit : 343 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-13
lola: result : true
lola: markings : 37
lola: fired transitions : 73
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 PolyORBLF-COL-S06J06T08-CTLFireability-12
lola: time limit : 381 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-12
lola: result : false
lola: markings : 217
lola: fired transitions : 216
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 PolyORBLF-COL-S06J06T08-CTLFireability-10
lola: time limit : 429 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-10
lola: result : true
lola: markings : 19926
lola: fired transitions : 64680
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 PolyORBLF-COL-S06J06T08-CTLFireability-09
lola: time limit : 491 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/491 6/32 PolyORBLF-COL-S06J06T08-CTLFireability-09 370443 m, 74088 m/sec, 848601 t fired, .
Time elapsed: 168 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/491 11/32 PolyORBLF-COL-S06J06T08-CTLFireability-09 755522 m, 77015 m/sec, 1770446 t fired, .
Time elapsed: 173 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/491 16/32 PolyORBLF-COL-S06J06T08-CTLFireability-09 1151879 m, 79271 m/sec, 2682167 t fired, .
Time elapsed: 178 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/491 20/32 PolyORBLF-COL-S06J06T08-CTLFireability-09 1528212 m, 75266 m/sec, 3591669 t fired, .
Time elapsed: 183 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/491 25/32 PolyORBLF-COL-S06J06T08-CTLFireability-09 1906172 m, 75592 m/sec, 4493676 t fired, .
Time elapsed: 188 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 30/491 30/32 PolyORBLF-COL-S06J06T08-CTLFireability-09 2287016 m, 76168 m/sec, 5402685 t fired, .
Time elapsed: 193 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 16 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-09 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 198 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 13 (type EXCL) for 12 PolyORBLF-COL-S06J06T08-CTLFireability-08
lola: time limit : 567 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-08
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 PolyORBLF-COL-S06J06T08-CTLFireability-07
lola: time limit : 680 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/680 3/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 177488 m, 35497 m/sec, 778190 t fired, .
Time elapsed: 203 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/680 5/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 356870 m, 35876 m/sec, 1553761 t fired, .
Time elapsed: 208 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/680 8/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 529235 m, 34473 m/sec, 2338710 t fired, .
Time elapsed: 213 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/680 10/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 698796 m, 33912 m/sec, 3111160 t fired, .
Time elapsed: 218 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/680 12/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 862456 m, 32732 m/sec, 3893765 t fired, .
Time elapsed: 223 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 30/680 14/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 1033861 m, 34281 m/sec, 4665607 t fired, .
Time elapsed: 228 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 35/680 17/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 1196478 m, 32523 m/sec, 5437088 t fired, .
Time elapsed: 233 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 40/680 19/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 1361283 m, 32961 m/sec, 6200851 t fired, .
Time elapsed: 238 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 45/680 21/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 1522092 m, 32161 m/sec, 6974621 t fired, .
Time elapsed: 243 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 50/680 23/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 1681634 m, 31908 m/sec, 7741363 t fired, .
Time elapsed: 248 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 55/680 25/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 1857932 m, 35259 m/sec, 8509755 t fired, .
Time elapsed: 253 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 60/680 28/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 2027116 m, 33836 m/sec, 9286928 t fired, .
Time elapsed: 258 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 65/680 30/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 2205454 m, 35667 m/sec, 10054188 t fired, .
Time elapsed: 263 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 70/680 32/32 PolyORBLF-COL-S06J06T08-CTLFireability-07 2361517 m, 31212 m/sec, 10811748 t fired, .
Time elapsed: 268 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 10 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 273 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 31 (type EXCL) for 30 PolyORBLF-COL-S06J06T08-CTLFireability-14
lola: time limit : 831 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 5/831 3/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 268309 m, 53661 m/sec, 1080587 t fired, .
Time elapsed: 278 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 10/831 5/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 526838 m, 51705 m/sec, 2146444 t fired, .
Time elapsed: 283 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 15/831 7/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 783480 m, 51328 m/sec, 3197642 t fired, .
Time elapsed: 288 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 20/831 9/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 1046103 m, 52524 m/sec, 4240806 t fired, .
Time elapsed: 293 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 25/831 12/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 1319949 m, 54769 m/sec, 5285665 t fired, .
Time elapsed: 298 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 30/831 14/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 1590457 m, 54101 m/sec, 6320185 t fired, .
Time elapsed: 303 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 35/831 16/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 1854370 m, 52782 m/sec, 7370797 t fired, .
Time elapsed: 308 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 40/831 18/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 2120309 m, 53187 m/sec, 8409722 t fired, .
Time elapsed: 313 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 45/831 21/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 2388746 m, 53687 m/sec, 9450175 t fired, .
Time elapsed: 318 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 50/831 23/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 2650227 m, 52296 m/sec, 10497646 t fired, .
Time elapsed: 323 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 55/831 25/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 2906295 m, 51213 m/sec, 11543849 t fired, .
Time elapsed: 328 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 60/831 27/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 3180404 m, 54821 m/sec, 12571019 t fired, .
Time elapsed: 333 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 65/831 29/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 3445817 m, 53082 m/sec, 13598084 t fired, .
Time elapsed: 338 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 CTL EXCL 70/831 32/32 PolyORBLF-COL-S06J06T08-CTLFireability-14 3722647 m, 55366 m/sec, 14623781 t fired, .
Time elapsed: 343 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 31 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 348 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 34 (type EXCL) for 33 PolyORBLF-COL-S06J06T08-CTLFireability-15
lola: time limit : 1084 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-15
lola: result : false
lola: markings : 3921
lola: fired transitions : 11355
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 PolyORBLF-COL-S06J06T08-CTLFireability-01
lola: time limit : 1626 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-01
lola: result : true
lola: markings : 229484
lola: fired transitions : 667644
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 7 (type EXCL) for 6 PolyORBLF-COL-S06J06T08-CTLFireability-04
lola: time limit : 3249 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 2/3249 1/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 77091 m, 15418 m/sec, 353551 t fired, .
Time elapsed: 353 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 7/3249 3/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 304225 m, 45426 m/sec, 1395142 t fired, .
Time elapsed: 358 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 12/3249 5/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 525863 m, 44327 m/sec, 2421230 t fired, .
Time elapsed: 363 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 17/3249 7/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 742782 m, 43383 m/sec, 3439376 t fired, .
Time elapsed: 368 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 22/3249 9/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 962298 m, 43903 m/sec, 4441402 t fired, .
Time elapsed: 373 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 27/3249 11/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 1176911 m, 42922 m/sec, 5437280 t fired, .
Time elapsed: 378 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 32/3249 13/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 1393178 m, 43253 m/sec, 6423627 t fired, .
Time elapsed: 383 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 37/3249 15/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 1612758 m, 43916 m/sec, 7396976 t fired, .
Time elapsed: 388 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 42/3249 17/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 1827770 m, 43002 m/sec, 8378983 t fired, .
Time elapsed: 393 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 47/3249 19/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 2041205 m, 42687 m/sec, 9337336 t fired, .
Time elapsed: 398 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 52/3249 21/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 2248433 m, 41445 m/sec, 10314247 t fired, .
Time elapsed: 403 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 57/3249 22/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 2458584 m, 42030 m/sec, 11291599 t fired, .
Time elapsed: 408 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 62/3249 24/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 2673842 m, 43051 m/sec, 12264155 t fired, .
Time elapsed: 413 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 67/3249 26/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 2889523 m, 43136 m/sec, 13233627 t fired, .
Time elapsed: 418 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 72/3249 28/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 3100899 m, 42275 m/sec, 14205338 t fired, .
Time elapsed: 423 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 77/3249 30/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 3316160 m, 43052 m/sec, 15176373 t fired, .
Time elapsed: 428 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 82/3249 32/32 PolyORBLF-COL-S06J06T08-CTLFireability-04 3530968 m, 42961 m/sec, 16125026 t fired, .
Time elapsed: 433 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 7 (type EXCL) for PolyORBLF-COL-S06J06T08-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 438 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: Portfolio finished: no open tasks 12
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J06T08-CTLFireability-00: AG NODL false findpath
PolyORBLF-COL-S06J06T08-CTLFireability-01: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-04: CTL unknown AGGR
PolyORBLF-COL-S06J06T08-CTLFireability-07: CTL unknown AGGR
PolyORBLF-COL-S06J06T08-CTLFireability-08: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-09: CTL unknown AGGR
PolyORBLF-COL-S06J06T08-CTLFireability-10: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-11: CTL unknown AGGR
PolyORBLF-COL-S06J06T08-CTLFireability-12: CTL false CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S06J06T08-CTLFireability-14: CTL unknown AGGR
PolyORBLF-COL-S06J06T08-CTLFireability-15: CTL false CTL model checker
Time elapsed: 438 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-COL-S06J06T08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PolyORBLF-COL-S06J06T08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873948000482"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-COL-S06J06T08.tgz
mv PolyORBLF-COL-S06J06T08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;