Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873947900442.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PolyORBLF-COL-S06J04T04, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873947900442
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 528K
-rw-r--r-- 1 mcc users 9.2K Feb 26 13:54 CTLCardinality.txt
-rw-r--r-- 1 mcc users 86K Feb 26 13:54 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 13:51 CTLFireability.txt
-rw-r--r-- 1 mcc users 45K Feb 26 13:51 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.6K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.7K Feb 26 14:06 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 66K Feb 26 14:06 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 5.5K Feb 26 14:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 34K Feb 26 14:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 154K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-00
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-01
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-02
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-03
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-04
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-05
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-06
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-07
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-08
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-09
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-10
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-11
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-12
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-13
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-14
FORMULA_NAME PolyORBLF-COL-S06J04T04-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678844046857

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-COL-S06J04T04
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 01:34:08] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 01:34:08] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 01:34:08] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 01:34:08] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 01:34:09] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 683 ms
[2023-03-15 01:34:09] [INFO ] Imported 81 HL places and 65 HL transitions for a total of 454 PT places and 7036.0 transition bindings in 20 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
[2023-03-15 01:34:09] [INFO ] Built PT skeleton of HLPN with 81 places and 65 transitions 254 arcs in 4 ms.
[2023-03-15 01:34:09] [INFO ] Skeletonized 12 HLPN properties in 2 ms. Removed 4 properties that had guard overlaps.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 12 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Incomplete random walk after 10000 steps, including 969 resets, run finished after 216 ms. (steps per millisecond=46 ) properties (out of 38) seen :16
Incomplete Best-First random walk after 1000 steps, including 5 resets, run finished after 22 ms. (steps per millisecond=45 ) properties (out of 22) seen :17
Incomplete Best-First random walk after 1001 steps, including 2 resets, run finished after 11 ms. (steps per millisecond=91 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 1001 steps, including 4 resets, run finished after 12 ms. (steps per millisecond=83 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 1001 steps, including 5 resets, run finished after 14 ms. (steps per millisecond=71 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 1000 steps, including 8 resets, run finished after 10 ms. (steps per millisecond=100 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
[2023-03-15 01:34:09] [INFO ] Flow matrix only has 64 transitions (discarded 1 similar events)
// Phase 1: matrix 64 rows 81 cols
[2023-03-15 01:34:09] [INFO ] Computed 26 place invariants in 12 ms
[2023-03-15 01:34:09] [INFO ] [Real]Absence check using 11 positive place invariants in 5 ms returned sat
[2023-03-15 01:34:09] [INFO ] [Real]Absence check using 11 positive and 15 generalized place invariants in 4 ms returned sat
[2023-03-15 01:34:09] [INFO ] After 180ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:1
[2023-03-15 01:34:09] [INFO ] [Nat]Absence check using 11 positive place invariants in 7 ms returned sat
[2023-03-15 01:34:09] [INFO ] [Nat]Absence check using 11 positive and 15 generalized place invariants in 4 ms returned sat
[2023-03-15 01:34:09] [INFO ] After 113ms SMT Verify possible using all constraints in natural domain returned unsat :3 sat :0
Fused 3 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 3 atomic propositions for a total of 12 simplifications.
FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 01:34:09] [INFO ] Flatten gal took : 65 ms
[2023-03-15 01:34:09] [INFO ] Flatten gal took : 9 ms
Transition T_0376 forces synchronizations/join behavior on parameter s of sort Sources
Transition GoPerformWork forces synchronizations/join behavior on parameter j of sort Jobs
Transition T_2315 forces synchronizations/join behavior on parameter t of sort Threads
[2023-03-15 01:34:10] [INFO ] Unfolded HLPN to a Petri net with 454 places and 6994 transitions 59152 arcs in 153 ms.
[2023-03-15 01:34:10] [INFO ] Unfolded 15 HLPN properties in 5 ms.
[2023-03-15 01:34:10] [INFO ] Reduced 4680 identical enabling conditions.
[2023-03-15 01:34:10] [INFO ] Reduced 4680 identical enabling conditions.
[2023-03-15 01:34:10] [INFO ] Reduced 640 identical enabling conditions.
[2023-03-15 01:34:10] [INFO ] Reduced 4680 identical enabling conditions.
[2023-03-15 01:34:10] [INFO ] Reduced 60 identical enabling conditions.
[2023-03-15 01:34:10] [INFO ] Reduced 4680 identical enabling conditions.
[2023-03-15 01:34:10] [INFO ] Reduced 4680 identical enabling conditions.
Ensure Unique test removed 5380 transitions
Reduce redundant transitions removed 5380 transitions.
Support contains 308 out of 454 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 454/454 places, 1614/1614 transitions.
Ensure Unique test removed 6 places
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 448 transition count 1614
Applied a total of 6 rules in 54 ms. Remains 448 /454 variables (removed 6) and now considering 1614/1614 (removed 0) transitions.
[2023-03-15 01:34:10] [INFO ] Flow matrix only has 1590 transitions (discarded 24 similar events)
// Phase 1: matrix 1590 rows 448 cols
[2023-03-15 01:34:10] [INFO ] Computed 44 place invariants in 81 ms
[2023-03-15 01:34:10] [INFO ] Dead Transitions using invariants and state equation in 771 ms found 612 transitions.
Found 612 dead transitions using SMT.
Drop transitions removed 612 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 612 transitions.
[2023-03-15 01:34:10] [INFO ] Flow matrix only has 978 transitions (discarded 24 similar events)
// Phase 1: matrix 978 rows 448 cols
[2023-03-15 01:34:11] [INFO ] Computed 44 place invariants in 36 ms
[2023-03-15 01:34:11] [INFO ] Implicit Places using invariants in 199 ms returned []
[2023-03-15 01:34:11] [INFO ] Flow matrix only has 978 transitions (discarded 24 similar events)
[2023-03-15 01:34:11] [INFO ] Invariant cache hit.
[2023-03-15 01:34:11] [INFO ] State equation strengthened by 112 read => feed constraints.
[2023-03-15 01:34:15] [INFO ] Implicit Places using invariants and state equation in 3937 ms returned []
Implicit Place search using SMT with State Equation took 4136 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 448/454 places, 1002/1614 transitions.
Applied a total of 0 rules in 14 ms. Remains 448 /448 variables (removed 0) and now considering 1002/1002 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4977 ms. Remains : 448/454 places, 1002/1614 transitions.
Support contains 308 out of 448 places after structural reductions.
[2023-03-15 01:34:15] [INFO ] Flatten gal took : 135 ms
[2023-03-15 01:34:15] [INFO ] Flatten gal took : 126 ms
[2023-03-15 01:34:16] [INFO ] Input system was already deterministic with 1002 transitions.
Incomplete random walk after 10000 steps, including 64 resets, run finished after 542 ms. (steps per millisecond=18 ) properties (out of 55) seen :46
Incomplete Best-First random walk after 10000 steps, including 26 resets, run finished after 206 ms. (steps per millisecond=48 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 42 resets, run finished after 528 ms. (steps per millisecond=18 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 24 resets, run finished after 231 ms. (steps per millisecond=43 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 285 resets, run finished after 172 ms. (steps per millisecond=58 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 230 ms. (steps per millisecond=43 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 285 resets, run finished after 578 ms. (steps per millisecond=17 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10001 steps, including 32 resets, run finished after 178 ms. (steps per millisecond=56 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 285 resets, run finished after 128 ms. (steps per millisecond=78 ) properties (out of 9) seen :0
Incomplete Best-First random walk after 10000 steps, including 33 resets, run finished after 184 ms. (steps per millisecond=54 ) properties (out of 9) seen :0
Running SMT prover for 9 properties.
[2023-03-15 01:34:19] [INFO ] Flow matrix only has 978 transitions (discarded 24 similar events)
[2023-03-15 01:34:19] [INFO ] Invariant cache hit.
[2023-03-15 01:34:21] [INFO ] [Real]Absence check using 12 positive place invariants in 3 ms returned sat
[2023-03-15 01:34:21] [INFO ] [Real]Absence check using 12 positive and 32 generalized place invariants in 30 ms returned sat
[2023-03-15 01:34:21] [INFO ] After 917ms SMT Verify possible using all constraints in real domain returned unsat :3 sat :0 real:6
[2023-03-15 01:34:21] [INFO ] [Nat]Absence check using 12 positive place invariants in 3 ms returned sat
[2023-03-15 01:34:22] [INFO ] [Nat]Absence check using 12 positive and 32 generalized place invariants in 31 ms returned sat
[2023-03-15 01:34:31] [INFO ] After 9471ms SMT Verify possible using all constraints in natural domain returned unsat :8 sat :0
Fused 9 Parikh solutions to 1 different solutions.
Parikh walk visited 0 properties in 0 ms.
Support contains 10 out of 448 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Drop transitions removed 28 transitions
Trivial Post-agglo rules discarded 28 transitions
Performed 28 trivial Post agglomeration. Transition count delta: 28
Iterating post reduction 0 with 28 rules applied. Total rules applied 28 place count 448 transition count 974
Reduce places removed 28 places and 0 transitions.
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: 4
Iterating post reduction 1 with 32 rules applied. Total rules applied 60 place count 420 transition count 970
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 2 with 4 rules applied. Total rules applied 64 place count 416 transition count 970
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 48 Pre rules applied. Total rules applied 64 place count 416 transition count 922
Deduced a syphon composed of 48 places in 1 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 3 with 96 rules applied. Total rules applied 160 place count 368 transition count 922
Performed 48 Post agglomeration using F-continuation condition.Transition count delta: 48
Deduced a syphon composed of 48 places in 2 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 3 with 96 rules applied. Total rules applied 256 place count 320 transition count 874
Free-agglomeration rule (complex) applied 8 times.
Iterating global reduction 3 with 8 rules applied. Total rules applied 264 place count 320 transition count 866
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 3 with 8 rules applied. Total rules applied 272 place count 312 transition count 866
Applied a total of 272 rules in 133 ms. Remains 312 /448 variables (removed 136) and now considering 866/1002 (removed 136) transitions.
[2023-03-15 01:34:31] [INFO ] Flow matrix only has 842 transitions (discarded 24 similar events)
// Phase 1: matrix 842 rows 312 cols
[2023-03-15 01:34:31] [INFO ] Computed 44 place invariants in 19 ms
[2023-03-15 01:34:31] [INFO ] Dead Transitions using invariants and state equation in 416 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 553 ms. Remains : 312/448 places, 866/1002 transitions.
Incomplete random walk after 10000 steps, including 107 resets, run finished after 44 ms. (steps per millisecond=227 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 43 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 283336 steps, run timeout after 3001 ms. (steps per millisecond=94 ) properties seen :{}
Probabilistic random walk after 283336 steps, saw 179277 distinct states, run finished after 3008 ms. (steps per millisecond=94 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 01:34:34] [INFO ] Flow matrix only has 842 transitions (discarded 24 similar events)
[2023-03-15 01:34:34] [INFO ] Invariant cache hit.
[2023-03-15 01:34:35] [INFO ] [Real]Absence check using 17 positive place invariants in 6 ms returned sat
[2023-03-15 01:34:35] [INFO ] [Real]Absence check using 17 positive and 27 generalized place invariants in 19 ms returned sat
[2023-03-15 01:34:36] [INFO ] After 1151ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 01:34:36] [INFO ] [Nat]Absence check using 17 positive place invariants in 3 ms returned sat
[2023-03-15 01:34:36] [INFO ] [Nat]Absence check using 17 positive and 27 generalized place invariants in 14 ms returned sat
[2023-03-15 01:34:45] [INFO ] After 9277ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 10 out of 312 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 312/312 places, 866/866 transitions.
Applied a total of 0 rules in 19 ms. Remains 312 /312 variables (removed 0) and now considering 866/866 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 20 ms. Remains : 312/312 places, 866/866 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 312/312 places, 866/866 transitions.
Applied a total of 0 rules in 21 ms. Remains 312 /312 variables (removed 0) and now considering 866/866 (removed 0) transitions.
[2023-03-15 01:34:45] [INFO ] Flow matrix only has 842 transitions (discarded 24 similar events)
[2023-03-15 01:34:45] [INFO ] Invariant cache hit.
[2023-03-15 01:34:45] [INFO ] Implicit Places using invariants in 304 ms returned [266, 267, 268, 269]
Discarding 4 places :
Implicit Place search using SMT only with invariants took 322 ms to find 4 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 1 : 308/312 places, 866/866 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 304 transition count 862
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 304 transition count 862
Applied a total of 8 rules in 27 ms. Remains 304 /308 variables (removed 4) and now considering 862/866 (removed 4) transitions.
[2023-03-15 01:34:45] [INFO ] Flow matrix only has 838 transitions (discarded 24 similar events)
// Phase 1: matrix 838 rows 304 cols
[2023-03-15 01:34:45] [INFO ] Computed 40 place invariants in 14 ms
[2023-03-15 01:34:46] [INFO ] Implicit Places using invariants in 648 ms returned []
[2023-03-15 01:34:46] [INFO ] Flow matrix only has 838 transitions (discarded 24 similar events)
[2023-03-15 01:34:46] [INFO ] Invariant cache hit.
[2023-03-15 01:34:46] [INFO ] State equation strengthened by 112 read => feed constraints.
[2023-03-15 01:34:49] [INFO ] Implicit Places using invariants and state equation in 3232 ms returned []
Implicit Place search using SMT with State Equation took 3883 ms to find 0 implicit places.
Starting structural reductions in REACHABILITY mode, iteration 2 : 304/312 places, 862/866 transitions.
Finished structural reductions in REACHABILITY mode , in 2 iterations and 4253 ms. Remains : 304/312 places, 862/866 transitions.
Incomplete random walk after 10000 steps, including 115 resets, run finished after 47 ms. (steps per millisecond=212 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 35 resets, run finished after 23 ms. (steps per millisecond=434 ) properties (out of 1) seen :0
Interrupted probabilistic random walk after 340610 steps, run timeout after 3001 ms. (steps per millisecond=113 ) properties seen :{}
Probabilistic random walk after 340610 steps, saw 217531 distinct states, run finished after 3001 ms. (steps per millisecond=113 ) properties seen :0
Running SMT prover for 1 properties.
[2023-03-15 01:34:52] [INFO ] Flow matrix only has 838 transitions (discarded 24 similar events)
[2023-03-15 01:34:52] [INFO ] Invariant cache hit.
[2023-03-15 01:34:52] [INFO ] [Real]Absence check using 16 positive place invariants in 3 ms returned sat
[2023-03-15 01:34:52] [INFO ] [Real]Absence check using 16 positive and 24 generalized place invariants in 10 ms returned sat
[2023-03-15 01:34:53] [INFO ] After 821ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 01:34:53] [INFO ] [Nat]Absence check using 16 positive place invariants in 3 ms returned sat
[2023-03-15 01:34:53] [INFO ] [Nat]Absence check using 16 positive and 24 generalized place invariants in 10 ms returned sat
[2023-03-15 01:35:02] [INFO ] After 9351ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Parikh walk visited 0 properties in 0 ms.
Support contains 10 out of 304 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 304/304 places, 862/862 transitions.
Applied a total of 0 rules in 20 ms. Remains 304 /304 variables (removed 0) and now considering 862/862 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 22 ms. Remains : 304/304 places, 862/862 transitions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 304/304 places, 862/862 transitions.
Applied a total of 0 rules in 15 ms. Remains 304 /304 variables (removed 0) and now considering 862/862 (removed 0) transitions.
[2023-03-15 01:35:03] [INFO ] Flow matrix only has 838 transitions (discarded 24 similar events)
[2023-03-15 01:35:03] [INFO ] Invariant cache hit.
[2023-03-15 01:35:03] [INFO ] Implicit Places using invariants in 242 ms returned []
[2023-03-15 01:35:03] [INFO ] Flow matrix only has 838 transitions (discarded 24 similar events)
[2023-03-15 01:35:03] [INFO ] Invariant cache hit.
[2023-03-15 01:35:03] [INFO ] State equation strengthened by 112 read => feed constraints.
[2023-03-15 01:35:07] [INFO ] Implicit Places using invariants and state equation in 3919 ms returned []
Implicit Place search using SMT with State Equation took 4165 ms to find 0 implicit places.
[2023-03-15 01:35:07] [INFO ] Redundant transitions in 50 ms returned []
[2023-03-15 01:35:07] [INFO ] Flow matrix only has 838 transitions (discarded 24 similar events)
[2023-03-15 01:35:07] [INFO ] Invariant cache hit.
[2023-03-15 01:35:07] [INFO ] Dead Transitions using invariants and state equation in 361 ms found 0 transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 4607 ms. Remains : 304/304 places, 862/862 transitions.
Ensure Unique test removed 24 transitions
Reduce isomorphic transitions removed 24 transitions.
Iterating post reduction 0 with 24 rules applied. Total rules applied 24 place count 304 transition count 838
Drop transitions removed 24 transitions
Redundant transition composition rules discarded 24 transitions
Iterating global reduction 1 with 24 rules applied. Total rules applied 48 place count 304 transition count 814
Performed 4 Post agglomeration using F-continuation condition.Transition count delta: -40
Deduced a syphon composed of 4 places in 1 ms
Reduce places removed 4 places and 0 transitions.
Iterating global reduction 1 with 8 rules applied. Total rules applied 56 place count 300 transition count 854
Free-agglomeration rule applied 4 times.
Iterating global reduction 1 with 4 rules applied. Total rules applied 60 place count 300 transition count 850
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 1 with 4 rules applied. Total rules applied 64 place count 296 transition count 850
Free-agglomeration rule (complex) applied 10 times.
Iterating global reduction 2 with 10 rules applied. Total rules applied 74 place count 296 transition count 840
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 2 with 10 rules applied. Total rules applied 84 place count 286 transition count 840
Applied a total of 84 rules in 71 ms. Remains 286 /304 variables (removed 18) and now considering 840/862 (removed 22) transitions.
Running SMT prover for 1 properties.
// Phase 1: matrix 840 rows 286 cols
[2023-03-15 01:35:07] [INFO ] Computed 40 place invariants in 17 ms
[2023-03-15 01:35:07] [INFO ] [Real]Absence check using 16 positive place invariants in 2 ms returned sat
[2023-03-15 01:35:07] [INFO ] [Real]Absence check using 16 positive and 24 generalized place invariants in 20 ms returned sat
[2023-03-15 01:35:07] [INFO ] After 74ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-15 01:35:07] [INFO ] [Nat]Absence check using 16 positive place invariants in 8 ms returned sat
[2023-03-15 01:35:07] [INFO ] [Nat]Absence check using 16 positive and 24 generalized place invariants in 22 ms returned sat
[2023-03-15 01:35:17] [INFO ] After 9403ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :0
Successfully simplified 8 atomic propositions for a total of 15 simplifications.
FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 01:35:17] [INFO ] Flatten gal took : 80 ms
[2023-03-15 01:35:17] [INFO ] Flatten gal took : 82 ms
[2023-03-15 01:35:18] [INFO ] Input system was already deterministic with 1002 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 440 transition count 994
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 440 transition count 994
Applied a total of 16 rules in 13 ms. Remains 440 /448 variables (removed 8) and now considering 994/1002 (removed 8) transitions.
[2023-03-15 01:35:18] [INFO ] Flow matrix only has 970 transitions (discarded 24 similar events)
// Phase 1: matrix 970 rows 440 cols
[2023-03-15 01:35:18] [INFO ] Computed 44 place invariants in 21 ms
[2023-03-15 01:35:18] [INFO ] Dead Transitions using invariants and state equation in 440 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 458 ms. Remains : 440/448 places, 994/1002 transitions.
[2023-03-15 01:35:18] [INFO ] Flatten gal took : 40 ms
[2023-03-15 01:35:18] [INFO ] Flatten gal took : 41 ms
[2023-03-15 01:35:18] [INFO ] Input system was already deterministic with 994 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Applied a total of 0 rules in 5 ms. Remains 448 /448 variables (removed 0) and now considering 1002/1002 (removed 0) transitions.
[2023-03-15 01:35:18] [INFO ] Flow matrix only has 978 transitions (discarded 24 similar events)
// Phase 1: matrix 978 rows 448 cols
[2023-03-15 01:35:18] [INFO ] Computed 44 place invariants in 21 ms
[2023-03-15 01:35:19] [INFO ] Dead Transitions using invariants and state equation in 439 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 446 ms. Remains : 448/448 places, 1002/1002 transitions.
[2023-03-15 01:35:19] [INFO ] Flatten gal took : 38 ms
[2023-03-15 01:35:19] [INFO ] Flatten gal took : 40 ms
[2023-03-15 01:35:19] [INFO ] Input system was already deterministic with 1002 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Drop transitions removed 36 transitions
Trivial Post-agglo rules discarded 36 transitions
Performed 36 trivial Post agglomeration. Transition count delta: 36
Iterating post reduction 0 with 36 rules applied. Total rules applied 36 place count 448 transition count 966
Reduce places removed 36 places and 0 transitions.
Iterating post reduction 1 with 36 rules applied. Total rules applied 72 place count 412 transition count 966
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 72 place count 412 transition count 918
Deduced a syphon composed of 48 places in 1 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 168 place count 364 transition count 918
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 216 place count 340 transition count 894
Applied a total of 216 rules in 50 ms. Remains 340 /448 variables (removed 108) and now considering 894/1002 (removed 108) transitions.
[2023-03-15 01:35:19] [INFO ] Flow matrix only has 870 transitions (discarded 24 similar events)
// Phase 1: matrix 870 rows 340 cols
[2023-03-15 01:35:19] [INFO ] Computed 44 place invariants in 12 ms
[2023-03-15 01:35:19] [INFO ] Dead Transitions using invariants and state equation in 371 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 423 ms. Remains : 340/448 places, 894/1002 transitions.
[2023-03-15 01:35:19] [INFO ] Flatten gal took : 34 ms
[2023-03-15 01:35:19] [INFO ] Flatten gal took : 36 ms
[2023-03-15 01:35:19] [INFO ] Input system was already deterministic with 894 transitions.
Finished random walk after 71 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=71 )
FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-02 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 440 transition count 994
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 440 transition count 994
Applied a total of 16 rules in 15 ms. Remains 440 /448 variables (removed 8) and now considering 994/1002 (removed 8) transitions.
[2023-03-15 01:35:19] [INFO ] Flow matrix only has 970 transitions (discarded 24 similar events)
// Phase 1: matrix 970 rows 440 cols
[2023-03-15 01:35:19] [INFO ] Computed 44 place invariants in 19 ms
[2023-03-15 01:35:20] [INFO ] Dead Transitions using invariants and state equation in 431 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 447 ms. Remains : 440/448 places, 994/1002 transitions.
[2023-03-15 01:35:20] [INFO ] Flatten gal took : 34 ms
[2023-03-15 01:35:20] [INFO ] Flatten gal took : 37 ms
[2023-03-15 01:35:20] [INFO ] Input system was already deterministic with 994 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Applied a total of 8 rules in 8 ms. Remains 444 /448 variables (removed 4) and now considering 998/1002 (removed 4) transitions.
[2023-03-15 01:35:20] [INFO ] Flow matrix only has 974 transitions (discarded 24 similar events)
// Phase 1: matrix 974 rows 444 cols
[2023-03-15 01:35:20] [INFO ] Computed 44 place invariants in 25 ms
[2023-03-15 01:35:20] [INFO ] Dead Transitions using invariants and state equation in 433 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 443 ms. Remains : 444/448 places, 998/1002 transitions.
[2023-03-15 01:35:20] [INFO ] Flatten gal took : 36 ms
[2023-03-15 01:35:21] [INFO ] Flatten gal took : 38 ms
[2023-03-15 01:35:21] [INFO ] Input system was already deterministic with 998 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 440 transition count 994
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 440 transition count 994
Applied a total of 16 rules in 14 ms. Remains 440 /448 variables (removed 8) and now considering 994/1002 (removed 8) transitions.
[2023-03-15 01:35:21] [INFO ] Flow matrix only has 970 transitions (discarded 24 similar events)
// Phase 1: matrix 970 rows 440 cols
[2023-03-15 01:35:21] [INFO ] Computed 44 place invariants in 23 ms
[2023-03-15 01:35:21] [INFO ] Dead Transitions using invariants and state equation in 446 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 462 ms. Remains : 440/448 places, 994/1002 transitions.
[2023-03-15 01:35:21] [INFO ] Flatten gal took : 34 ms
[2023-03-15 01:35:21] [INFO ] Flatten gal took : 37 ms
[2023-03-15 01:35:21] [INFO ] Input system was already deterministic with 994 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 440 transition count 994
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 440 transition count 994
Applied a total of 16 rules in 16 ms. Remains 440 /448 variables (removed 8) and now considering 994/1002 (removed 8) transitions.
[2023-03-15 01:35:21] [INFO ] Flow matrix only has 970 transitions (discarded 24 similar events)
[2023-03-15 01:35:21] [INFO ] Invariant cache hit.
[2023-03-15 01:35:22] [INFO ] Dead Transitions using invariants and state equation in 394 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 411 ms. Remains : 440/448 places, 994/1002 transitions.
[2023-03-15 01:35:22] [INFO ] Flatten gal took : 34 ms
[2023-03-15 01:35:22] [INFO ] Flatten gal took : 37 ms
[2023-03-15 01:35:22] [INFO ] Input system was already deterministic with 994 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Applied a total of 0 rules in 4 ms. Remains 448 /448 variables (removed 0) and now considering 1002/1002 (removed 0) transitions.
[2023-03-15 01:35:22] [INFO ] Flow matrix only has 978 transitions (discarded 24 similar events)
// Phase 1: matrix 978 rows 448 cols
[2023-03-15 01:35:22] [INFO ] Computed 44 place invariants in 19 ms
[2023-03-15 01:35:22] [INFO ] Dead Transitions using invariants and state equation in 412 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 417 ms. Remains : 448/448 places, 1002/1002 transitions.
[2023-03-15 01:35:22] [INFO ] Flatten gal took : 32 ms
[2023-03-15 01:35:22] [INFO ] Flatten gal took : 35 ms
[2023-03-15 01:35:22] [INFO ] Input system was already deterministic with 1002 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Applied a total of 8 rules in 9 ms. Remains 444 /448 variables (removed 4) and now considering 998/1002 (removed 4) transitions.
[2023-03-15 01:35:22] [INFO ] Flow matrix only has 974 transitions (discarded 24 similar events)
// Phase 1: matrix 974 rows 444 cols
[2023-03-15 01:35:22] [INFO ] Computed 44 place invariants in 24 ms
[2023-03-15 01:35:23] [INFO ] Dead Transitions using invariants and state equation in 413 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 422 ms. Remains : 444/448 places, 998/1002 transitions.
[2023-03-15 01:35:23] [INFO ] Flatten gal took : 32 ms
[2023-03-15 01:35:23] [INFO ] Flatten gal took : 35 ms
[2023-03-15 01:35:23] [INFO ] Input system was already deterministic with 998 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Applied a total of 8 rules in 9 ms. Remains 444 /448 variables (removed 4) and now considering 998/1002 (removed 4) transitions.
[2023-03-15 01:35:23] [INFO ] Flow matrix only has 974 transitions (discarded 24 similar events)
[2023-03-15 01:35:23] [INFO ] Invariant cache hit.
[2023-03-15 01:35:23] [INFO ] Dead Transitions using invariants and state equation in 393 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 402 ms. Remains : 444/448 places, 998/1002 transitions.
[2023-03-15 01:35:23] [INFO ] Flatten gal took : 33 ms
[2023-03-15 01:35:23] [INFO ] Flatten gal took : 36 ms
[2023-03-15 01:35:24] [INFO ] Input system was already deterministic with 998 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Applied a total of 0 rules in 4 ms. Remains 448 /448 variables (removed 0) and now considering 1002/1002 (removed 0) transitions.
[2023-03-15 01:35:24] [INFO ] Flow matrix only has 978 transitions (discarded 24 similar events)
// Phase 1: matrix 978 rows 448 cols
[2023-03-15 01:35:24] [INFO ] Computed 44 place invariants in 21 ms
[2023-03-15 01:35:24] [INFO ] Dead Transitions using invariants and state equation in 413 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 419 ms. Remains : 448/448 places, 1002/1002 transitions.
[2023-03-15 01:35:24] [INFO ] Flatten gal took : 37 ms
[2023-03-15 01:35:24] [INFO ] Flatten gal took : 43 ms
[2023-03-15 01:35:24] [INFO ] Input system was already deterministic with 1002 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Drop transitions removed 28 transitions
Trivial Post-agglo rules discarded 28 transitions
Performed 28 trivial Post agglomeration. Transition count delta: 28
Iterating post reduction 0 with 28 rules applied. Total rules applied 28 place count 448 transition count 974
Reduce places removed 28 places and 0 transitions.
Iterating post reduction 1 with 28 rules applied. Total rules applied 56 place count 420 transition count 974
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 56 place count 420 transition count 926
Deduced a syphon composed of 48 places in 1 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 152 place count 372 transition count 926
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Deduced a syphon composed of 24 places in 1 ms
Reduce places removed 24 places and 0 transitions.
Iterating global reduction 2 with 48 rules applied. Total rules applied 200 place count 348 transition count 902
Applied a total of 200 rules in 39 ms. Remains 348 /448 variables (removed 100) and now considering 902/1002 (removed 100) transitions.
[2023-03-15 01:35:24] [INFO ] Flow matrix only has 878 transitions (discarded 24 similar events)
// Phase 1: matrix 878 rows 348 cols
[2023-03-15 01:35:24] [INFO ] Computed 44 place invariants in 15 ms
[2023-03-15 01:35:25] [INFO ] Dead Transitions using invariants and state equation in 360 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 404 ms. Remains : 348/448 places, 902/1002 transitions.
[2023-03-15 01:35:25] [INFO ] Flatten gal took : 36 ms
[2023-03-15 01:35:25] [INFO ] Flatten gal took : 33 ms
[2023-03-15 01:35:25] [INFO ] Input system was already deterministic with 902 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Drop transitions removed 32 transitions
Trivial Post-agglo rules discarded 32 transitions
Performed 32 trivial Post agglomeration. Transition count delta: 32
Iterating post reduction 0 with 32 rules applied. Total rules applied 32 place count 448 transition count 970
Reduce places removed 32 places and 0 transitions.
Iterating post reduction 1 with 32 rules applied. Total rules applied 64 place count 416 transition count 970
Performed 48 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 48 Pre rules applied. Total rules applied 64 place count 416 transition count 922
Deduced a syphon composed of 48 places in 1 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 160 place count 368 transition count 922
Performed 48 Post agglomeration using F-continuation condition.Transition count delta: 48
Deduced a syphon composed of 48 places in 1 ms
Reduce places removed 48 places and 0 transitions.
Iterating global reduction 2 with 96 rules applied. Total rules applied 256 place count 320 transition count 874
Applied a total of 256 rules in 48 ms. Remains 320 /448 variables (removed 128) and now considering 874/1002 (removed 128) transitions.
[2023-03-15 01:35:25] [INFO ] Flow matrix only has 850 transitions (discarded 24 similar events)
// Phase 1: matrix 850 rows 320 cols
[2023-03-15 01:35:25] [INFO ] Computed 44 place invariants in 16 ms
[2023-03-15 01:35:25] [INFO ] Dead Transitions using invariants and state equation in 349 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 398 ms. Remains : 320/448 places, 874/1002 transitions.
[2023-03-15 01:35:25] [INFO ] Flatten gal took : 38 ms
[2023-03-15 01:35:25] [INFO ] Flatten gal took : 45 ms
[2023-03-15 01:35:25] [INFO ] Input system was already deterministic with 874 transitions.
Starting structural reductions in LTL mode, iteration 0 : 448/448 places, 1002/1002 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 444 transition count 998
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 444 transition count 998
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 12 place count 440 transition count 994
Iterating global reduction 0 with 4 rules applied. Total rules applied 16 place count 440 transition count 994
Applied a total of 16 rules in 12 ms. Remains 440 /448 variables (removed 8) and now considering 994/1002 (removed 8) transitions.
[2023-03-15 01:35:25] [INFO ] Flow matrix only has 970 transitions (discarded 24 similar events)
// Phase 1: matrix 970 rows 440 cols
[2023-03-15 01:35:25] [INFO ] Computed 44 place invariants in 26 ms
[2023-03-15 01:35:26] [INFO ] Dead Transitions using invariants and state equation in 448 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 461 ms. Remains : 440/448 places, 994/1002 transitions.
[2023-03-15 01:35:26] [INFO ] Flatten gal took : 37 ms
[2023-03-15 01:35:26] [INFO ] Flatten gal took : 44 ms
[2023-03-15 01:35:26] [INFO ] Input system was already deterministic with 994 transitions.
[2023-03-15 01:35:26] [INFO ] Flatten gal took : 64 ms
[2023-03-15 01:35:26] [INFO ] Flatten gal took : 64 ms
[2023-03-15 01:35:27] [INFO ] Export to MCC of 13 properties in file /home/mcc/execution/CTLFireability.sr.xml took 23 ms.
[2023-03-15 01:35:27] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 448 places, 1002 transitions and 5242 arcs took 5 ms.
Total runtime 78819 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PolyORBLF-COL-S06J04T04
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-COL-S06J04T04-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678844350004

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
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lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:284
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: RELEASE
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
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lola: result : true
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lola: tried executions : 1
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PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

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PolyORBLF-COL-S06J04T04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

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25 CTL EXCL 50/350 29/32 PolyORBLF-COL-S06J04T04-CTLFireability-09 3915824 m, 73393 m/sec, 10376276 t fired, .

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PolyORBLF-COL-S06J04T04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/1138 22/32 PolyORBLF-COL-S06J04T04-CTLFireability-00 3072008 m, 153716 m/sec, 5679654 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J04T04-CTLFireability-01: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-03: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-04: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-05: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-07: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-10: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-11: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J04T04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/1138 27/32 PolyORBLF-COL-S06J04T04-CTLFireability-00 3783355 m, 142269 m/sec, 6992246 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J04T04-CTLFireability-01: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-03: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-04: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-05: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-07: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-10: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-11: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J04T04-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/1138 32/32 PolyORBLF-COL-S06J04T04-CTLFireability-00 4513782 m, 146085 m/sec, 8361376 t fired, .

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lola: CANCELED task # 1 (type EXCL) for PolyORBLF-COL-S06J04T04-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J04T04-CTLFireability-01: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-03: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-04: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-05: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-07: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-10: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-11: AG false findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S06J04T04-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-06: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S06J04T04-CTLFireability-12: DISJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

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lola: LAUNCH task # 43 (type EXCL) for 33 PolyORBLF-COL-S06J04T04-CTLFireability-12
lola: time limit : 1689 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for PolyORBLF-COL-S06J04T04-CTLFireability-12
lola: result : true
lola: markings : 54
lola: fired transitions : 53
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 38 (type EXCL) for 33 PolyORBLF-COL-S06J04T04-CTLFireability-12
lola: time limit : 3379 sec
lola: memory limit: 32 pages
lola: FINISHED task # 38 (type EXCL) for PolyORBLF-COL-S06J04T04-CTLFireability-12
lola: result : true
lola: markings : 22
lola: fired transitions : 44
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 13

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S06J04T04-CTLFireability-00: CTL unknown AGGR
PolyORBLF-COL-S06J04T04-CTLFireability-01: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-03: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-04: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-05: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-06: CTL unknown AGGR
PolyORBLF-COL-S06J04T04-CTLFireability-07: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-08: CTL unknown AGGR
PolyORBLF-COL-S06J04T04-CTLFireability-09: CTL unknown AGGR
PolyORBLF-COL-S06J04T04-CTLFireability-10: CTL false CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-11: AG false findpath
PolyORBLF-COL-S06J04T04-CTLFireability-12: DISJ true CTL model checker
PolyORBLF-COL-S06J04T04-CTLFireability-15: CTL unknown AGGR


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-COL-S06J04T04"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PolyORBLF-COL-S06J04T04, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873947900442"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-COL-S06J04T04.tgz
mv PolyORBLF-COL-S06J04T04 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;