About the Execution of LoLa+red for PolyORBLF-COL-S04J06T08
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
7617.747 | 361573.00 | 668874.00 | 1072.00 | ???T?TTFFFFTFT?? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r295-tall-167873947900426.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PolyORBLF-COL-S04J06T08, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873947900426
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 544K
-rw-r--r-- 1 mcc users 9.3K Feb 26 14:12 CTLCardinality.txt
-rw-r--r-- 1 mcc users 89K Feb 26 14:12 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.1K Feb 26 14:10 CTLFireability.txt
-rw-r--r-- 1 mcc users 51K Feb 26 14:10 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.4K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 7.8K Feb 26 14:21 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 60K Feb 26 14:21 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.4K Feb 26 14:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 54K Feb 26 14:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.8K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 154K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-00
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-01
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-02
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-03
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-04
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-05
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-06
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-07
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-08
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-09
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-10
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-11
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-12
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-13
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-14
FORMULA_NAME PolyORBLF-COL-S04J06T08-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678840514103
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-COL-S04J06T08
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 00:35:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-15 00:35:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 00:35:15] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 00:35:15] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 00:35:16] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 749 ms
[2023-03-15 00:35:16] [INFO ] Imported 81 HL places and 65 HL transitions for a total of 792 PT places and 4336.0 transition bindings in 19 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 10 ms.
[2023-03-15 00:35:16] [INFO ] Built PT skeleton of HLPN with 81 places and 65 transitions 254 arcs in 5 ms.
[2023-03-15 00:35:16] [INFO ] Skeletonized 13 HLPN properties in 2 ms. Removed 3 properties that had guard overlaps.
Computed a total of 0 stabilizing places and 0 stable transitions
Remains 13 properties that can be checked using skeleton over-approximation.
Computed a total of 0 stabilizing places and 0 stable transitions
Incomplete random walk after 10000 steps, including 3 resets, run finished after 297 ms. (steps per millisecond=33 ) properties (out of 41) seen :36
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 96 ms. (steps per millisecond=104 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 109 ms. (steps per millisecond=91 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 80 ms. (steps per millisecond=125 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 94 ms. (steps per millisecond=106 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-15 00:35:17] [INFO ] Flow matrix only has 64 transitions (discarded 1 similar events)
// Phase 1: matrix 64 rows 81 cols
[2023-03-15 00:35:17] [INFO ] Computed 26 place invariants in 11 ms
[2023-03-15 00:35:17] [INFO ] [Real]Absence check using 11 positive place invariants in 5 ms returned sat
[2023-03-15 00:35:17] [INFO ] [Real]Absence check using 11 positive and 15 generalized place invariants in 4 ms returned sat
[2023-03-15 00:35:17] [INFO ] After 187ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 5 atomic propositions for a total of 13 simplifications.
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-05 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-07 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 00:35:17] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-15 00:35:17] [INFO ] Flatten gal took : 35 ms
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-15 00:35:17] [INFO ] Flatten gal took : 10 ms
Transition T_2315 forces synchronizations/join behavior on parameter t of sort Threads
Transition GoPerformWork forces synchronizations/join behavior on parameter j of sort Jobs
Transition T_0376 forces synchronizations/join behavior on parameter s of sort Sources
[2023-03-15 00:35:17] [INFO ] Unfolded HLPN to a Petri net with 792 places and 4268 transitions 28832 arcs in 78 ms.
[2023-03-15 00:35:17] [INFO ] Unfolded 13 HLPN properties in 1 ms.
[2023-03-15 00:35:17] [INFO ] Reduced 1768 identical enabling conditions.
[2023-03-15 00:35:17] [INFO ] Reduced 352 identical enabling conditions.
[2023-03-15 00:35:17] [INFO ] Reduced 48 identical enabling conditions.
[2023-03-15 00:35:17] [INFO ] Reduced 352 identical enabling conditions.
[2023-03-15 00:35:17] [INFO ] Reduced 48 identical enabling conditions.
[2023-03-15 00:35:17] [INFO ] Reduced 48 identical enabling conditions.
Ensure Unique test removed 2168 transitions
Reduce redundant transitions removed 2168 transitions.
Support contains 670 out of 792 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 2100/2100 transitions.
Applied a total of 0 rules in 62 ms. Remains 792 /792 variables (removed 0) and now considering 2100/2100 (removed 0) transitions.
[2023-03-15 00:35:17] [INFO ] Flow matrix only has 2068 transitions (discarded 32 similar events)
// Phase 1: matrix 2068 rows 792 cols
[2023-03-15 00:35:17] [INFO ] Computed 58 place invariants in 107 ms
[2023-03-15 00:35:18] [INFO ] Dead Transitions using invariants and state equation in 1018 ms found 432 transitions.
Found 432 dead transitions using SMT.
Drop transitions removed 432 transitions
Dead transitions reduction (with SMT) triggered by suspicious arc values removed 432 transitions.
[2023-03-15 00:35:18] [INFO ] Flow matrix only has 1636 transitions (discarded 32 similar events)
// Phase 1: matrix 1636 rows 792 cols
[2023-03-15 00:35:18] [INFO ] Computed 58 place invariants in 50 ms
[2023-03-15 00:35:19] [INFO ] Implicit Places using invariants in 294 ms returned []
[2023-03-15 00:35:19] [INFO ] Flow matrix only has 1636 transitions (discarded 32 similar events)
[2023-03-15 00:35:19] [INFO ] Invariant cache hit.
[2023-03-15 00:35:19] [INFO ] State equation strengthened by 160 read => feed constraints.
[2023-03-15 00:35:22] [INFO ] Implicit Places using invariants and state equation in 3658 ms returned []
Implicit Place search using SMT with State Equation took 3959 ms to find 0 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 792/792 places, 1668/2100 transitions.
Applied a total of 0 rules in 18 ms. Remains 792 /792 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5059 ms. Remains : 792/792 places, 1668/2100 transitions.
Support contains 670 out of 792 places after structural reductions.
[2023-03-15 00:35:22] [INFO ] Flatten gal took : 157 ms
[2023-03-15 00:35:23] [INFO ] Flatten gal took : 129 ms
[2023-03-15 00:35:23] [INFO ] Input system was already deterministic with 1668 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 326 ms. (steps per millisecond=30 ) properties (out of 58) seen :53
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 231 ms. (steps per millisecond=43 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 137 ms. (steps per millisecond=73 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 134 ms. (steps per millisecond=74 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 105 ms. (steps per millisecond=95 ) properties (out of 5) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 132 ms. (steps per millisecond=75 ) properties (out of 5) seen :0
Running SMT prover for 5 properties.
[2023-03-15 00:35:24] [INFO ] Flow matrix only has 1636 transitions (discarded 32 similar events)
[2023-03-15 00:35:24] [INFO ] Invariant cache hit.
[2023-03-15 00:35:25] [INFO ] [Real]Absence check using 17 positive place invariants in 5 ms returned sat
[2023-03-15 00:35:25] [INFO ] [Real]Absence check using 17 positive and 41 generalized place invariants in 36 ms returned sat
[2023-03-15 00:35:25] [INFO ] After 545ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0
Fused 5 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 5 atomic propositions for a total of 13 simplifications.
[2023-03-15 00:35:26] [INFO ] Flatten gal took : 84 ms
[2023-03-15 00:35:26] [INFO ] Flatten gal took : 88 ms
[2023-03-15 00:35:26] [INFO ] Input system was already deterministic with 1668 transitions.
Support contains 614 out of 792 places (down from 622) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 95 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:26] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
// Phase 1: matrix 1620 rows 772 cols
[2023-03-15 00:35:26] [INFO ] Computed 54 place invariants in 37 ms
[2023-03-15 00:35:27] [INFO ] Dead Transitions using invariants and state equation in 687 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 782 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:27] [INFO ] Flatten gal took : 60 ms
[2023-03-15 00:35:27] [INFO ] Flatten gal took : 59 ms
[2023-03-15 00:35:27] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Applied a total of 20 rules in 42 ms. Remains 780 /792 variables (removed 12) and now considering 1660/1668 (removed 8) transitions.
[2023-03-15 00:35:27] [INFO ] Flow matrix only has 1628 transitions (discarded 32 similar events)
// Phase 1: matrix 1628 rows 780 cols
[2023-03-15 00:35:27] [INFO ] Computed 54 place invariants in 41 ms
[2023-03-15 00:35:28] [INFO ] Dead Transitions using invariants and state equation in 681 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 724 ms. Remains : 780/792 places, 1660/1668 transitions.
[2023-03-15 00:35:28] [INFO ] Flatten gal took : 57 ms
[2023-03-15 00:35:28] [INFO ] Flatten gal took : 64 ms
[2023-03-15 00:35:28] [INFO ] Input system was already deterministic with 1660 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 44 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:28] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
// Phase 1: matrix 1620 rows 772 cols
[2023-03-15 00:35:28] [INFO ] Computed 54 place invariants in 35 ms
[2023-03-15 00:35:29] [INFO ] Dead Transitions using invariants and state equation in 640 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 686 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:29] [INFO ] Flatten gal took : 49 ms
[2023-03-15 00:35:29] [INFO ] Flatten gal took : 52 ms
[2023-03-15 00:35:29] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 32 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:29] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
[2023-03-15 00:35:29] [INFO ] Invariant cache hit.
[2023-03-15 00:35:30] [INFO ] Dead Transitions using invariants and state equation in 622 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 655 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:30] [INFO ] Flatten gal took : 47 ms
[2023-03-15 00:35:30] [INFO ] Flatten gal took : 51 ms
[2023-03-15 00:35:30] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Applied a total of 4 rules in 11 ms. Remains 788 /792 variables (removed 4) and now considering 1668/1668 (removed 0) transitions.
[2023-03-15 00:35:30] [INFO ] Flow matrix only has 1636 transitions (discarded 32 similar events)
// Phase 1: matrix 1636 rows 788 cols
[2023-03-15 00:35:30] [INFO ] Computed 54 place invariants in 27 ms
[2023-03-15 00:35:31] [INFO ] Dead Transitions using invariants and state equation in 653 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 665 ms. Remains : 788/792 places, 1668/1668 transitions.
[2023-03-15 00:35:31] [INFO ] Flatten gal took : 48 ms
[2023-03-15 00:35:31] [INFO ] Flatten gal took : 53 ms
[2023-03-15 00:35:31] [INFO ] Input system was already deterministic with 1668 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Drop transitions removed 56 transitions
Trivial Post-agglo rules discarded 56 transitions
Performed 56 trivial Post agglomeration. Transition count delta: 56
Iterating post reduction 0 with 56 rules applied. Total rules applied 56 place count 788 transition count 1612
Reduce places removed 56 places and 0 transitions.
Iterating post reduction 1 with 56 rules applied. Total rules applied 112 place count 732 transition count 1612
Performed 104 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 104 Pre rules applied. Total rules applied 112 place count 732 transition count 1508
Deduced a syphon composed of 104 places in 1 ms
Reduce places removed 104 places and 0 transitions.
Iterating global reduction 2 with 208 rules applied. Total rules applied 320 place count 628 transition count 1508
Discarding 8 places :
Symmetric choice reduction at 2 with 8 rule applications. Total rules 328 place count 620 transition count 1500
Iterating global reduction 2 with 8 rules applied. Total rules applied 336 place count 620 transition count 1500
Performed 72 Post agglomeration using F-continuation condition.Transition count delta: 72
Deduced a syphon composed of 72 places in 1 ms
Reduce places removed 72 places and 0 transitions.
Iterating global reduction 2 with 144 rules applied. Total rules applied 480 place count 548 transition count 1428
Applied a total of 480 rules in 135 ms. Remains 548 /792 variables (removed 244) and now considering 1428/1668 (removed 240) transitions.
[2023-03-15 00:35:31] [INFO ] Flow matrix only has 1396 transitions (discarded 32 similar events)
// Phase 1: matrix 1396 rows 548 cols
[2023-03-15 00:35:31] [INFO ] Computed 54 place invariants in 33 ms
[2023-03-15 00:35:32] [INFO ] Dead Transitions using invariants and state equation in 573 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 710 ms. Remains : 548/792 places, 1428/1668 transitions.
[2023-03-15 00:35:32] [INFO ] Flatten gal took : 40 ms
[2023-03-15 00:35:32] [INFO ] Flatten gal took : 43 ms
[2023-03-15 00:35:32] [INFO ] Input system was already deterministic with 1428 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Applied a total of 4 rules in 10 ms. Remains 788 /792 variables (removed 4) and now considering 1668/1668 (removed 0) transitions.
[2023-03-15 00:35:32] [INFO ] Flow matrix only has 1636 transitions (discarded 32 similar events)
// Phase 1: matrix 1636 rows 788 cols
[2023-03-15 00:35:32] [INFO ] Computed 54 place invariants in 26 ms
[2023-03-15 00:35:32] [INFO ] Dead Transitions using invariants and state equation in 646 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 657 ms. Remains : 788/792 places, 1668/1668 transitions.
[2023-03-15 00:35:32] [INFO ] Flatten gal took : 46 ms
[2023-03-15 00:35:33] [INFO ] Flatten gal took : 49 ms
[2023-03-15 00:35:33] [INFO ] Input system was already deterministic with 1668 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 31 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:33] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
// Phase 1: matrix 1620 rows 772 cols
[2023-03-15 00:35:33] [INFO ] Computed 54 place invariants in 32 ms
[2023-03-15 00:35:33] [INFO ] Dead Transitions using invariants and state equation in 629 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 662 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:33] [INFO ] Flatten gal took : 46 ms
[2023-03-15 00:35:33] [INFO ] Flatten gal took : 48 ms
[2023-03-15 00:35:33] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 28 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:34] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
[2023-03-15 00:35:34] [INFO ] Invariant cache hit.
[2023-03-15 00:35:34] [INFO ] Dead Transitions using invariants and state equation in 629 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 658 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:34] [INFO ] Flatten gal took : 46 ms
[2023-03-15 00:35:34] [INFO ] Flatten gal took : 52 ms
[2023-03-15 00:35:34] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Drop transitions removed 64 transitions
Trivial Post-agglo rules discarded 64 transitions
Performed 64 trivial Post agglomeration. Transition count delta: 64
Iterating post reduction 0 with 64 rules applied. Total rules applied 64 place count 788 transition count 1604
Reduce places removed 64 places and 0 transitions.
Iterating post reduction 1 with 64 rules applied. Total rules applied 128 place count 724 transition count 1604
Performed 96 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 96 Pre rules applied. Total rules applied 128 place count 724 transition count 1508
Deduced a syphon composed of 96 places in 0 ms
Reduce places removed 96 places and 0 transitions.
Iterating global reduction 2 with 192 rules applied. Total rules applied 320 place count 628 transition count 1508
Performed 72 Post agglomeration using F-continuation condition.Transition count delta: 72
Deduced a syphon composed of 72 places in 1 ms
Reduce places removed 72 places and 0 transitions.
Iterating global reduction 2 with 144 rules applied. Total rules applied 464 place count 556 transition count 1436
Applied a total of 464 rules in 72 ms. Remains 556 /792 variables (removed 236) and now considering 1436/1668 (removed 232) transitions.
[2023-03-15 00:35:34] [INFO ] Flow matrix only has 1404 transitions (discarded 32 similar events)
// Phase 1: matrix 1404 rows 556 cols
[2023-03-15 00:35:34] [INFO ] Computed 54 place invariants in 22 ms
[2023-03-15 00:35:35] [INFO ] Dead Transitions using invariants and state equation in 605 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 678 ms. Remains : 556/792 places, 1436/1668 transitions.
[2023-03-15 00:35:35] [INFO ] Flatten gal took : 42 ms
[2023-03-15 00:35:35] [INFO ] Flatten gal took : 46 ms
[2023-03-15 00:35:35] [INFO ] Input system was already deterministic with 1436 transitions.
Finished random walk after 60 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=30 )
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 51 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:35] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
// Phase 1: matrix 1620 rows 772 cols
[2023-03-15 00:35:35] [INFO ] Computed 54 place invariants in 35 ms
[2023-03-15 00:35:36] [INFO ] Dead Transitions using invariants and state equation in 713 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 765 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:36] [INFO ] Flatten gal took : 47 ms
[2023-03-15 00:35:36] [INFO ] Flatten gal took : 51 ms
[2023-03-15 00:35:36] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Ensure Unique test removed 4 places
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 788 transition count 1668
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 780 transition count 1660
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 780 transition count 1660
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 28 place count 772 transition count 1652
Iterating global reduction 1 with 8 rules applied. Total rules applied 36 place count 772 transition count 1652
Applied a total of 36 rules in 29 ms. Remains 772 /792 variables (removed 20) and now considering 1652/1668 (removed 16) transitions.
[2023-03-15 00:35:36] [INFO ] Flow matrix only has 1620 transitions (discarded 32 similar events)
[2023-03-15 00:35:36] [INFO ] Invariant cache hit.
[2023-03-15 00:35:37] [INFO ] Dead Transitions using invariants and state equation in 676 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 706 ms. Remains : 772/792 places, 1652/1668 transitions.
[2023-03-15 00:35:37] [INFO ] Flatten gal took : 48 ms
[2023-03-15 00:35:37] [INFO ] Flatten gal took : 50 ms
[2023-03-15 00:35:37] [INFO ] Input system was already deterministic with 1652 transitions.
Starting structural reductions in LTL mode, iteration 0 : 792/792 places, 1668/1668 transitions.
Applied a total of 0 rules in 7 ms. Remains 792 /792 variables (removed 0) and now considering 1668/1668 (removed 0) transitions.
[2023-03-15 00:35:37] [INFO ] Flow matrix only has 1636 transitions (discarded 32 similar events)
// Phase 1: matrix 1636 rows 792 cols
[2023-03-15 00:35:37] [INFO ] Computed 58 place invariants in 32 ms
[2023-03-15 00:35:38] [INFO ] Dead Transitions using invariants and state equation in 700 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 713 ms. Remains : 792/792 places, 1668/1668 transitions.
[2023-03-15 00:35:38] [INFO ] Flatten gal took : 49 ms
[2023-03-15 00:35:38] [INFO ] Flatten gal took : 54 ms
[2023-03-15 00:35:38] [INFO ] Input system was already deterministic with 1668 transitions.
[2023-03-15 00:35:38] [INFO ] Flatten gal took : 73 ms
[2023-03-15 00:35:38] [INFO ] Flatten gal took : 70 ms
[2023-03-15 00:35:39] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLFireability.sr.xml took 25 ms.
[2023-03-15 00:35:39] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 792 places, 1668 transitions and 7464 arcs took 8 ms.
Total runtime 23615 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PolyORBLF-COL-S04J06T08
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA PolyORBLF-COL-S04J06T08-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678840875676
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:734
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 19 (type EXCL) for 18 PolyORBLF-COL-S04J06T08-CTLFireability-08
lola: time limit : 177 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 70 (type FNDP) for 28 PolyORBLF-COL-S04J06T08-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 71 (type EQUN) for 28 PolyORBLF-COL-S04J06T08-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 76 (type SRCH) for 28 PolyORBLF-COL-S04J06T08-CTLFireability-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 19 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-08
lola: result : false
lola: markings : 1039
lola: fired transitions : 5103
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: LAUNCH task # 10 (type EXCL) for 9 PolyORBLF-COL-S04J06T08-CTLFireability-03
lola: time limit : 187 sec
lola: memory limit: 32 pages
lola: FINISHED task # 70 (type FNDP) for PolyORBLF-COL-S04J06T08-CTLFireability-10
lola: result : true
lola: fired transitions : 60
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 10 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-03
lola: result : true
lola: markings : 142
lola: fired transitions : 145
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 71 (type EQUN) for PolyORBLF-COL-S04J06T08-CTLFireability-10 (obsolete)
lola: CANCELED task # 76 (type SRCH) for PolyORBLF-COL-S04J06T08-CTLFireability-10 (obsolete)
lola: LAUNCH task # 7 (type EXCL) for 6 PolyORBLF-COL-S04J06T08-CTLFireability-02
lola: time limit : 273 sec
lola: memory limit: 32 pages
sara: try reading problem file /home/mcc/execution/373/CTLFireability-71.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 4/323 2/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 157977 m, 31595 m/sec, 586633 t fired, .
Time elapsed: 45 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 9/323 5/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 382748 m, 44954 m/sec, 1405151 t fired, .
Time elapsed: 50 secs. Pages in use: 5
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 14/323 8/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 604189 m, 44288 m/sec, 2217236 t fired, .
Time elapsed: 55 secs. Pages in use: 8
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 19/323 11/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 811045 m, 41371 m/sec, 3042015 t fired, .
Time elapsed: 60 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 24/323 13/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 1025901 m, 42971 m/sec, 3859810 t fired, .
Time elapsed: 65 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 29/323 16/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 1240649 m, 42949 m/sec, 4677589 t fired, .
Time elapsed: 70 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 34/323 18/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 1449512 m, 41772 m/sec, 5494119 t fired, .
Time elapsed: 75 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 39/323 21/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 1663544 m, 42806 m/sec, 6303078 t fired, .
Time elapsed: 80 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 44/323 23/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 1866866 m, 40664 m/sec, 7130404 t fired, .
Time elapsed: 85 secs. Pages in use: 23
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 49/323 25/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 2079593 m, 42545 m/sec, 7953754 t fired, .
Time elapsed: 90 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 54/323 28/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 2287351 m, 41551 m/sec, 8784351 t fired, .
Time elapsed: 95 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 59/323 30/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 2507457 m, 44021 m/sec, 9609926 t fired, .
Time elapsed: 100 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 64/323 32/32 PolyORBLF-COL-S04J06T08-CTLFireability-02 2713943 m, 41297 m/sec, 10441101 t fired, .
Time elapsed: 105 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 7 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 110 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 66 (type EXCL) for 65 PolyORBLF-COL-S04J06T08-CTLFireability-15
lola: time limit : 349 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 CTL EXCL 5/349 6/32 PolyORBLF-COL-S04J06T08-CTLFireability-15 489569 m, 97913 m/sec, 1015278 t fired, .
Time elapsed: 115 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 CTL EXCL 10/349 12/32 PolyORBLF-COL-S04J06T08-CTLFireability-15 974169 m, 96920 m/sec, 2015309 t fired, .
Time elapsed: 120 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 CTL EXCL 15/349 17/32 PolyORBLF-COL-S04J06T08-CTLFireability-15 1445091 m, 94184 m/sec, 3005569 t fired, .
Time elapsed: 125 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 CTL EXCL 20/349 23/32 PolyORBLF-COL-S04J06T08-CTLFireability-15 1923464 m, 95674 m/sec, 3993600 t fired, .
Time elapsed: 130 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
66 CTL EXCL 25/349 30/32 PolyORBLF-COL-S04J06T08-CTLFireability-15 2493013 m, 113909 m/sec, 4937193 t fired, .
Time elapsed: 135 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 66 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 140 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 63 (type EXCL) for 62 PolyORBLF-COL-S04J06T08-CTLFireability-14
lola: time limit : 384 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 5/384 5/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 352877 m, 70575 m/sec, 1078790 t fired, .
Time elapsed: 145 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 10/384 9/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 694820 m, 68388 m/sec, 2150423 t fired, .
Time elapsed: 150 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 15/384 13/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 1040249 m, 69085 m/sec, 3210115 t fired, .
Time elapsed: 155 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 20/384 17/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 1376848 m, 67319 m/sec, 4247689 t fired, .
Time elapsed: 160 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 25/384 21/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 1707139 m, 66058 m/sec, 5288327 t fired, .
Time elapsed: 165 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 30/384 25/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 2068346 m, 72241 m/sec, 6307213 t fired, .
Time elapsed: 170 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
63 CTL EXCL 35/384 29/32 PolyORBLF-COL-S04J06T08-CTLFireability-14 2442110 m, 74752 m/sec, 7335215 t fired, .
Time elapsed: 175 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 63 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ 0 2 0 0 2 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ 0 1 0 0 9 0 0 24
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 180 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 60 (type EXCL) for 59 PolyORBLF-COL-S04J06T08-CTLFireability-13
lola: time limit : 427 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-13
lola: result : true
lola: markings : 1396
lola: fired transitions : 2811
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 28 PolyORBLF-COL-S04J06T08-CTLFireability-10
lola: time limit : 488 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-10
lola: result : false
lola: markings : 1017
lola: fired transitions : 1017
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 21 PolyORBLF-COL-S04J06T08-CTLFireability-09
lola: time limit : 570 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-09
lola: result : false
lola: markings : 135
lola: fired transitions : 135
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 PolyORBLF-COL-S04J06T08-CTLFireability-04
lola: time limit : 855 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 5/855 4/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 358465 m, 71693 m/sec, 843089 t fired, .
Time elapsed: 185 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 10/855 8/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 697295 m, 67766 m/sec, 1674044 t fired, .
Time elapsed: 190 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 15/855 11/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 1020262 m, 64593 m/sec, 2488920 t fired, .
Time elapsed: 195 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 20/855 14/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 1333032 m, 62554 m/sec, 3284586 t fired, .
Time elapsed: 200 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 25/855 17/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 1640319 m, 61457 m/sec, 4076986 t fired, .
Time elapsed: 205 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 30/855 19/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 1940618 m, 60059 m/sec, 4863800 t fired, .
Time elapsed: 210 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 35/855 22/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 2244241 m, 60724 m/sec, 5654855 t fired, .
Time elapsed: 215 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 40/855 25/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 2550114 m, 61174 m/sec, 6458241 t fired, .
Time elapsed: 220 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 45/855 28/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 2855748 m, 61126 m/sec, 7260275 t fired, .
Time elapsed: 225 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 50/855 31/32 PolyORBLF-COL-S04J06T08-CTLFireability-04 3166906 m, 62231 m/sec, 8064641 t fired, .
Time elapsed: 230 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 13 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 235 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 4 (type EXCL) for 3 PolyORBLF-COL-S04J06T08-CTLFireability-01
lola: time limit : 1121 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/1121 3/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 331870 m, 66374 m/sec, 1059504 t fired, .
Time elapsed: 240 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/1121 6/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 691738 m, 71973 m/sec, 2126758 t fired, .
Time elapsed: 245 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/1121 9/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 1004548 m, 62562 m/sec, 3196052 t fired, .
Time elapsed: 250 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/1121 12/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 1355916 m, 70273 m/sec, 4266413 t fired, .
Time elapsed: 255 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 25/1121 15/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 1698499 m, 68516 m/sec, 5333775 t fired, .
Time elapsed: 260 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 30/1121 18/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 2042338 m, 68767 m/sec, 6397976 t fired, .
Time elapsed: 265 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 35/1121 21/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 2380103 m, 67553 m/sec, 7457683 t fired, .
Time elapsed: 270 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 40/1121 23/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 2702920 m, 64563 m/sec, 8515181 t fired, .
Time elapsed: 275 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 45/1121 26/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 3019318 m, 63279 m/sec, 9567828 t fired, .
Time elapsed: 280 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 50/1121 29/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 3362837 m, 68703 m/sec, 10622998 t fired, .
Time elapsed: 285 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 55/1121 32/32 PolyORBLF-COL-S04J06T08-CTLFireability-01 3702009 m, 67834 m/sec, 11683437 t fired, .
Time elapsed: 290 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 4 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 295 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 1 (type EXCL) for 0 PolyORBLF-COL-S04J06T08-CTLFireability-00
lola: time limit : 1652 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 5/1652 5/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 367671 m, 73534 m/sec, 878479 t fired, .
Time elapsed: 300 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 10/1652 9/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 718587 m, 70183 m/sec, 1762563 t fired, .
Time elapsed: 305 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 15/1652 14/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 1071055 m, 70493 m/sec, 2637662 t fired, .
Time elapsed: 310 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 20/1652 18/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 1415508 m, 68890 m/sec, 3508989 t fired, .
Time elapsed: 315 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 25/1652 22/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 1756113 m, 68121 m/sec, 4377669 t fired, .
Time elapsed: 320 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 30/1652 26/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 2094163 m, 67610 m/sec, 5244293 t fired, .
Time elapsed: 325 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 1 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 35/1652 29/32 PolyORBLF-COL-S04J06T08-CTLFireability-00 2426720 m, 66511 m/sec, 6108870 t fired, .
Time elapsed: 330 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: CANCELED task # 1 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-00 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF 0 1 0 0 1 0 0 0
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
Time elapsed: 335 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 12
lola: LAUNCH task # 16 (type EXCL) for 15 PolyORBLF-COL-S04J06T08-CTLFireability-06
lola: time limit : 3265 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for PolyORBLF-COL-S04J06T08-CTLFireability-06
lola: result : true
lola: markings : 620
lola: fired transitions : 1846
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 12
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-COL-S04J06T08-CTLFireability-00: CTL unknown AGGR
PolyORBLF-COL-S04J06T08-CTLFireability-01: CTL unknown AGGR
PolyORBLF-COL-S04J06T08-CTLFireability-02: CTL unknown AGGR
PolyORBLF-COL-S04J06T08-CTLFireability-03: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-04: CTL unknown AGGR
PolyORBLF-COL-S04J06T08-CTLFireability-06: EGEF true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-08: CTL false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-09: CONJ false CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-10: DISJ false DISJ
PolyORBLF-COL-S04J06T08-CTLFireability-13: CTL true CTL model checker
PolyORBLF-COL-S04J06T08-CTLFireability-14: CTL unknown AGGR
PolyORBLF-COL-S04J06T08-CTLFireability-15: CTL unknown AGGR
Time elapsed: 335 secs. Pages in use: 32
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-COL-S04J06T08"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PolyORBLF-COL-S04J06T08, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873947900426"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-COL-S04J06T08.tgz
mv PolyORBLF-COL-S04J06T08 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;