Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873947300025.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PhaseVariation-PT-D05CS100, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873947300025
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.1M
-rw-r--r-- 1 mcc users 8.4K Feb 26 15:03 CTLCardinality.txt
-rw-r--r-- 1 mcc users 77K Feb 26 15:03 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.5K Feb 26 15:03 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 26 15:03 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:32 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:32 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.5K Feb 25 16:32 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:32 LTLFireability.xml
-rw-r--r-- 1 mcc users 12K Feb 26 15:05 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 100K Feb 26 15:05 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 15K Feb 26 15:04 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 82K Feb 26 15:04 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:32 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:32 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 633K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-00
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-01
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-02
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-03
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-04
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-05
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-06
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-07
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-08
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-09
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-10
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-11
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-12
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-13
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-14
FORMULA_NAME PhaseVariation-PT-D05CS100-CTLCardinality-15

=== Now, execution of the tool begins

BK_START 1678776144014

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PhaseVariation-PT-D05CS100
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 06:42:25] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-14 06:42:25] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 06:42:25] [INFO ] Load time of PNML (sax parser for PT used): 90 ms
[2023-03-14 06:42:25] [INFO ] Transformed 77 places.
[2023-03-14 06:42:25] [INFO ] Transformed 677 transitions.
[2023-03-14 06:42:25] [INFO ] Parsed PT model containing 77 places and 677 transitions and 4685 arcs in 155 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 10 ms.
Support contains 65 out of 77 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 18 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:25] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
// Phase 1: matrix 51 rows 77 cols
[2023-03-14 06:42:25] [INFO ] Computed 26 place invariants in 13 ms
[2023-03-14 06:42:26] [INFO ] Dead Transitions using invariants and state equation in 601 ms found 0 transitions.
[2023-03-14 06:42:26] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:26] [INFO ] Invariant cache hit.
[2023-03-14 06:42:26] [INFO ] Implicit Places using invariants in 64 ms returned []
[2023-03-14 06:42:26] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:26] [INFO ] Invariant cache hit.
[2023-03-14 06:42:26] [INFO ] State equation strengthened by 33 read => feed constraints.
[2023-03-14 06:42:26] [INFO ] Implicit Places using invariants and state equation in 75 ms returned []
Implicit Place search using SMT with State Equation took 141 ms to find 0 implicit places.
[2023-03-14 06:42:26] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:26] [INFO ] Invariant cache hit.
[2023-03-14 06:42:26] [INFO ] Dead Transitions using invariants and state equation in 224 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1015 ms. Remains : 77/77 places, 677/677 transitions.
Support contains 65 out of 77 places after structural reductions.
[2023-03-14 06:42:26] [INFO ] Flatten gal took : 80 ms
[2023-03-14 06:42:26] [INFO ] Flatten gal took : 43 ms
[2023-03-14 06:42:27] [INFO ] Input system was already deterministic with 677 transitions.
Incomplete random walk after 10000 steps, including 71 resets, run finished after 204 ms. (steps per millisecond=49 ) properties (out of 81) seen :74
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 22 ms. (steps per millisecond=454 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 20 ms. (steps per millisecond=500 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 21 ms. (steps per millisecond=476 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 16 ms. (steps per millisecond=625 ) properties (out of 7) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 15 ms. (steps per millisecond=666 ) properties (out of 7) seen :0
Running SMT prover for 7 properties.
[2023-03-14 06:42:27] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:27] [INFO ] Invariant cache hit.
[2023-03-14 06:42:27] [INFO ] [Real]Absence check using 26 positive place invariants in 3 ms returned sat
[2023-03-14 06:42:27] [INFO ] After 65ms SMT Verify possible using all constraints in real domain returned unsat :2 sat :0 real:5
[2023-03-14 06:42:27] [INFO ] [Nat]Absence check using 26 positive place invariants in 4 ms returned sat
[2023-03-14 06:42:27] [INFO ] After 56ms SMT Verify possible using all constraints in natural domain returned unsat :7 sat :0
Fused 7 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 7 atomic propositions for a total of 16 simplifications.
[2023-03-14 06:42:27] [INFO ] Flatten gal took : 39 ms
[2023-03-14 06:42:27] [INFO ] Flatten gal took : 36 ms
[2023-03-14 06:42:27] [INFO ] Input system was already deterministic with 677 transitions.
Computed a total of 77 stabilizing places and 677 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 77 transition count 677
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-13 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 7 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:27] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:27] [INFO ] Invariant cache hit.
[2023-03-14 06:42:27] [INFO ] Dead Transitions using invariants and state equation in 216 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 225 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:27] [INFO ] Flatten gal took : 26 ms
[2023-03-14 06:42:28] [INFO ] Flatten gal took : 26 ms
[2023-03-14 06:42:28] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 96 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:28] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:28] [INFO ] Invariant cache hit.
[2023-03-14 06:42:28] [INFO ] Dead Transitions using invariants and state equation in 221 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 319 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:28] [INFO ] Flatten gal took : 22 ms
[2023-03-14 06:42:28] [INFO ] Flatten gal took : 23 ms
[2023-03-14 06:42:28] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 8 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:28] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:28] [INFO ] Invariant cache hit.
[2023-03-14 06:42:28] [INFO ] Dead Transitions using invariants and state equation in 200 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 209 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:28] [INFO ] Flatten gal took : 21 ms
[2023-03-14 06:42:28] [INFO ] Flatten gal took : 21 ms
[2023-03-14 06:42:28] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 5 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:28] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:28] [INFO ] Invariant cache hit.
[2023-03-14 06:42:28] [INFO ] Dead Transitions using invariants and state equation in 207 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 214 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 19 ms
[2023-03-14 06:42:29] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 4 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:29] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:29] [INFO ] Invariant cache hit.
[2023-03-14 06:42:29] [INFO ] Dead Transitions using invariants and state equation in 204 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 210 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 19 ms
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 21 ms
[2023-03-14 06:42:29] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 4 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:29] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:29] [INFO ] Invariant cache hit.
[2023-03-14 06:42:29] [INFO ] Dead Transitions using invariants and state equation in 208 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 213 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 17 ms
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 19 ms
[2023-03-14 06:42:29] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 4 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:29] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:29] [INFO ] Invariant cache hit.
[2023-03-14 06:42:29] [INFO ] Dead Transitions using invariants and state equation in 211 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 217 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 17 ms
[2023-03-14 06:42:29] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:29] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 50 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:30] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:30] [INFO ] Invariant cache hit.
[2023-03-14 06:42:30] [INFO ] Dead Transitions using invariants and state equation in 199 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 250 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:30] [INFO ] Flatten gal took : 16 ms
[2023-03-14 06:42:30] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:30] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 2 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:30] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:30] [INFO ] Invariant cache hit.
[2023-03-14 06:42:30] [INFO ] Dead Transitions using invariants and state equation in 189 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 192 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:30] [INFO ] Flatten gal took : 21 ms
[2023-03-14 06:42:30] [INFO ] Flatten gal took : 20 ms
[2023-03-14 06:42:30] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 44 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:30] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:30] [INFO ] Invariant cache hit.
[2023-03-14 06:42:30] [INFO ] Dead Transitions using invariants and state equation in 204 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 249 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:30] [INFO ] Flatten gal took : 16 ms
[2023-03-14 06:42:30] [INFO ] Flatten gal took : 22 ms
[2023-03-14 06:42:30] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 42 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:30] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:30] [INFO ] Invariant cache hit.
[2023-03-14 06:42:31] [INFO ] Dead Transitions using invariants and state equation in 194 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 243 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:31] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:31] [INFO ] Flatten gal took : 32 ms
[2023-03-14 06:42:31] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 40 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:31] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:31] [INFO ] Invariant cache hit.
[2023-03-14 06:42:31] [INFO ] Dead Transitions using invariants and state equation in 203 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 244 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:31] [INFO ] Flatten gal took : 16 ms
[2023-03-14 06:42:31] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:31] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 2 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:31] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:31] [INFO ] Invariant cache hit.
[2023-03-14 06:42:31] [INFO ] Dead Transitions using invariants and state equation in 203 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 207 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:31] [INFO ] Flatten gal took : 16 ms
[2023-03-14 06:42:31] [INFO ] Flatten gal took : 17 ms
[2023-03-14 06:42:31] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 2 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:31] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:31] [INFO ] Invariant cache hit.
[2023-03-14 06:42:32] [INFO ] Dead Transitions using invariants and state equation in 204 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 232 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:32] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:32] [INFO ] Flatten gal took : 17 ms
[2023-03-14 06:42:32] [INFO ] Input system was already deterministic with 677 transitions.
Starting structural reductions in LTL mode, iteration 0 : 77/77 places, 677/677 transitions.
Applied a total of 0 rules in 2 ms. Remains 77 /77 variables (removed 0) and now considering 677/677 (removed 0) transitions.
[2023-03-14 06:42:32] [INFO ] Flow matrix only has 51 transitions (discarded 626 similar events)
[2023-03-14 06:42:32] [INFO ] Invariant cache hit.
[2023-03-14 06:42:32] [INFO ] Dead Transitions using invariants and state equation in 204 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 206 ms. Remains : 77/77 places, 677/677 transitions.
[2023-03-14 06:42:32] [INFO ] Flatten gal took : 16 ms
[2023-03-14 06:42:32] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:32] [INFO ] Input system was already deterministic with 677 transitions.
[2023-03-14 06:42:32] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:32] [INFO ] Flatten gal took : 18 ms
[2023-03-14 06:42:32] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 2 ms.
[2023-03-14 06:42:32] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 77 places, 677 transitions and 4685 arcs took 4 ms.
Total runtime 7048 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PhaseVariation-PT-D05CS100
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/376

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D05CS100-CTLCardinality-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678776468873

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/376/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/376/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/376/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 43 (type EXCL) for 42 PhaseVariation-PT-D05CS100-CTLCardinality-15
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for PhaseVariation-PT-D05CS100-CTLCardinality-15
lola: result : false
lola: markings : 168
lola: fired transitions : 962
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: LAUNCH task # 4 (type EXCL) for 3 PhaseVariation-PT-D05CS100-CTLCardinality-01
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for PhaseVariation-PT-D05CS100-CTLCardinality-01
lola: result : true
lola: markings : 101
lola: fired transitions : 125
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 PhaseVariation-PT-D05CS100-CTLCardinality-10
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: FINISHED task # 31 (type EXCL) for PhaseVariation-PT-D05CS100-CTLCardinality-10
lola: result : true
lola: markings : 101
lola: fired transitions : 103
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: LAUNCH task # 40 (type EXCL) for 39 PhaseVariation-PT-D05CS100-CTLCardinality-14
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 40 (type EXCL) for PhaseVariation-PT-D05CS100-CTLCardinality-14
lola: result : false
lola: markings : 1968
lola: fired transitions : 2260
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 PhaseVariation-PT-D05CS100-CTLCardinality-06
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:815
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 5/327 2/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 379865 m, 75973 m/sec, 7227823 t fired, .

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PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 10/327 4/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 734941 m, 71015 m/sec, 14638672 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 15/327 6/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 1074961 m, 68004 m/sec, 22196897 t fired, .

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PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 20/327 7/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 1431481 m, 71304 m/sec, 29667519 t fired, .

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PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 1 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 25/327 9/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 1754519 m, 64607 m/sec, 37202375 t fired, .

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PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
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19 CTL EXCL 30/327 10/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 2070745 m, 63245 m/sec, 44710013 t fired, .

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19 CTL EXCL 35/327 12/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 2410565 m, 67964 m/sec, 52064843 t fired, .

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19 CTL EXCL 40/327 14/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 2740489 m, 65984 m/sec, 59561805 t fired, .

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19 CTL EXCL 45/327 15/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 3046601 m, 61222 m/sec, 67002517 t fired, .

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19 CTL EXCL 50/327 16/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 3350295 m, 60738 m/sec, 74531103 t fired, .

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19 CTL EXCL 55/327 18/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 3669805 m, 63902 m/sec, 81931235 t fired, .

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19 CTL EXCL 60/327 20/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 4008565 m, 67752 m/sec, 89220295 t fired, .

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19 CTL EXCL 65/327 21/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 4337711 m, 65829 m/sec, 96834975 t fired, .

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19 CTL EXCL 70/327 23/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 4650273 m, 62512 m/sec, 104401447 t fired, .

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19 CTL EXCL 75/327 24/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 4958415 m, 61628 m/sec, 111958911 t fired, .

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19 CTL EXCL 80/327 26/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 5249733 m, 58263 m/sec, 119564403 t fired, .

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19 CTL EXCL 85/327 27/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 5575195 m, 65092 m/sec, 127062290 t fired, .

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19 CTL EXCL 90/327 29/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 5902633 m, 65487 m/sec, 134356287 t fired, .

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19 CTL EXCL 100/327 32/32 PhaseVariation-PT-D05CS100-CTLCardinality-06 6587513 m, 65404 m/sec, 149078724 t fired, .

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10 CTL EXCL 5/582 2/32 PhaseVariation-PT-D05CS100-CTLCardinality-03 396749 m, 79349 m/sec, 7496937 t fired, .

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10 CTL EXCL 10/582 4/32 PhaseVariation-PT-D05CS100-CTLCardinality-03 752853 m, 71220 m/sec, 15045314 t fired, .

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10 CTL EXCL 60/582 20/32 PhaseVariation-PT-D05CS100-CTLCardinality-03 4050421 m, 69193 m/sec, 90145701 t fired, .

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10 CTL EXCL 100/582 32/32 PhaseVariation-PT-D05CS100-CTLCardinality-03 6625325 m, 65308 m/sec, 149993866 t fired, .

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28 CTL EXCL 20/1695 7/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 1450929 m, 71038 m/sec, 30152131 t fired, .

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28 CTL EXCL 25/1695 9/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 1775691 m, 64952 m/sec, 37685821 t fired, .

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28 CTL EXCL 30/1695 11/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 2093541 m, 63570 m/sec, 45235179 t fired, .

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28 CTL EXCL 35/1695 12/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 2437399 m, 68771 m/sec, 52593148 t fired, .

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28 CTL EXCL 40/1695 14/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 2760751 m, 64670 m/sec, 60055861 t fired, .

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28 CTL EXCL 45/1695 15/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 3065867 m, 61023 m/sec, 67463358 t fired, .

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28 CTL EXCL 50/1695 17/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 3368389 m, 60504 m/sec, 74971606 t fired, .

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28 CTL EXCL 55/1695 18/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 3685431 m, 63408 m/sec, 82313464 t fired, .

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28 CTL EXCL 60/1695 20/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 4024793 m, 67872 m/sec, 89574705 t fired, .

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28 CTL EXCL 65/1695 21/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 4346829 m, 64407 m/sec, 97084975 t fired, .

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28 CTL EXCL 70/1695 23/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 4655721 m, 61778 m/sec, 104551327 t fired, .

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28 CTL EXCL 75/1695 24/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 4960619 m, 60979 m/sec, 112014102 t fired, .

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28 CTL EXCL 80/1695 26/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 5249153 m, 57706 m/sec, 119549072 t fired, .

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28 CTL EXCL 85/1695 27/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 5571141 m, 64397 m/sec, 126958428 t fired, .

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PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 90/1695 29/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 5897667 m, 65305 m/sec, 134259471 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

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PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 95/1695 30/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 6257759 m, 72018 m/sec, 141644430 t fired, .

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PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
28 CTL EXCL 100/1695 32/32 PhaseVariation-PT-D05CS100-CTLCardinality-09 6584957 m, 65439 m/sec, 149015010 t fired, .

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FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL 0 0 0 0 1 0 1 0
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL 0 0 0 0 1 0 1 0

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lola: result : false
lola: markings : 402
lola: fired transitions : 2239
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D05CS100-CTLCardinality-00: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-01: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-02: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-03: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLCardinality-04: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-05: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-06: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLCardinality-07: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-08: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-09: CTL unknown AGGR
PhaseVariation-PT-D05CS100-CTLCardinality-10: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-11: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-12: CTL true CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-14: CTL false CTL model checker
PhaseVariation-PT-D05CS100-CTLCardinality-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhaseVariation-PT-D05CS100"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PhaseVariation-PT-D05CS100, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873947300025"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PhaseVariation-PT-D05CS100.tgz
mv PhaseVariation-PT-D05CS100 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLCardinality.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;