Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r295-tall-167873947300002.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is PhaseVariation-PT-D02CS010, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r295-tall-167873947300002
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 584K
-rw-r--r-- 1 mcc users 7.3K Feb 26 15:00 CTLCardinality.txt
-rw-r--r-- 1 mcc users 65K Feb 26 15:00 CTLCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 14:59 CTLFireability.txt
-rw-r--r-- 1 mcc users 72K Feb 26 14:59 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 24K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 17K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 14K Feb 26 15:01 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 120K Feb 26 15:01 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 18K Feb 26 15:00 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 103K Feb 26 15:00 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 9 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 73K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-00
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-01
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-02
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-03
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-04
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-05
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-06
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-07
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-08
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-09
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-10
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-11
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-12
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-13
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-14
FORMULA_NAME PhaseVariation-PT-D02CS010-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678776007762

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PhaseVariation-PT-D02CS010
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 06:40:11] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 06:40:11] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 06:40:11] [INFO ] Load time of PNML (sax parser for PT used): 41 ms
[2023-03-14 06:40:11] [INFO ] Transformed 14 places.
[2023-03-14 06:40:11] [INFO ] Transformed 65 transitions.
[2023-03-14 06:40:11] [INFO ] Parsed PT model containing 14 places and 65 transitions and 443 arcs in 113 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Support contains 14 out of 14 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 11 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:11] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
// Phase 1: matrix 9 rows 14 cols
[2023-03-14 06:40:11] [INFO ] Computed 5 place invariants in 5 ms
[2023-03-14 06:40:11] [INFO ] Dead Transitions using invariants and state equation in 196 ms found 0 transitions.
[2023-03-14 06:40:11] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:11] [INFO ] Invariant cache hit.
[2023-03-14 06:40:11] [INFO ] Implicit Places using invariants in 29 ms returned []
[2023-03-14 06:40:11] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:11] [INFO ] Invariant cache hit.
[2023-03-14 06:40:11] [INFO ] State equation strengthened by 1 read => feed constraints.
[2023-03-14 06:40:11] [INFO ] Implicit Places using invariants and state equation in 49 ms returned []
Implicit Place search using SMT with State Equation took 83 ms to find 0 implicit places.
[2023-03-14 06:40:11] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:11] [INFO ] Invariant cache hit.
[2023-03-14 06:40:12] [INFO ] Dead Transitions using invariants and state equation in 400 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 718 ms. Remains : 14/14 places, 65/65 transitions.
Support contains 14 out of 14 places after structural reductions.
[2023-03-14 06:40:12] [INFO ] Flatten gal took : 33 ms
[2023-03-14 06:40:12] [INFO ] Flatten gal took : 20 ms
[2023-03-14 06:40:12] [INFO ] Input system was already deterministic with 65 transitions.
Incomplete random walk after 10000 steps, including 597 resets, run finished after 256 ms. (steps per millisecond=39 ) properties (out of 55) seen :54
Finished Best-First random walk after 18 steps, including 0 resets, run visited all 1 properties in 1 ms. (steps per millisecond=18 )
[2023-03-14 06:40:12] [INFO ] Flatten gal took : 7 ms
[2023-03-14 06:40:12] [INFO ] Flatten gal took : 8 ms
[2023-03-14 06:40:12] [INFO ] Input system was already deterministic with 65 transitions.
Computed a total of 14 stabilizing places and 65 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 14 transition count 65
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:12] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:12] [INFO ] Invariant cache hit.
[2023-03-14 06:40:12] [INFO ] Dead Transitions using invariants and state equation in 109 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 111 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:12] [INFO ] Flatten gal took : 14 ms
[2023-03-14 06:40:12] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:12] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 14 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:12] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:12] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 146 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 175 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 7 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 46 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 7 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 5 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 64 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 66 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 40 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 53 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 55 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 8 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 38 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 40 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 47 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 49 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 5 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 43 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 35 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 36 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 0 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 41 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 42 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 42 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 44 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 4 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:13] [INFO ] Dead Transitions using invariants and state equation in 43 ms found 0 transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 48 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 3 ms
[2023-03-14 06:40:13] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:13] [INFO ] Input system was already deterministic with 65 transitions.
Starting structural reductions in LTL mode, iteration 0 : 14/14 places, 65/65 transitions.
Applied a total of 0 rules in 1 ms. Remains 14 /14 variables (removed 0) and now considering 65/65 (removed 0) transitions.
[2023-03-14 06:40:13] [INFO ] Flow matrix only has 9 transitions (discarded 56 similar events)
[2023-03-14 06:40:13] [INFO ] Invariant cache hit.
[2023-03-14 06:40:14] [INFO ] Dead Transitions using invariants and state equation in 37 ms found 0 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 40 ms. Remains : 14/14 places, 65/65 transitions.
[2023-03-14 06:40:14] [INFO ] Flatten gal took : 2 ms
[2023-03-14 06:40:14] [INFO ] Flatten gal took : 2 ms
[2023-03-14 06:40:14] [INFO ] Input system was already deterministic with 65 transitions.
[2023-03-14 06:40:14] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:14] [INFO ] Flatten gal took : 4 ms
[2023-03-14 06:40:14] [INFO ] Export to MCC of 16 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-14 06:40:14] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 14 places, 65 transitions and 443 arcs took 0 ms.
Total runtime 2874 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT PhaseVariation-PT-D02CS010
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/373
CTLFireability

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PhaseVariation-PT-D02CS010-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678776016157

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ sed s/.jar//
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/373/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/373/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/373/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 1 (type EXCL) for 0 PhaseVariation-PT-D02CS010-CTLFireability-00
lola: time limit : 120 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: FINISHED task # 1 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-00
lola: result : false
lola: markings : 5942
lola: fired transitions : 123228
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 52 (type EXCL) for 51 PhaseVariation-PT-D02CS010-CTLFireability-13
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 52 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-13
lola: result : false
lola: markings : 1415
lola: fired transitions : 16308
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 58 (type EXCL) for 57 PhaseVariation-PT-D02CS010-CTLFireability-15
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 58 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-15
lola: result : false
lola: markings : 4067
lola: fired transitions : 39321
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 49 (type EXCL) for 48 PhaseVariation-PT-D02CS010-CTLFireability-12
lola: time limit : 225 sec
lola: memory limit: 32 pages
lola: FINISHED task # 49 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-12
lola: result : true
lola: markings : 7716
lola: fired transitions : 168923
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 PhaseVariation-PT-D02CS010-CTLFireability-11
lola: time limit : 240 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-11
lola: result : true
lola: markings : 39
lola: fired transitions : 158
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 PhaseVariation-PT-D02CS010-CTLFireability-09
lola: time limit : 257 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-09
lola: result : false
lola: markings : 70
lola: fired transitions : 458
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 28 PhaseVariation-PT-D02CS010-CTLFireability-08
lola: time limit : 276 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-08
lola: result : true
lola: markings : 3
lola: fired transitions : 2
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 28 PhaseVariation-PT-D02CS010-CTLFireability-08
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-08
lola: result : true
lola: markings : 4396
lola: fired transitions : 61670
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 21 PhaseVariation-PT-D02CS010-CTLFireability-07
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-07
lola: result : true
lola: markings : 19
lola: fired transitions : 19
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 24 (type EXCL) for 21 PhaseVariation-PT-D02CS010-CTLFireability-07
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 24 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-07
lola: result : true
lola: markings : 52
lola: fired transitions : 79
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 PhaseVariation-PT-D02CS010-CTLFireability-06
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-06
lola: result : true
lola: markings : 51
lola: fired transitions : 339
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 PhaseVariation-PT-D02CS010-CTLFireability-05
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-05
lola: result : true
lola: markings : 12
lola: fired transitions : 23
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 PhaseVariation-PT-D02CS010-CTLFireability-04
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-04
lola: result : false
lola: markings : 1806
lola: fired transitions : 31692
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 PhaseVariation-PT-D02CS010-CTLFireability-03
lola: time limit : 719 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-03
lola: result : false
lola: markings : 13
lola: fired transitions : 49
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 PhaseVariation-PT-D02CS010-CTLFireability-02
lola: time limit : 899 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-02
lola: result : true
lola: markings : 14
lola: fired transitions : 15
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 60 (type EXCL) for 54 PhaseVariation-PT-D02CS010-CTLFireability-14
lola: time limit : 1199 sec
lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-14
lola: result : true
lola: markings : 13
lola: fired transitions : 12
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 PhaseVariation-PT-D02CS010-CTLFireability-10
lola: time limit : 1799 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-10
lola: result : false
lola: markings : 7716
lola: fired transitions : 267384
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 PhaseVariation-PT-D02CS010-CTLFireability-01
lola: time limit : 3599 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for PhaseVariation-PT-D02CS010-CTLFireability-01
lola: result : true
lola: markings : 6553
lola: fired transitions : 93540
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PhaseVariation-PT-D02CS010-CTLFireability-00: CTL false CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-01: CTL true CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-02: CTL true CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-03: CTL false CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-04: CTL false CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-05: CTL true CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-06: CTL true CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-07: CONJ true CONJ
PhaseVariation-PT-D02CS010-CTLFireability-08: CONJ true CONJ
PhaseVariation-PT-D02CS010-CTLFireability-09: CTL false CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-10: CTL false CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-11: CTL true CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-12: CTL true CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-13: CTL false CTL model checker
PhaseVariation-PT-D02CS010-CTLFireability-14: F false state space / EG
PhaseVariation-PT-D02CS010-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PhaseVariation-PT-D02CS010"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is PhaseVariation-PT-D02CS010, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r295-tall-167873947300002"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PhaseVariation-PT-D02CS010.tgz
mv PhaseVariation-PT-D02CS010 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;