fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r294-tall-167873946800578
Last Updated
May 14, 2023

About the Execution of LoLA for PolyORBLF-PT-S04J06T10

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
5802.140 1045671.00 1447427.00 2434.60 F?????T?TFTF?T?? normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r294-tall-167873946800578.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is PolyORBLF-PT-S04J06T10, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r294-tall-167873946800578
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 5.9M
-rw-r--r-- 1 mcc users 26K Feb 26 14:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 146K Feb 26 14:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 26K Feb 26 14:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 148K Feb 26 14:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.3K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 9.6K Feb 25 16:35 LTLCardinality.txt
-rw-r--r-- 1 mcc users 40K Feb 25 16:35 LTLCardinality.xml
-rw-r--r-- 1 mcc users 144K Feb 25 16:35 LTLFireability.txt
-rw-r--r-- 1 mcc users 480K Feb 25 16:35 LTLFireability.xml
-rw-r--r-- 1 mcc users 47K Feb 26 14:22 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 248K Feb 26 14:22 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 38K Feb 26 14:19 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 195K Feb 26 14:19 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 4.0K Feb 25 16:35 UpperBounds.txt
-rw-r--r-- 1 mcc users 8.6K Feb 25 16:35 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 10 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 4.3M Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-00
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-01
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-02
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-03
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-04
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-05
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-06
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-07
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-08
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-09
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-10
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-11
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-12
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-13
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-14
FORMULA_NAME PolyORBLF-PT-S04J06T10-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678911804169

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=PolyORBLF-PT-S04J06T10
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT PolyORBLF-PT-S04J06T10
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
spx_run: Lost feasibility 10 times - iter 15354 and 371 nodes.

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA PolyORBLF-PT-S04J06T10-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678912849840

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:445
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:132
lola: rewrite Frontend/Parser/formula_rewrite.k:117
lola: rewrite Frontend/Parser/formula_rewrite.k:179
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:460
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 2.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 40 (type EXCL) for 39 PolyORBLF-PT-S04J06T10-CTLFireability-13
lola: time limit : 148 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: FINISHED task # 40 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-13
lola: result : true
lola: markings : 498
lola: fired transitions : 498
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 31 (type EXCL) for 30 PolyORBLF-PT-S04J06T10-CTLFireability-10
lola: time limit : 164 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 31 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-10
lola: result : true
lola: markings : 498
lola: fired transitions : 498
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 PolyORBLF-PT-S04J06T10-CTLFireability-04
lola: time limit : 185 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 49 (type FNDP) for 33 PolyORBLF-PT-S04J06T10-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 33 PolyORBLF-PT-S04J06T10-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 33 PolyORBLF-PT-S04J06T10-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 49 (type FNDP) for PolyORBLF-PT-S04J06T10-CTLFireability-11
lola: result : true
lola: fired transitions : 63
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 50 (type EQUN) for PolyORBLF-PT-S04J06T10-CTLFireability-11 (obsolete)
lola: CANCELED task # 52 (type SRCH) for PolyORBLF-PT-S04J06T10-CTLFireability-11 (obsolete)
sara: try reading problem file /home/mcc/execution/CTLFireability-50.sara.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
sara: place or transition ordering is non-deterministic
lola: Created skeleton in 1.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 2/227 1/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 72370 m, 14474 m/sec, 216842 t fired, .

Time elapsed: 640 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 7/227 4/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 319255 m, 49377 m/sec, 959800 t fired, .

Time elapsed: 645 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 12/227 7/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 564770 m, 49103 m/sec, 1702432 t fired, .

Time elapsed: 650 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 17/227 10/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 809095 m, 48865 m/sec, 2443658 t fired, .

Time elapsed: 655 secs. Pages in use: 10
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 22/227 13/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 1052239 m, 48628 m/sec, 3182278 t fired, .

Time elapsed: 660 secs. Pages in use: 13
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 27/227 16/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 1293926 m, 48337 m/sec, 3918448 t fired, .

Time elapsed: 665 secs. Pages in use: 16
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 32/227 18/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 1534233 m, 48061 m/sec, 4650966 t fired, .

Time elapsed: 670 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 37/227 21/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 1772086 m, 47570 m/sec, 5377117 t fired, .

Time elapsed: 675 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 42/227 24/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 2009877 m, 47558 m/sec, 6103547 t fired, .

Time elapsed: 680 secs. Pages in use: 24
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 47/227 26/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 2245689 m, 47162 m/sec, 6825726 t fired, .

Time elapsed: 685 secs. Pages in use: 26
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 52/227 29/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 2482925 m, 47447 m/sec, 7549863 t fired, .

Time elapsed: 690 secs. Pages in use: 29
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
13 CTL EXCL 57/227 32/32 PolyORBLF-PT-S04J06T10-CTLFireability-04 2721854 m, 47785 m/sec, 8280936 t fired, .

Time elapsed: 695 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 13 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-04 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 700 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 46 (type EXCL) for 45 PolyORBLF-PT-S04J06T10-CTLFireability-15
lola: time limit : 241 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 5/241 7/32 PolyORBLF-PT-S04J06T10-CTLFireability-15 422531 m, 84506 m/sec, 484351 t fired, .

Time elapsed: 705 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 10/241 12/32 PolyORBLF-PT-S04J06T10-CTLFireability-15 832105 m, 81914 m/sec, 967047 t fired, .

Time elapsed: 710 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 15/241 18/32 PolyORBLF-PT-S04J06T10-CTLFireability-15 1226885 m, 78956 m/sec, 1442491 t fired, .

Time elapsed: 715 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 20/241 23/32 PolyORBLF-PT-S04J06T10-CTLFireability-15 1617997 m, 78222 m/sec, 1925310 t fired, .

Time elapsed: 720 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
46 CTL EXCL 25/241 28/32 PolyORBLF-PT-S04J06T10-CTLFireability-15 2003602 m, 77121 m/sec, 2404241 t fired, .

Time elapsed: 725 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 46 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-15 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 730 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 37 (type EXCL) for 36 PolyORBLF-PT-S04J06T10-CTLFireability-12
lola: time limit : 260 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 5/260 3/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 153083 m, 30616 m/sec, 628083 t fired, .

Time elapsed: 735 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 10/260 4/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 272042 m, 23791 m/sec, 1265547 t fired, .

Time elapsed: 740 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 15/260 6/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 401619 m, 25915 m/sec, 1904764 t fired, .

Time elapsed: 745 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 20/260 8/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 533378 m, 26351 m/sec, 2543875 t fired, .

Time elapsed: 750 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 25/260 10/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 666131 m, 26550 m/sec, 3176760 t fired, .

Time elapsed: 755 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 30/260 12/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 795428 m, 25859 m/sec, 3813102 t fired, .

Time elapsed: 760 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 35/260 14/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 928838 m, 26682 m/sec, 4444172 t fired, .

Time elapsed: 765 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 40/260 16/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1059542 m, 26140 m/sec, 5077049 t fired, .

Time elapsed: 770 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 45/260 17/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1193619 m, 26815 m/sec, 5711983 t fired, .

Time elapsed: 775 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 50/260 19/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1326375 m, 26551 m/sec, 6349052 t fired, .

Time elapsed: 780 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 55/260 21/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1456959 m, 26116 m/sec, 6983971 t fired, .

Time elapsed: 785 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 60/260 23/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1588769 m, 26362 m/sec, 7613923 t fired, .

Time elapsed: 790 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 65/260 25/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1723407 m, 26927 m/sec, 8249486 t fired, .

Time elapsed: 795 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 70/260 27/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1855200 m, 26358 m/sec, 8876241 t fired, .

Time elapsed: 800 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 75/260 28/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 1986315 m, 26223 m/sec, 9511164 t fired, .

Time elapsed: 805 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 80/260 30/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 2118388 m, 26414 m/sec, 10143674 t fired, .

Time elapsed: 810 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
37 CTL EXCL 85/260 32/32 PolyORBLF-PT-S04J06T10-CTLFireability-12 2247983 m, 25919 m/sec, 10774020 t fired, .

Time elapsed: 815 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 37 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-12 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 820 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 28 (type EXCL) for 27 PolyORBLF-PT-S04J06T10-CTLFireability-09
lola: time limit : 278 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-09
lola: result : false
lola: markings : 800
lola: fired transitions : 1604
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 PolyORBLF-PT-S04J06T10-CTLFireability-08
lola: time limit : 308 sec
lola: memory limit: 32 pages
lola: FINISHED task # 25 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-08
lola: result : true
lola: markings : 4527
lola: fired transitions : 5616
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 PolyORBLF-PT-S04J06T10-CTLFireability-07
lola: time limit : 347 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 5/347 8/32 PolyORBLF-PT-S04J06T10-CTLFireability-07 371380 m, 74276 m/sec, 685628 t fired, .

Time elapsed: 825 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 10/347 15/32 PolyORBLF-PT-S04J06T10-CTLFireability-07 739025 m, 73529 m/sec, 1377528 t fired, .

Time elapsed: 830 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 15/347 22/32 PolyORBLF-PT-S04J06T10-CTLFireability-07 1092115 m, 70618 m/sec, 2074437 t fired, .

Time elapsed: 835 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 CTL EXCL 20/347 29/32 PolyORBLF-PT-S04J06T10-CTLFireability-07 1412519 m, 64080 m/sec, 2800247 t fired, .

Time elapsed: 840 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 22 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-07 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 845 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 19 (type EXCL) for 18 PolyORBLF-PT-S04J06T10-CTLFireability-06
lola: time limit : 393 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-06
lola: result : true
lola: markings : 57
lola: fired transitions : 56
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 PolyORBLF-PT-S04J06T10-CTLFireability-03
lola: time limit : 459 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 5/459 3/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 197319 m, 39463 m/sec, 612606 t fired, .

Time elapsed: 850 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 10/459 6/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 393940 m, 39324 m/sec, 1229157 t fired, .

Time elapsed: 855 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 15/459 9/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 589781 m, 39168 m/sec, 1846087 t fired, .

Time elapsed: 860 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 20/459 12/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 784184 m, 38880 m/sec, 2460621 t fired, .

Time elapsed: 865 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 25/459 14/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 977751 m, 38713 m/sec, 3074790 t fired, .

Time elapsed: 870 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 30/459 17/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 1170329 m, 38515 m/sec, 3688229 t fired, .

Time elapsed: 875 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 35/459 20/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 1362188 m, 38371 m/sec, 4299708 t fired, .

Time elapsed: 880 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 40/459 22/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 1552589 m, 38080 m/sec, 4913105 t fired, .

Time elapsed: 885 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 45/459 25/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 1742160 m, 37914 m/sec, 5524291 t fired, .

Time elapsed: 890 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 50/459 28/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 1931714 m, 37910 m/sec, 6132975 t fired, .

Time elapsed: 895 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
10 CTL EXCL 55/459 30/32 PolyORBLF-PT-S04J06T10-CTLFireability-03 2120339 m, 37725 m/sec, 6744705 t fired, .

Time elapsed: 900 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 10 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-03 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 905 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 7 (type EXCL) for 6 PolyORBLF-PT-S04J06T10-CTLFireability-02
lola: time limit : 539 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 5/539 4/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 223020 m, 44604 m/sec, 616743 t fired, .

Time elapsed: 910 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 10/539 7/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 430241 m, 41444 m/sec, 1235131 t fired, .

Time elapsed: 915 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 15/539 10/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 642192 m, 42390 m/sec, 1851637 t fired, .

Time elapsed: 920 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 20/539 13/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 853035 m, 42168 m/sec, 2466668 t fired, .

Time elapsed: 925 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 25/539 16/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 1063426 m, 42078 m/sec, 3075556 t fired, .

Time elapsed: 930 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 30/539 19/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 1274467 m, 42208 m/sec, 3682553 t fired, .

Time elapsed: 935 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 35/539 22/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 1484321 m, 41970 m/sec, 4293343 t fired, .

Time elapsed: 940 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 40/539 24/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 1697096 m, 42555 m/sec, 4905605 t fired, .

Time elapsed: 945 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 45/539 27/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 1909609 m, 42502 m/sec, 5517415 t fired, .

Time elapsed: 950 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 50/539 30/32 PolyORBLF-PT-S04J06T10-CTLFireability-02 2119884 m, 42055 m/sec, 6127994 t fired, .

Time elapsed: 955 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 7 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-02 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 960 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 4 (type EXCL) for 3 PolyORBLF-PT-S04J06T10-CTLFireability-01
lola: time limit : 660 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/660 9/32 PolyORBLF-PT-S04J06T10-CTLFireability-01 457644 m, 91528 m/sec, 646121 t fired, .

Time elapsed: 965 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 10/660 16/32 PolyORBLF-PT-S04J06T10-CTLFireability-01 904439 m, 89359 m/sec, 1294974 t fired, .

Time elapsed: 970 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 15/660 24/32 PolyORBLF-PT-S04J06T10-CTLFireability-01 1348746 m, 88861 m/sec, 1943878 t fired, .

Time elapsed: 975 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 20/660 31/32 PolyORBLF-PT-S04J06T10-CTLFireability-01 1778482 m, 85947 m/sec, 2591449 t fired, .

Time elapsed: 980 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 4 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-01 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 985 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 1 (type EXCL) for 0 PolyORBLF-PT-S04J06T10-CTLFireability-00
lola: time limit : 871 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-00
lola: result : false
lola: markings : 96
lola: fired transitions : 287
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 PolyORBLF-PT-S04J06T10-CTLFireability-14
lola: time limit : 1307 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 5/1307 7/32 PolyORBLF-PT-S04J06T10-CTLFireability-14 596199 m, 119239 m/sec, 644548 t fired, .

Time elapsed: 990 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 10/1307 14/32 PolyORBLF-PT-S04J06T10-CTLFireability-14 1171679 m, 115096 m/sec, 1281933 t fired, .

Time elapsed: 995 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 15/1307 20/32 PolyORBLF-PT-S04J06T10-CTLFireability-14 1734681 m, 112600 m/sec, 1913596 t fired, .

Time elapsed: 1000 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 20/1307 26/32 PolyORBLF-PT-S04J06T10-CTLFireability-14 2288270 m, 110717 m/sec, 2538619 t fired, .

Time elapsed: 1005 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 25/1307 32/32 PolyORBLF-PT-S04J06T10-CTLFireability-14 2835928 m, 109531 m/sec, 3158894 t fired, .

Time elapsed: 1010 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 43 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-14 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1015 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 16 (type EXCL) for 15 PolyORBLF-PT-S04J06T10-CTLFireability-05
lola: time limit : 2585 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 5/2585 7/32 PolyORBLF-PT-S04J06T10-CTLFireability-05 564411 m, 112882 m/sec, 602715 t fired, .

Time elapsed: 1020 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 10/2585 14/32 PolyORBLF-PT-S04J06T10-CTLFireability-05 1106831 m, 108484 m/sec, 1190192 t fired, .

Time elapsed: 1025 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 15/2585 20/32 PolyORBLF-PT-S04J06T10-CTLFireability-05 1633644 m, 105362 m/sec, 1767004 t fired, .

Time elapsed: 1030 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 20/2585 26/32 PolyORBLF-PT-S04J06T10-CTLFireability-05 2154719 m, 104215 m/sec, 2340305 t fired, .

Time elapsed: 1035 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 25/2585 32/32 PolyORBLF-PT-S04J06T10-CTLFireability-05 2669859 m, 103028 m/sec, 2910832 t fired, .

Time elapsed: 1040 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 16 (type EXCL) for PolyORBLF-PT-S04J06T10-CTLFireability-05 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL 0 0 0 0 1 0 1 0
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 1045 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
PolyORBLF-PT-S04J06T10-CTLFireability-00: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-01: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-02: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-03: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-04: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-05: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-06: EXEF true state space /EXEF
PolyORBLF-PT-S04J06T10-CTLFireability-07: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-08: CTL true CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-09: CTL false CTL model checker
PolyORBLF-PT-S04J06T10-CTLFireability-10: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-11: AG false findpath
PolyORBLF-PT-S04J06T10-CTLFireability-12: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-13: EG true state space / EG
PolyORBLF-PT-S04J06T10-CTLFireability-14: CTL unknown AGGR
PolyORBLF-PT-S04J06T10-CTLFireability-15: CTL unknown AGGR


Time elapsed: 1045 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PolyORBLF-PT-S04J06T10"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is PolyORBLF-PT-S04J06T10, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r294-tall-167873946800578"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PolyORBLF-PT-S04J06T10.tgz
mv PolyORBLF-PT-S04J06T10 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;