fond
Model Checking Contest 2023
13th edition, Paris, France, April 26, 2023 (at TOOLympics II)
Execution of r276-smll-167863548200308
Last Updated
May 14, 2023

About the Execution of LoLA for PermAdmissibility-COL-20

Execution Summary
Max Memory
Used (MB)
Time wait (ms) CPU Usage (ms) I/O Wait (ms) Computed Result Execution
Status
55.520 732.00 1080.00 27.80 F normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r276-smll-167863548200308.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
.........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is PermAdmissibility-COL-20, examination is StableMarking
Time confinement is 1800 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r276-smll-167863548200308
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 536K
-rw-r--r-- 1 mcc users 8.8K Feb 26 01:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 101K Feb 26 01:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.0K Feb 26 01:20 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 26 01:20 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 3.3K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 22K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.5K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 01:27 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 141K Feb 26 01:27 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 8.1K Feb 26 01:26 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 62K Feb 26 01:26 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.7K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 54K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

FORMULA_NAME StableMarking

=== Now, execution of the tool begins

BK_START 1678888418616

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=StableMarking
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=1800
BK_INPUT=PermAdmissibility-COL-20
Not applying reductions.
Model is COL
StableMarking COL
starting LoLA
BK_INPUT PermAdmissibility-COL-20
BK_EXAMINATION: StableMarking
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
GlobalProperty: StableMarking

FORMULA StableMarking FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678888419348

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Places: 208, Transitions: 1024
lola: @ trans switch9
lola: @ trans switch3
lola: @ trans switch4
lola: @ trans display4
lola: @ trans display3
lola: @ trans switch7
lola: @ trans switch8
lola: @ trans switch11
lola: @ trans switch10
lola: @ trans switch2
lola: @ trans switch1
lola: @ trans switch5
lola: @ trans switch12
lola: @ trans display2
lola: @ trans display1
lola: @ trans switch6
lola: finished unfolding
lola: REM DEA TR: t = t592
lola: REM DEA TR: t = t593
lola: REM DEA TR: t = t594
lola: REM DEA TR: t = t595
lola: REM DEA TR: t = t596
lola: REM DEA TR: t = t597
lola: REM DEA TR: t = t598
lola: REM DEA TR: t = t599
lola: REM DEA TR: t = t656
lola: REM DEA TR: t = t657
lola: REM DEA TR: t = t658
lola: REM DEA TR: t = t659
lola: REM DEA TR: t = t660
lola: REM DEA TR: t = t661
lola: REM DEA TR: t = t662
lola: REM DEA TR: t = t663
lola: REM DEA TR: t = t600
lola: REM DEA TR: t = t601
lola: REM DEA TR: t = t602
lola: REM DEA TR: t = t603
lola: REM DEA TR: t = t604
lola: REM DEA TR: t = t605
lola: REM DEA TR: t = t606
lola: REM DEA TR: t = t607
lola: REM DEA TR: t = t664
lola: REM DEA TR: t = t665
lola: REM DEA TR: t = t666
lola: REM DEA TR: t = t667
lola: REM DEA TR: t = t668
lola: REM DEA TR: t = t669
lola: REM DEA TR: t = t670
lola: REM DEA TR: t = t671
lola: REM DEA TR: t = t608
lola: REM DEA TR: t = t609
lola: REM DEA TR: t = t610
lola: REM DEA TR: t = t611
lola: REM DEA TR: t = t612
lola: REM DEA TR: t = t613
lola: REM DEA TR: t = t614
lola: REM DEA TR: t = t615
lola: REM DEA TR: t = t672
lola: REM DEA TR: t = t673
lola: REM DEA TR: t = t674
lola: REM DEA TR: t = t675
lola: REM DEA TR: t = t676
lola: REM DEA TR: t = t677
lola: REM DEA TR: t = t678
lola: REM DEA TR: t = t679
lola: REM DEA TR: t = t616
lola: REM DEA TR: t = t617
lola: REM DEA TR: t = t618
lola: REM DEA TR: t = t619
lola: REM DEA TR: t = t620
lola: REM DEA TR: t = t621
lola: REM DEA TR: t = t622
lola: REM DEA TR: t = t623
lola: REM DEA TR: t = t680
lola: REM DEA TR: t = t681
lola: REM DEA TR: t = t682
lola: REM DEA TR: t = t683
lola: REM DEA TR: t = t684
lola: REM DEA TR: t = t685
lola: REM DEA TR: t = t686
lola: REM DEA TR: t = t687
lola: REM DEA TR: t = t624
lola: REM DEA TR: t = t625
lola: REM DEA TR: t = t626
lola: REM DEA TR: t = t627
lola: REM DEA TR: t = t628
lola: REM DEA TR: t = t629
lola: REM DEA TR: t = t630
lola: REM DEA TR: t = t631
lola: REM DEA TR: t = t688
lola: REM DEA TR: t = t689
lola: REM DEA TR: t = t690
lola: REM DEA TR: t = t691
lola: REM DEA TR: t = t692
lola: REM DEA TR: t = t693
lola: REM DEA TR: t = t694
lola: REM DEA TR: t = t695
lola: REM DEA TR: t = t632
lola: REM DEA TR: t = t633
lola: REM DEA TR: t = t634
lola: REM DEA TR: t = t635
lola: REM DEA TR: t = t636
lola: REM DEA TR: t = t637
lola: REM DEA TR: t = t638
lola: REM DEA TR: t = t639
lola: REM DEA TR: t = t696
lola: REM DEA TR: t = t697
lola: REM DEA TR: t = t698
lola: REM DEA TR: t = t699
lola: REM DEA TR: t = t700
lola: REM DEA TR: t = t701
lola: REM DEA TR: t = t702
lola: REM DEA TR: t = t703
lola: REM DEA TR: t = t576
lola: REM DEA TR: t = t584
lola: REM DEA TR: t = t640
lola: REM DEA TR: t = t648
lola: REM DEA TR: t = t577
lola: REM DEA TR: t = t585
lola: REM DEA TR: t = t641
lola: REM DEA TR: t = t649
lola: REM DEA TR: t = t578
lola: REM DEA TR: t = t586
lola: REM DEA TR: t = t642
lola: REM DEA TR: t = t650
lola: REM DEA TR: t = t579
lola: REM DEA TR: t = t587
lola: REM DEA TR: t = t643
lola: REM DEA TR: t = t651
lola: REM DEA TR: t = t582
lola: REM DEA TR: t = t590
lola: REM DEA TR: t = t646
lola: REM DEA TR: t = t654
lola: REM DEA TR: t = t583
lola: REM DEA TR: t = t591
lola: REM DEA TR: t = t647
lola: REM DEA TR: t = t655
lola: REM DEA TR: t = t336
lola: REM DEA TR: t = t337
lola: REM DEA TR: t = t338
lola: REM DEA TR: t = t339
lola: REM DEA TR: t = t340
lola: REM DEA TR: t = t341
lola: REM DEA TR: t = t342
lola: REM DEA TR: t = t343
lola: REM DEA TR: t = t386
lola: REM DEA TR: t = t394
lola: REM DEA TR: t = t402
lola: REM DEA TR: t = t410
lola: REM DEA TR: t = t418
lola: REM DEA TR: t = t426
lola: REM DEA TR: t = t434
lola: REM DEA TR: t = t442
lola: REM DEA TR: t = t344
lola: REM DEA TR: t = t345
lola: REM DEA TR: t = t346
lola: REM DEA TR: t = t347
lola: REM DEA TR: t = t348
lola: REM DEA TR: t = t349
lola: REM DEA TR: t = t350
lola: REM DEA TR: t = t351
lola: REM DEA TR: t = t387
lola: REM DEA TR: t = t395
lola: REM DEA TR: t = t403
lola: REM DEA TR: t = t411
lola: REM DEA TR: t = t419
lola: REM DEA TR: t = t427
lola: REM DEA TR: t = t435
lola: REM DEA TR: t = t443
lola: REM DEA TR: t = t368
lola: REM DEA TR: t = t369
lola: REM DEA TR: t = t370
lola: REM DEA TR: t = t371
lola: REM DEA TR: t = t372
lola: REM DEA TR: t = t373
lola: REM DEA TR: t = t374
lola: REM DEA TR: t = t375
lola: REM DEA TR: t = t390
lola: REM DEA TR: t = t398
lola: REM DEA TR: t = t406
lola: REM DEA TR: t = t414
lola: REM DEA TR: t = t422
lola: REM DEA TR: t = t430
lola: REM DEA TR: t = t438
lola: REM DEA TR: t = t446
lola: REM DEA TR: t = t376
lola: REM DEA TR: t = t377
lola: REM DEA TR: t = t378
lola: REM DEA TR: t = t379
lola: REM DEA TR: t = t380
lola: REM DEA TR: t = t381
lola: REM DEA TR: t = t382
lola: REM DEA TR: t = t383
lola: REM DEA TR: t = t391
lola: REM DEA TR: t = t399
lola: REM DEA TR: t = t407
lola: REM DEA TR: t = t415
lola: REM DEA TR: t = t423
lola: REM DEA TR: t = t431
lola: REM DEA TR: t = t439
lola: REM DEA TR: t = t447
lola: REM DEA TR: t = t64
lola: REM DEA TR: t = t65
lola: REM DEA TR: t = t66
lola: REM DEA TR: t = t67
lola: REM DEA TR: t = t68
lola: REM DEA TR: t = t69
lola: REM DEA TR: t = t70
lola: REM DEA TR: t = t71
lola: REM DEA TR: t = t128
lola: REM DEA TR: t = t129
lola: REM DEA TR: t = t130
lola: REM DEA TR: t = t131
lola: REM DEA TR: t = t132
lola: REM DEA TR: t = t133
lola: REM DEA TR: t = t134
lola: REM DEA TR: t = t135
lola: REM DEA TR: t = t72
lola: REM DEA TR: t = t73
lola: REM DEA TR: t = t74
lola: REM DEA TR: t = t75
lola: REM DEA TR: t = t76
lola: REM DEA TR: t = t77
lola: REM DEA TR: t = t78
lola: REM DEA TR: t = t79
lola: REM DEA TR: t = t136
lola: REM DEA TR: t = t137
lola: REM DEA TR: t = t138
lola: REM DEA TR: t = t139
lola: REM DEA TR: t = t140
lola: REM DEA TR: t = t141
lola: REM DEA TR: t = t142
lola: REM DEA TR: t = t143
lola: REM DEA TR: t = t80
lola: REM DEA TR: t = t81
lola: REM DEA TR: t = t82
lola: REM DEA TR: t = t83
lola: REM DEA TR: t = t84
lola: REM DEA TR: t = t85
lola: REM DEA TR: t = t86
lola: REM DEA TR: t = t87
lola: REM DEA TR: t = t144
lola: REM DEA TR: t = t145
lola: REM DEA TR: t = t146
lola: REM DEA TR: t = t147
lola: REM DEA TR: t = t148
lola: REM DEA TR: t = t149
lola: REM DEA TR: t = t150
lola: REM DEA TR: t = t151
lola: REM DEA TR: t = t88
lola: REM DEA TR: t = t89
lola: REM DEA TR: t = t90
lola: REM DEA TR: t = t91
lola: REM DEA TR: t = t92
lola: REM DEA TR: t = t93
lola: REM DEA TR: t = t94
lola: REM DEA TR: t = t95
lola: REM DEA TR: t = t152
lola: REM DEA TR: t = t153
lola: REM DEA TR: t = t154
lola: REM DEA TR: t = t155
lola: REM DEA TR: t = t156
lola: REM DEA TR: t = t157
lola: REM DEA TR: t = t158
lola: REM DEA TR: t = t159
lola: REM DEA TR: t = t96
lola: REM DEA TR: t = t97
lola: REM DEA TR: t = t98
lola: REM DEA TR: t = t99
lola: REM DEA TR: t = t100
lola: REM DEA TR: t = t101
lola: REM DEA TR: t = t102
lola: REM DEA TR: t = t103
lola: REM DEA TR: t = t160
lola: REM DEA TR: t = t161
lola: REM DEA TR: t = t162
lola: REM DEA TR: t = t163
lola: REM DEA TR: t = t164
lola: REM DEA TR: t = t165
lola: REM DEA TR: t = t166
lola: REM DEA TR: t = t167
lola: REM DEA TR: t = t104
lola: REM DEA TR: t = t105
lola: REM DEA TR: t = t106
lola: REM DEA TR: t = t107
lola: REM DEA TR: t = t108
lola: REM DEA TR: t = t109
lola: REM DEA TR: t = t110
lola: REM DEA TR: t = t111
lola: REM DEA TR: t = t168
lola: REM DEA TR: t = t169
lola: REM DEA TR: t = t170
lola: REM DEA TR: t = t171
lola: REM DEA TR: t = t172
lola: REM DEA TR: t = t173
lola: REM DEA TR: t = t174
lola: REM DEA TR: t = t175
lola: REM DEA TR: t = t112
lola: REM DEA TR: t = t120
lola: REM DEA TR: t = t176
lola: REM DEA TR: t = t184
lola: REM DEA TR: t = t113
lola: REM DEA TR: t = t121
lola: REM DEA TR: t = t177
lola: REM DEA TR: t = t185
lola: REM DEA TR: t = t116
lola: REM DEA TR: t = t124
lola: REM DEA TR: t = t180
lola: REM DEA TR: t = t188
lola: REM DEA TR: t = t117
lola: REM DEA TR: t = t125
lola: REM DEA TR: t = t181
lola: REM DEA TR: t = t189
lola: REM DEA TR: t = t118
lola: REM DEA TR: t = t126
lola: REM DEA TR: t = t182
lola: REM DEA TR: t = t190
lola: REM DEA TR: t = t119
lola: REM DEA TR: t = t127
lola: REM DEA TR: t = t183
lola: REM DEA TR: t = t191
lola: REM DEA TR: t = t962
lola: REM DEA TR: t = t970
lola: REM DEA TR: t = t978
lola: REM DEA TR: t = t986
lola: REM DEA TR: t = t994
lola: REM DEA TR: t = t1002
lola: REM DEA TR: t = t1010
lola: REM DEA TR: t = t1018
lola: REM DEA TR: t = t720
lola: REM DEA TR: t = t721
lola: REM DEA TR: t = t722
lola: REM DEA TR: t = t723
lola: REM DEA TR: t = t724
lola: REM DEA TR: t = t725
lola: REM DEA TR: t = t726
lola: REM DEA TR: t = t727
lola: REM DEA TR: t = t963
lola: REM DEA TR: t = t971
lola: REM DEA TR: t = t979
lola: REM DEA TR: t = t987
lola: REM DEA TR: t = t995
lola: REM DEA TR: t = t1003
lola: REM DEA TR: t = t1011
lola: REM DEA TR: t = t1019
lola: REM DEA TR: t = t728
lola: REM DEA TR: t = t729
lola: REM DEA TR: t = t730
lola: REM DEA TR: t = t731
lola: REM DEA TR: t = t732
lola: REM DEA TR: t = t733
lola: REM DEA TR: t = t734
lola: REM DEA TR: t = t735
lola: REM DEA TR: t = t966
lola: REM DEA TR: t = t974
lola: REM DEA TR: t = t982
lola: REM DEA TR: t = t990
lola: REM DEA TR: t = t998
lola: REM DEA TR: t = t1006
lola: REM DEA TR: t = t1014
lola: REM DEA TR: t = t1022
lola: REM DEA TR: t = t752
lola: REM DEA TR: t = t753
lola: REM DEA TR: t = t754
lola: REM DEA TR: t = t755
lola: REM DEA TR: t = t756
lola: REM DEA TR: t = t757
lola: REM DEA TR: t = t758
lola: REM DEA TR: t = t759
lola: REM DEA TR: t = t967
lola: REM DEA TR: t = t975
lola: REM DEA TR: t = t983
lola: REM DEA TR: t = t991
lola: REM DEA TR: t = t999
lola: REM DEA TR: t = t1007
lola: REM DEA TR: t = t1015
lola: REM DEA TR: t = t1023
lola: REM DEA TR: t = t760
lola: REM DEA TR: t = t761
lola: REM DEA TR: t = t762
lola: REM DEA TR: t = t763
lola: REM DEA TR: t = t764
lola: REM DEA TR: t = t765
lola: REM DEA TR: t = t766
lola: REM DEA TR: t = t767
lola: REM DEA TR: t = t960
lola: REM DEA TR: t = t961
lola: REM DEA TR: t = t964
lola: REM DEA TR: t = t965
lola: REM DEA TR: t = t704
lola: REM DEA TR: t = t712
lola: REM DEA TR: t = t736
lola: REM DEA TR: t = t744
lola: REM DEA TR: t = t968
lola: REM DEA TR: t = t969
lola: REM DEA TR: t = t972
lola: REM DEA TR: t = t973
lola: REM DEA TR: t = t705
lola: REM DEA TR: t = t713
lola: REM DEA TR: t = t737
lola: REM DEA TR: t = t745
lola: REM DEA TR: t = t992
lola: REM DEA TR: t = t993
lola: REM DEA TR: t = t996
lola: REM DEA TR: t = t997
lola: REM DEA TR: t = t708
lola: REM DEA TR: t = t716
lola: REM DEA TR: t = t740
lola: REM DEA TR: t = t748
lola: REM DEA TR: t = t1000
lola: REM DEA TR: t = t1001
lola: REM DEA TR: t = t1004
lola: REM DEA TR: t = t1005
lola: REM DEA TR: t = t709
lola: REM DEA TR: t = t717
lola: REM DEA TR: t = t741
lola: REM DEA TR: t = t749
lola: REM DEA TR: t = t320
lola: REM DEA TR: t = t328
lola: REM DEA TR: t = t352
lola: REM DEA TR: t = t360
lola: REM DEA TR: t = t384
lola: REM DEA TR: t = t385
lola: REM DEA TR: t = t388
lola: REM DEA TR: t = t389
lola: REM DEA TR: t = t321
lola: REM DEA TR: t = t329
lola: REM DEA TR: t = t353
lola: REM DEA TR: t = t361
lola: REM DEA TR: t = t392
lola: REM DEA TR: t = t393
lola: REM DEA TR: t = t396
lola: REM DEA TR: t = t397
lola: REM DEA TR: t = t324
lola: REM DEA TR: t = t332
lola: REM DEA TR: t = t356
lola: REM DEA TR: t = t364
lola: REM DEA TR: t = t416
lola: REM DEA TR: t = t417
lola: REM DEA TR: t = t420
lola: REM DEA TR: t = t421
lola: REM DEA TR: t = t325
lola: REM DEA TR: t = t333
lola: REM DEA TR: t = t357
lola: REM DEA TR: t = t365
lola: REM DEA TR: t = t424
lola: REM DEA TR: t = t425
lola: REM DEA TR: t = t428
lola: REM DEA TR: t = t429
lola: STATE EQUATION TRIES TRANSITION t889
lola: LAUNCH SYMM
sara: try reading problem file stateEquationProblem-QuasiLiveness-89.sara.
lola: The net does not have a stable place.
sara: place or transition ordering is non-deterministic

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="PermAdmissibility-COL-20"
export BK_EXAMINATION="StableMarking"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="1800"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is PermAdmissibility-COL-20, examination is StableMarking"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r276-smll-167863548200308"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/PermAdmissibility-COL-20.tgz
mv PermAdmissibility-COL-20 execution
cd execution
if [ "StableMarking" = "ReachabilityDeadlock" ] || [ "StableMarking" = "UpperBounds" ] || [ "StableMarking" = "QuasiLiveness" ] || [ "StableMarking" = "StableMarking" ] || [ "StableMarking" = "Liveness" ] || [ "StableMarking" = "OneSafe" ] || [ "StableMarking" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "StableMarking" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "StableMarking" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "StableMarking.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property StableMarking.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "StableMarking.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' StableMarking.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "StableMarking" = "ReachabilityDeadlock" ] || [ "StableMarking" = "QuasiLiveness" ] || [ "StableMarking" = "StableMarking" ] || [ "StableMarking" = "Liveness" ] || [ "StableMarking" = "OneSafe" ] ; then
echo "FORMULA_NAME StableMarking"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;