About the Execution of LoLa+red for Peterson-COL-4
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
961.863 | 92817.00 | 296862.00 | 598.70 | FFTFTTFTTFFTFTTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538400574.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Peterson-COL-4, examination is ReachabilityCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538400574
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 7.5K Feb 25 22:22 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 25 22:22 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.8K Feb 25 22:14 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 25 22:14 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:31 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:31 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.4K Feb 25 16:31 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:31 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Feb 25 22:37 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 182K Feb 25 22:37 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 25 22:31 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K Feb 25 22:31 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:31 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:31 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_pt
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 44K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-00
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-01
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-02
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-03
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-04
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-05
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-06
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-07
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-08
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-09
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-10
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-11
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-12
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-13
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-14
FORMULA_NAME Peterson-COL-4-ReachabilityCardinality-15
=== Now, execution of the tool begins
BK_START 1678842500580
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=ReachabilityCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Peterson-COL-4
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-15 01:08:24] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, ReachabilityCardinality, -timeout, 360, -rebuildPNML]
[2023-03-15 01:08:24] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-15 01:08:24] [INFO ] Detected file is not PT type :http://www.pnml.org/version-2009/grammar/symmetricnet
log4j:WARN No appenders could be found for logger (org.apache.axiom.locator.DefaultOMMetaFactoryLocator).
log4j:WARN Please initialize the log4j system properly.
log4j:WARN See http://logging.apache.org/log4j/1.2/faq.html#noconfig for more info.
[2023-03-15 01:08:24] [WARNING] Using fallBack plugin, rng conformance not checked
[2023-03-15 01:08:25] [INFO ] Load time of PNML (colored model parsed with PNMLFW) : 1042 ms
[2023-03-15 01:08:25] [INFO ] Imported 11 HL places and 14 HL transitions for a total of 500 PT places and 795.0 transition bindings in 37 ms.
Parsed 16 properties from file /home/mcc/execution/ReachabilityCardinality.xml in 78 ms.
Working with output stream class java.io.PrintStream
[2023-03-15 01:08:25] [INFO ] Built PT skeleton of HLPN with 11 places and 14 transitions 42 arcs in 8 ms.
[2023-03-15 01:08:25] [INFO ] Skeletonized 16 HLPN properties in 3 ms.
Remains 16 properties that can be checked using skeleton over-approximation.
Reduce places removed 2 places and 0 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
[2023-03-15 01:08:25] [INFO ] Flatten gal took : 32 ms
[2023-03-15 01:08:25] [INFO ] Flatten gal took : 7 ms
FORMULA Peterson-COL-4-ReachabilityCardinality-09 FALSE TECHNIQUES CPN_APPROX
Domain [Process(5), Tour(4), Process(5)] of place BeginLoop breaks symmetries in sort Process
Arc [2:1*[$i, (MOD (ADD $j 1) 4)]] contains successor/predecessor on variables of sort Tour
Symmetric sort wr.t. initial and guards and successors and join/free detected :Bool
Arc [1:1*[$i, 0]] contains constants of sort Bool
Transition Ask : constants on arcs in [[1:1*[$i, 0]]] introduces in Bool(2) partition with 1 elements that refines current partition to 2 subsets.
[2023-03-15 01:08:25] [INFO ] Unfolded HLPN to a Petri net with 500 places and 730 transitions 2280 arcs in 63 ms.
[2023-03-15 01:08:25] [INFO ] Unfolded 16 HLPN properties in 5 ms.
Deduced a syphon composed of 20 places in 10 ms
Reduce places removed 20 places and 40 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 1459 ms. (steps per millisecond=6 ) properties (out of 15) seen :1
FORMULA Peterson-COL-4-ReachabilityCardinality-12 FALSE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 695 ms. (steps per millisecond=14 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 144 ms. (steps per millisecond=69 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 352 ms. (steps per millisecond=28 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 239 ms. (steps per millisecond=41 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 289 ms. (steps per millisecond=34 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 140 ms. (steps per millisecond=71 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 195 ms. (steps per millisecond=51 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 349 ms. (steps per millisecond=28 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 113 ms. (steps per millisecond=88 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 139 ms. (steps per millisecond=71 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 158 ms. (steps per millisecond=63 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 186 ms. (steps per millisecond=53 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 116 ms. (steps per millisecond=86 ) properties (out of 14) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 393 ms. (steps per millisecond=25 ) properties (out of 14) seen :0
Interrupted probabilistic random walk after 672054 steps, run timeout after 12001 ms. (steps per millisecond=55 ) properties seen :{}
Probabilistic random walk after 672054 steps, saw 130088 distinct states, run finished after 12007 ms. (steps per millisecond=55 ) properties seen :0
Running SMT prover for 14 properties.
[2023-03-15 01:08:43] [INFO ] Flow matrix only has 630 transitions (discarded 60 similar events)
// Phase 1: matrix 630 rows 480 cols
[2023-03-15 01:08:43] [INFO ] Computed 19 place invariants in 30 ms
[2023-03-15 01:08:45] [INFO ] [Real]Absence check using 14 positive place invariants in 19 ms returned sat
[2023-03-15 01:08:45] [INFO ] [Real]Absence check using 14 positive and 5 generalized place invariants in 8 ms returned sat
[2023-03-15 01:08:45] [INFO ] After 811ms SMT Verify possible using all constraints in real domain returned unsat :5 sat :0 real:9
[2023-03-15 01:08:45] [INFO ] [Nat]Absence check using 14 positive place invariants in 23 ms returned sat
[2023-03-15 01:08:45] [INFO ] [Nat]Absence check using 14 positive and 5 generalized place invariants in 10 ms returned sat
[2023-03-15 01:08:46] [INFO ] After 465ms SMT Verify possible using all constraints in natural domain returned unsat :14 sat :0
FORMULA Peterson-COL-4-ReachabilityCardinality-15 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-14 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-13 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-11 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-10 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-08 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-07 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-06 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-05 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-04 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-03 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-02 TRUE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-01 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
FORMULA Peterson-COL-4-ReachabilityCardinality-00 FALSE TECHNIQUES STRUCTURAL_REDUCTION TOPOLOGICAL SAT_SMT
Fused 14 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
All properties solved without resorting to model-checking.
Total runtime 21882 ms.
starting LoLA
BK_INPUT Peterson-COL-4
BK_EXAMINATION: ReachabilityCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution
ReachabilityCardinality
FORMULA Peterson-COL-4-ReachabilityCardinality-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA Peterson-COL-4-ReachabilityCardinality-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678842593397
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination ReachabilityCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains High-Level net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading HL formula in XML format (--xmlformula)
lola: reading formula from /home/mcc/execution/ReachabilityCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS
lola: LAUNCH task # 55 (type SKEL/FNDP) for 18 Peterson-COL-4-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type SKEL/EQUN) for 18 Peterson-COL-4-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SKEL/SRCH) for 18 Peterson-COL-4-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 59 (type SKEL/SRCH) for 18 Peterson-COL-4-ReachabilityCardinality-06
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: TR BINDINGS DONE
lola: Places: 500, Transitions: 730
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 59 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-06
lola: result : false
lola: markings : 1070
lola: fired transitions : 4453
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 55 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 56 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-06 (obsolete)
lola: CANCELED task # 58 (type SRCH) for Peterson-COL-4-ReachabilityCardinality-06 (obsolete)
lola: LAUNCH task # 52 (type SKEL/FNDP) for 0 Peterson-COL-4-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 53 (type SKEL/EQUN) for 0 Peterson-COL-4-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 62 (type SKEL/SRCH) for 0 Peterson-COL-4-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 63 (type SKEL/SRCH) for 0 Peterson-COL-4-ReachabilityCardinality-00
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 58 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-06
lola: result : false
lola: markings : 1069
lola: fired transitions : 4481
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 55 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-06
lola: result : unknown
lola: fired transitions : 16451
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 63 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-00
lola: result : false
lola: markings : 1285
lola: fired transitions : 6309
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 52 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 53 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-00 (obsolete)
lola: CANCELED task # 62 (type SRCH) for Peterson-COL-4-ReachabilityCardinality-00 (obsolete)
lola: LAUNCH task # 106 (type SKEL/FNDP) for 45 Peterson-COL-4-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 107 (type SKEL/FNDP) for 6 Peterson-COL-4-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 108 (type SKEL/FNDP) for 21 Peterson-COL-4-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 124 (type SKEL/EQUN) for 21 Peterson-COL-4-ReachabilityCardinality-07
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 52 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-00
lola: result : unknown
lola: fired transitions : 8091
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: @ trans ContinueLoop
lola: @ trans Ask
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-56.sara.
lola: @ trans NoIdentity
lola: @ trans EndLoop
lola: @ trans UpdateTurn
lola: @ trans ProgressTurn
lola: @ trans NotAlone
lola: @ trans TurnDiff
lola: @ trans TurnEqual
lola: @ trans Identity
lola: @ trans Alone1
lola: @ trans Loop
lola: @ trans AccessCS
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-53.sara.
lola: @ trans BecomeIdle
lola: FINISHED task # 56 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-06
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-124.sara.
lola: FINISHED task # 53 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-00
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: FINISHED task # 124 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-07
lola: result : false
lola: CANCELED task # 108 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-07 (obsolete)
lola: LAUNCH task # 139 (type SKEL/FNDP) for 36 Peterson-COL-4-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 147 (type SKEL/EQUN) for 36 Peterson-COL-4-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 108 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-07
lola: result : unknown
lola: fired transitions : 471613
lola: tried executions : 2
lola: time used : 2.000000
lola: memory pages used : 0
lola: FINISHED task # 139 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-12
lola: result : true
lola: fired transitions : 19556
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 147 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 49 (type SKEL/FNDP) for 9 Peterson-COL-4-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type SKEL/EQUN) for 9 Peterson-COL-4-ReachabilityCardinality-03
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: Rule S: 40 transitions removed,20 places removed
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-50.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-147.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH INITIAL
lola: LAUNCH task # 28 (type CNST) for 27 Peterson-COL-4-ReachabilityCardinality-09
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: planning for Peterson-COL-4-ReachabilityCardinality-06 stopped (result already fixed).
lola: planning for Peterson-COL-4-ReachabilityCardinality-07 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 28 (type CNST) for Peterson-COL-4-ReachabilityCardinality-09
lola: result : false
lola: planning for Peterson-COL-4-ReachabilityCardinality-00 stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 50 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-03
lola: result : false
lola: CANCELED task # 49 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-03 (obsolete)
lola: LAUNCH task # 194 (type EXCL) for 3 Peterson-COL-4-ReachabilityCardinality-01
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 104 (type SKEL/FNDP) for 3 Peterson-COL-4-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 49 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-03
lola: result : unknown
lola: fired transitions : 94696
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 147 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-12
lola: result : true
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 3/112 0/5 Peterson-COL-4-ReachabilityCardinality-01 1497133 t fired, 2 attempts, .
106 EF FNDP 5/114 0/5 Peterson-COL-4-ReachabilityCardinality-15 1241671 t fired, 2 attempts, .
107 EF FNDP 5/114 0/5 Peterson-COL-4-ReachabilityCardinality-02 1067911 t fired, 2 attempts, .
194 EF EXCL 3/327 1/32 Peterson-COL-4-ReachabilityCardinality-01 60963 m, 12192 m/sec, 182465 t fired, .
Time elapsed: 5 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 8/109 0/5 Peterson-COL-4-ReachabilityCardinality-01 4260754 t fired, 5 attempts, .
106 EF FNDP 10/111 0/5 Peterson-COL-4-ReachabilityCardinality-15 2765853 t fired, 3 attempts, .
107 EF FNDP 10/111 0/5 Peterson-COL-4-ReachabilityCardinality-02 2066128 t fired, 3 attempts, .
194 EF EXCL 8/327 1/32 Peterson-COL-4-ReachabilityCardinality-01 183175 m, 24442 m/sec, 580194 t fired, .
Time elapsed: 10 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 13/104 0/5 Peterson-COL-4-ReachabilityCardinality-01 7100874 t fired, 8 attempts, .
106 EF FNDP 15/106 0/5 Peterson-COL-4-ReachabilityCardinality-15 4276151 t fired, 5 attempts, .
107 EF FNDP 15/106 0/5 Peterson-COL-4-ReachabilityCardinality-02 3102543 t fired, 4 attempts, .
194 EF EXCL 13/327 2/32 Peterson-COL-4-ReachabilityCardinality-01 306191 m, 24603 m/sec, 1031869 t fired, .
Time elapsed: 15 secs. Pages in use: 2
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 18/99 0/5 Peterson-COL-4-ReachabilityCardinality-01 9783272 t fired, 10 attempts, .
106 EF FNDP 20/101 0/5 Peterson-COL-4-ReachabilityCardinality-15 5893163 t fired, 6 attempts, .
107 EF FNDP 20/101 0/5 Peterson-COL-4-ReachabilityCardinality-02 4104406 t fired, 5 attempts, .
194 EF EXCL 18/327 3/32 Peterson-COL-4-ReachabilityCardinality-01 428335 m, 24428 m/sec, 1500112 t fired, .
Time elapsed: 20 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 23/94 0/5 Peterson-COL-4-ReachabilityCardinality-01 12650389 t fired, 13 attempts, .
106 EF FNDP 25/96 0/5 Peterson-COL-4-ReachabilityCardinality-15 7375295 t fired, 8 attempts, .
107 EF FNDP 25/96 0/5 Peterson-COL-4-ReachabilityCardinality-02 5182554 t fired, 6 attempts, .
194 EF EXCL 23/327 3/32 Peterson-COL-4-ReachabilityCardinality-01 545640 m, 23461 m/sec, 1943334 t fired, .
Time elapsed: 25 secs. Pages in use: 3
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 28/89 0/5 Peterson-COL-4-ReachabilityCardinality-01 15508680 t fired, 16 attempts, .
106 EF FNDP 30/91 0/5 Peterson-COL-4-ReachabilityCardinality-15 8857015 t fired, 9 attempts, .
107 EF FNDP 30/91 0/5 Peterson-COL-4-ReachabilityCardinality-02 6257653 t fired, 7 attempts, .
194 EF EXCL 28/327 4/32 Peterson-COL-4-ReachabilityCardinality-01 663262 m, 23524 m/sec, 2370918 t fired, .
Time elapsed: 30 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 33/84 0/5 Peterson-COL-4-ReachabilityCardinality-01 18440927 t fired, 19 attempts, .
106 EF FNDP 35/86 0/5 Peterson-COL-4-ReachabilityCardinality-15 10289810 t fired, 11 attempts, .
107 EF FNDP 35/86 0/5 Peterson-COL-4-ReachabilityCardinality-02 7325462 t fired, 8 attempts, .
194 EF EXCL 33/327 4/32 Peterson-COL-4-ReachabilityCardinality-01 780176 m, 23382 m/sec, 2803733 t fired, .
Time elapsed: 35 secs. Pages in use: 4
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 38/79 0/5 Peterson-COL-4-ReachabilityCardinality-01 21267878 t fired, 22 attempts, .
106 EF FNDP 40/81 0/5 Peterson-COL-4-ReachabilityCardinality-15 11722829 t fired, 12 attempts, .
107 EF FNDP 40/81 0/5 Peterson-COL-4-ReachabilityCardinality-02 8482062 t fired, 9 attempts, .
194 EF EXCL 38/327 5/32 Peterson-COL-4-ReachabilityCardinality-01 896151 m, 23195 m/sec, 3239986 t fired, .
Time elapsed: 40 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 43/74 0/5 Peterson-COL-4-ReachabilityCardinality-01 24054415 t fired, 25 attempts, .
106 EF FNDP 45/76 0/5 Peterson-COL-4-ReachabilityCardinality-15 13199887 t fired, 14 attempts, .
107 EF FNDP 45/76 0/5 Peterson-COL-4-ReachabilityCardinality-02 9682783 t fired, 10 attempts, .
194 EF EXCL 43/327 5/32 Peterson-COL-4-ReachabilityCardinality-01 1012549 m, 23279 m/sec, 3641881 t fired, .
Time elapsed: 45 secs. Pages in use: 5
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 48/69 0/5 Peterson-COL-4-ReachabilityCardinality-01 26846274 t fired, 27 attempts, .
106 EF FNDP 50/71 0/5 Peterson-COL-4-ReachabilityCardinality-15 14680607 t fired, 15 attempts, .
107 EF FNDP 50/71 0/5 Peterson-COL-4-ReachabilityCardinality-02 10886329 t fired, 11 attempts, .
194 EF EXCL 48/327 6/32 Peterson-COL-4-ReachabilityCardinality-01 1129115 m, 23313 m/sec, 4056039 t fired, .
Time elapsed: 50 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 53/64 0/5 Peterson-COL-4-ReachabilityCardinality-01 29667122 t fired, 30 attempts, .
106 EF FNDP 55/66 0/5 Peterson-COL-4-ReachabilityCardinality-15 16149726 t fired, 17 attempts, .
107 EF FNDP 55/66 0/5 Peterson-COL-4-ReachabilityCardinality-02 12079451 t fired, 13 attempts, .
194 EF EXCL 53/327 6/32 Peterson-COL-4-ReachabilityCardinality-01 1246447 m, 23466 m/sec, 4486778 t fired, .
Time elapsed: 55 secs. Pages in use: 6
# running tasks: 4 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 2 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 1 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 1 0 0 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
104 EF FNDP 58/59 0/5 Peterson-COL-4-ReachabilityCardinality-01 32515389 t fired, 33 attempts, .
106 EF FNDP 60/61 0/5 Peterson-COL-4-ReachabilityCardinality-15 17606605 t fired, 18 attempts, .
107 EF FNDP 60/61 0/5 Peterson-COL-4-ReachabilityCardinality-02 13262765 t fired, 14 attempts, .
194 EF EXCL 58/327 7/32 Peterson-COL-4-ReachabilityCardinality-01 1362916 m, 23293 m/sec, 4926439 t fired, .
Time elapsed: 60 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
lola: CANCELED task # 104 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-01 (local timeout)
lola: CANCELED task # 106 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-15 (local timeout)
lola: CANCELED task # 107 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-02 (local timeout)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
Peterson-COL-4-ReachabilityCardinality-01: EF 0 8 1 0 0 1 0 0
Peterson-COL-4-ReachabilityCardinality-02: AG 0 9 0 0 0 1 0 0
Peterson-COL-4-ReachabilityCardinality-04: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-05: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-08: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-10: EF 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-11: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-12: AG 0 5 0 0 2 0 0 3
Peterson-COL-4-ReachabilityCardinality-13: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-14: AG 0 10 0 0 0 0 0 0
Peterson-COL-4-ReachabilityCardinality-15: AG 0 9 0 0 0 1 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
194 EF EXCL 63/327 7/32 Peterson-COL-4-ReachabilityCardinality-01 1479451 m, 23307 m/sec, 5364294 t fired, .
Time elapsed: 65 secs. Pages in use: 7
# running tasks: 4 of 4 Visible: 16
lola: FINISHED task # 104 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-01
lola: result : unknown
lola: fired transitions : 35380949
lola: tried executions : 37
lola: time used : 63.000000
lola: memory pages used : 0
lola: FINISHED task # 106 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-15
lola: result : unknown
lola: fired transitions : 19051475
lola: tried executions : 21
lola: time used : 65.000000
lola: memory pages used : 0
lola: FINISHED task # 107 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-02
lola: result : unknown
lola: fired transitions : 14439245
lola: tried executions : 16
lola: time used : 65.000000
lola: memory pages used : 0
lola: LAUNCH task # 75 (type SKEL/FNDP) for 12 Peterson-COL-4-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 105 (type SKEL/EQUN) for 12 Peterson-COL-4-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 152 (type SKEL/SRCH) for 12 Peterson-COL-4-ReachabilityCardinality-04
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 152 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-04
lola: result : false
lola: markings : 1237
lola: fired transitions : 5347
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 75 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-04 (obsolete)
lola: CANCELED task # 105 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-04 (obsolete)
lola: LAUNCH task # 197 (type FNDP) for 39 Peterson-COL-4-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 198 (type EQUN) for 39 Peterson-COL-4-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 200 (type SRCH) for 39 Peterson-COL-4-ReachabilityCardinality-13
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 105 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-04
lola: result : unknown
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-198.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 198 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-13
lola: result : false
lola: CANCELED task # 197 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-13 (obsolete)
lola: CANCELED task # 200 (type SRCH) for Peterson-COL-4-ReachabilityCardinality-13 (obsolete)
lola: LAUNCH task # 84 (type SKEL/FNDP) for 42 Peterson-COL-4-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 88 (type SKEL/EQUN) for 42 Peterson-COL-4-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 90 (type SKEL/SRCH) for 42 Peterson-COL-4-ReachabilityCardinality-14
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 197 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-13
lola: result : unknown
lola: fired transitions : 7148
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 90 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-14
lola: result : false
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 84 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-14 (obsolete)
lola: CANCELED task # 88 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-14 (obsolete)
lola: LAUNCH task # 116 (type SKEL/FNDP) for 15 Peterson-COL-4-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 117 (type SKEL/EQUN) for 15 Peterson-COL-4-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 119 (type SKEL/SRCH) for 15 Peterson-COL-4-ReachabilityCardinality-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 84 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-14
lola: result : unknown
lola: fired transitions : 10134
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 88 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-14
lola: result : unknown
lola: FINISHED task # 119 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-05
lola: result : false
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 116 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-05 (obsolete)
lola: CANCELED task # 117 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-05 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 67 (type SKEL/FNDP) for 24 Peterson-COL-4-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 70 (type SKEL/EQUN) for 24 Peterson-COL-4-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 72 (type SKEL/SRCH) for 24 Peterson-COL-4-ReachabilityCardinality-08
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: FINISHED task # 72 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-08
lola: result : false
lola: markings : 11
lola: fired transitions : 24
lola: time used : 0.000000
lola: memory pages used : 1
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-117.sara.
sara: place or transition ordering is non-deterministic
lola: CANCELED task # 67 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-08 (obsolete)
lola: CANCELED task # 70 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-08 (obsolete)
lola: LAUNCH task # 136 (type SKEL/FNDP) for 30 Peterson-COL-4-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 142 (type SKEL/EQUN) for 30 Peterson-COL-4-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 144 (type SKEL/SRCH) for 30 Peterson-COL-4-ReachabilityCardinality-10
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 67 (type SKEL/FNDP) for Peterson-COL-4-ReachabilityCardinality-08
lola: result : unknown
lola: fired transitions : 6430
lola: tried executions : 2
lola: time used : 0.000000
lola: memory pages used : 0
lola: FINISHED task # 144 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-10
lola: result : false
lola: markings : 127
lola: fired transitions : 353
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 136 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-10 (obsolete)
lola: CANCELED task # 142 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-10 (obsolete)
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-70.sara.
lola: LAUNCH task # 93 (type SKEL/FNDP) for 33 Peterson-COL-4-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 94 (type SKEL/EQUN) for 33 Peterson-COL-4-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 96 (type SKEL/SRCH) for 33 Peterson-COL-4-ReachabilityCardinality-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 96 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-11
lola: result : false
lola: markings : 201
lola: fired transitions : 375
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 93 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-11 (obsolete)
lola: CANCELED task # 94 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-11 (obsolete)
lola: LAUNCH task # 129 (type SKEL/EQUN) for 6 Peterson-COL-4-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 131 (type SKEL/SRCH) for 6 Peterson-COL-4-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 132 (type SKEL/SRCH) for 6 Peterson-COL-4-ReachabilityCardinality-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-142.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 132 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-02
lola: result : false
lola: markings : 1287
lola: fired transitions : 6562
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 129 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-02 (obsolete)
lola: CANCELED task # 131 (type SRCH) for Peterson-COL-4-ReachabilityCardinality-02 (obsolete)
lola: LAUNCH task # 140 (type SKEL/EQUN) for 45 Peterson-COL-4-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 158 (type SKEL/SRCH) for 45 Peterson-COL-4-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 159 (type SKEL/SRCH) for 45 Peterson-COL-4-ReachabilityCardinality-15
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: FINISHED task # 117 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-05
lola: result : false
lola: rewrite Frontend/Parser/formula_rewrite.k:787
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-94.sara.
lola: FINISHED task # 70 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-08
lola: result : false
lola: FINISHED task # 142 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-10
lola: result : false
lola: FINISHED task # 158 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-15
lola: result : false
lola: markings : 1028
lola: fired transitions : 3787
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 140 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-15 (obsolete)
lola: CANCELED task # 159 (type SRCH) for Peterson-COL-4-ReachabilityCardinality-15 (obsolete)
lola: LAUNCH task # 204 (type FNDP) for 36 Peterson-COL-4-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 205 (type EQUN) for 36 Peterson-COL-4-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 207 (type SRCH) for 36 Peterson-COL-4-ReachabilityCardinality-12
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 159 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-15
lola: result : false
lola: markings : 1028
lola: fired transitions : 3787
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 94 (type SKEL/EQUN) for Peterson-COL-4-ReachabilityCardinality-11
lola: result : false
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-205.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-140.sara.
sara: try reading problem file /home/mcc/execution/ReachabilityCardinality-129.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 207 (type SRCH) for Peterson-COL-4-ReachabilityCardinality-12
lola: result : true
lola: markings : 5085
lola: fired transitions : 9154
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 204 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-12 (obsolete)
lola: CANCELED task # 205 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-12 (obsolete)
lola: LAUNCH task # 134 (type SKEL/EQUN) for 3 Peterson-COL-4-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 161 (type SKEL/SRCH) for 3 Peterson-COL-4-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 162 (type SKEL/SRCH) for 3 Peterson-COL-4-ReachabilityCardinality-01
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 204 (type FNDP) for Peterson-COL-4-ReachabilityCardinality-12
lola: result : unknown
lola: fired transitions : 6232
lola: tried executions : 2
lola: time used : 1.000000
lola: memory pages used : 0
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 205 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-12
lola: result : unknown
lola: FINISHED task # 162 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-01
lola: result : false
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 161 (type SKEL/SRCH) for Peterson-COL-4-ReachabilityCardinality-01
lola: result : false
lola: markings : 6
lola: fired transitions : 6
lola: time used : 0.000000
lola: memory pages used : 1
lola: CANCELED task # 134 (type EQUN) for Peterson-COL-4-ReachabilityCardinality-01 (obsolete)
lola: CANCELED task # 194 (type EXCL) for Peterson-COL-4-ReachabilityCardinality-01 (obsolete)
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Peterson-COL-4-ReachabilityCardinality-00: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-01: EF false skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-02: AG true skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-03: EF false skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-04: AG true skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-05: AG true skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-06: EF false skeleton: tandem / relaxed
Peterson-COL-4-ReachabilityCardinality-07: AG true skeleton: state equation
Peterson-COL-4-ReachabilityCardinality-08: AG true skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-09: EF false preprocessing
Peterson-COL-4-ReachabilityCardinality-10: EF false skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-11: AG true skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-12: AG false tandem / insertion
Peterson-COL-4-ReachabilityCardinality-13: AG true state equation
Peterson-COL-4-ReachabilityCardinality-14: AG true skeleton: tandem / insertion
Peterson-COL-4-ReachabilityCardinality-15: AG true skeleton: tandem / insertion
Time elapsed: 66 secs. Pages in use: 9
Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-COL-4"
export BK_EXAMINATION="ReachabilityCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Peterson-COL-4, examination is ReachabilityCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538400574"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/Peterson-COL-4.tgz
mv Peterson-COL-4 execution
cd execution
if [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "UpperBounds" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] || [ "ReachabilityCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "ReachabilityCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "ReachabilityCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "ReachabilityCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property ReachabilityCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "ReachabilityCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "ReachabilityCardinality" = "ReachabilityDeadlock" ] || [ "ReachabilityCardinality" = "QuasiLiveness" ] || [ "ReachabilityCardinality" = "StableMarking" ] || [ "ReachabilityCardinality" = "Liveness" ] || [ "ReachabilityCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME ReachabilityCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;