Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538200410.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is Parking-PT-104, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538200410
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 464K
-rw-r--r-- 1 mcc users 6.7K Feb 26 14:59 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 14:59 CTLCardinality.xml
-rw-r--r-- 1 mcc users 4.6K Feb 26 14:58 CTLFireability.txt
-rw-r--r-- 1 mcc users 41K Feb 26 14:58 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.8K Feb 25 16:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 28K Feb 25 16:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 8.0K Feb 26 15:00 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 84K Feb 26 15:00 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 14:59 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 109K Feb 26 14:59 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.6K Feb 25 16:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 4 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 23K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME Parking-PT-104-CTLFireability-00
FORMULA_NAME Parking-PT-104-CTLFireability-01
FORMULA_NAME Parking-PT-104-CTLFireability-02
FORMULA_NAME Parking-PT-104-CTLFireability-03
FORMULA_NAME Parking-PT-104-CTLFireability-04
FORMULA_NAME Parking-PT-104-CTLFireability-05
FORMULA_NAME Parking-PT-104-CTLFireability-06
FORMULA_NAME Parking-PT-104-CTLFireability-07
FORMULA_NAME Parking-PT-104-CTLFireability-08
FORMULA_NAME Parking-PT-104-CTLFireability-09
FORMULA_NAME Parking-PT-104-CTLFireability-10
FORMULA_NAME Parking-PT-104-CTLFireability-11
FORMULA_NAME Parking-PT-104-CTLFireability-12
FORMULA_NAME Parking-PT-104-CTLFireability-13
FORMULA_NAME Parking-PT-104-CTLFireability-14
FORMULA_NAME Parking-PT-104-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678781634779

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=Parking-PT-104
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 08:13:58] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 08:13:58] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 08:13:58] [INFO ] Load time of PNML (sax parser for PT used): 82 ms
[2023-03-14 08:13:58] [INFO ] Transformed 65 places.
[2023-03-14 08:13:58] [INFO ] Transformed 97 transitions.
[2023-03-14 08:13:58] [INFO ] Found NUPN structural information;
[2023-03-14 08:13:58] [INFO ] Parsed PT model containing 65 places and 97 transitions and 284 arcs in 237 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 19 ms.
Ensure Unique test removed 41 transitions
Reduce redundant transitions removed 41 transitions.
Support contains 48 out of 65 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 65/65 places, 56/56 transitions.
Applied a total of 0 rules in 23 ms. Remains 65 /65 variables (removed 0) and now considering 56/56 (removed 0) transitions.
// Phase 1: matrix 56 rows 65 cols
[2023-03-14 08:13:58] [INFO ] Computed 16 place invariants in 10 ms
[2023-03-14 08:13:58] [INFO ] Implicit Places using invariants in 353 ms returned [32, 48]
Discarding 2 places :
Implicit Place search using SMT only with invariants took 440 ms to find 2 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 63/65 places, 56/56 transitions.
Applied a total of 0 rules in 3 ms. Remains 63 /63 variables (removed 0) and now considering 56/56 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 467 ms. Remains : 63/65 places, 56/56 transitions.
Support contains 48 out of 63 places after structural reductions.
[2023-03-14 08:13:59] [INFO ] Flatten gal took : 50 ms
[2023-03-14 08:13:59] [INFO ] Flatten gal took : 20 ms
[2023-03-14 08:13:59] [INFO ] Input system was already deterministic with 56 transitions.
Incomplete random walk after 10000 steps, including 594 resets, run finished after 859 ms. (steps per millisecond=11 ) properties (out of 48) seen :38
Incomplete Best-First random walk after 10001 steps, including 105 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 100 resets, run finished after 70 ms. (steps per millisecond=142 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 109 resets, run finished after 82 ms. (steps per millisecond=121 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 103 resets, run finished after 97 ms. (steps per millisecond=103 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 97 resets, run finished after 86 ms. (steps per millisecond=116 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 102 resets, run finished after 72 ms. (steps per millisecond=138 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 103 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 98 resets, run finished after 73 ms. (steps per millisecond=137 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10001 steps, including 102 resets, run finished after 78 ms. (steps per millisecond=128 ) properties (out of 10) seen :0
Incomplete Best-First random walk after 10000 steps, including 103 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 10) seen :0
Running SMT prover for 10 properties.
// Phase 1: matrix 56 rows 63 cols
[2023-03-14 08:14:01] [INFO ] Computed 14 place invariants in 3 ms
[2023-03-14 08:14:01] [INFO ] [Real]Absence check using 14 positive place invariants in 5 ms returned sat
[2023-03-14 08:14:01] [INFO ] After 67ms SMT Verify possible using state equation in real domain returned unsat :6 sat :1 real:3
[2023-03-14 08:14:01] [INFO ] State equation strengthened by 12 read => feed constraints.
[2023-03-14 08:14:01] [INFO ] After 11ms SMT Verify possible using 12 Read/Feed constraints in real domain returned unsat :6 sat :0 real:4
[2023-03-14 08:14:01] [INFO ] After 237ms SMT Verify possible using all constraints in real domain returned unsat :6 sat :0 real:4
[2023-03-14 08:14:01] [INFO ] [Nat]Absence check using 14 positive place invariants in 8 ms returned sat
[2023-03-14 08:14:01] [INFO ] After 77ms SMT Verify possible using state equation in natural domain returned unsat :6 sat :4
[2023-03-14 08:14:01] [INFO ] After 53ms SMT Verify possible using 12 Read/Feed constraints in natural domain returned unsat :6 sat :4
[2023-03-14 08:14:01] [INFO ] After 136ms SMT Verify possible using trap constraints in natural domain returned unsat :6 sat :4
Attempting to minimize the solution found.
Minimization took 48 ms.
[2023-03-14 08:14:01] [INFO ] After 361ms SMT Verify possible using all constraints in natural domain returned unsat :6 sat :4
Fused 10 Parikh solutions to 4 different solutions.
Parikh walk visited 2 properties in 9 ms.
Support contains 4 out of 63 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 63/63 places, 56/56 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 63 transition count 54
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 4 place count 61 transition count 52
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 8 place count 59 transition count 52
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 10 place count 57 transition count 50
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 57 transition count 50
Performed 3 Post agglomeration using F-continuation condition.Transition count delta: 3
Deduced a syphon composed of 3 places in 0 ms
Reduce places removed 3 places and 0 transitions.
Iterating global reduction 2 with 6 rules applied. Total rules applied 18 place count 54 transition count 47
Free-agglomeration rule applied 7 times.
Iterating global reduction 2 with 7 rules applied. Total rules applied 25 place count 54 transition count 40
Reduce places removed 7 places and 0 transitions.
Iterating post reduction 2 with 7 rules applied. Total rules applied 32 place count 47 transition count 40
Applied a total of 32 rules in 42 ms. Remains 47 /63 variables (removed 16) and now considering 40/56 (removed 16) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 42 ms. Remains : 47/63 places, 40/56 transitions.
Incomplete random walk after 10000 steps, including 261 resets, run finished after 133 ms. (steps per millisecond=75 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10001 steps, including 75 resets, run finished after 13 ms. (steps per millisecond=769 ) properties (out of 2) seen :1
Finished Best-First random walk after 1496 steps, including 15 resets, run visited all 1 properties in 3 ms. (steps per millisecond=498 )
Successfully simplified 6 atomic propositions for a total of 16 simplifications.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 14 ms
[2023-03-14 08:14:02] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA Parking-PT-104-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 13 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 56 transitions.
Computed a total of 1 stabilizing places and 1 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 62 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 62 transition count 55
Applied a total of 2 rules in 6 ms. Remains 62 /63 variables (removed 1) and now considering 55/56 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 62/63 places, 55/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 7 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 7 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Reduce places removed 1 places and 1 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 62 transition count 53
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 60 transition count 53
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 4 place count 60 transition count 51
Deduced a syphon composed of 2 places in 1 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 8 place count 58 transition count 51
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 10 place count 56 transition count 49
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 56 transition count 49
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 14 place count 55 transition count 48
Applied a total of 14 rules in 21 ms. Remains 55 /63 variables (removed 8) and now considering 48/56 (removed 8) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 21 ms. Remains : 55/63 places, 48/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 48 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 62 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 62 transition count 55
Applied a total of 2 rules in 5 ms. Remains 62 /63 variables (removed 1) and now considering 55/56 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 62/63 places, 55/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 6 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 6 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Drop transitions removed 2 transitions
Trivial Post-agglo rules discarded 2 transitions
Performed 2 trivial Post agglomeration. Transition count delta: 2
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 63 transition count 54
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 1 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 2 Pre rules applied. Total rules applied 4 place count 61 transition count 52
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 4 rules applied. Total rules applied 8 place count 59 transition count 52
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 10 place count 57 transition count 50
Iterating global reduction 2 with 2 rules applied. Total rules applied 12 place count 57 transition count 50
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 14 place count 56 transition count 49
Applied a total of 14 rules in 17 ms. Remains 56 /63 variables (removed 7) and now considering 49/56 (removed 7) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 17 ms. Remains : 56/63 places, 49/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 49 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 16 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 16 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Drop transitions removed 1 transitions
Trivial Post-agglo rules discarded 1 transitions
Performed 1 trivial Post agglomeration. Transition count delta: 1
Iterating post reduction 0 with 1 rules applied. Total rules applied 1 place count 63 transition count 55
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 2 place count 62 transition count 55
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 2 place count 62 transition count 54
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 6 place count 59 transition count 52
Iterating global reduction 2 with 2 rules applied. Total rules applied 8 place count 59 transition count 52
Applied a total of 8 rules in 12 ms. Remains 59 /63 variables (removed 4) and now considering 52/56 (removed 4) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 12 ms. Remains : 59/63 places, 52/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 52 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 3 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 3 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 61 transition count 54
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 61 transition count 54
Applied a total of 4 rules in 2 ms. Remains 61 /63 variables (removed 2) and now considering 54/56 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 61/63 places, 54/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 54 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 62 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 62 transition count 55
Applied a total of 2 rules in 3 ms. Remains 62 /63 variables (removed 1) and now considering 55/56 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 62/63 places, 55/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 55 transitions.
Starting structural reductions in LTL mode, iteration 0 : 63/63 places, 56/56 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 62 transition count 55
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 62 transition count 55
Applied a total of 2 rules in 3 ms. Remains 62 /63 variables (removed 1) and now considering 55/56 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 62/63 places, 55/56 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 6 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Input system was already deterministic with 55 transitions.
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:14:02] [INFO ] Flatten gal took : 5 ms
[2023-03-14 08:14:02] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-14 08:14:02] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 63 places, 56 transitions and 192 arcs took 0 ms.
Total runtime 4622 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT Parking-PT-104
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/370
CTLFireability

FORMULA Parking-PT-104-CTLFireability-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-02 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA Parking-PT-104-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678781644432

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/370/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/370/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/370/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH task # 13 (type EXCL) for 12 Parking-PT-104-CTLFireability-04
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 13 (type EXCL) for Parking-PT-104-CTLFireability-04
lola: result : true
lola: markings : 21
lola: fired transitions : 21
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 18 (type EXCL) for 15 Parking-PT-104-CTLFireability-05
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: LAUNCH task # 49 (type FNDP) for 15 Parking-PT-104-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 50 (type EQUN) for 15 Parking-PT-104-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 52 (type SRCH) for 15 Parking-PT-104-CTLFireability-05
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: FINISHED task # 52 (type SRCH) for Parking-PT-104-CTLFireability-05
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 49 (type FNDP) for Parking-PT-104-CTLFireability-05
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 18 (type EXCL) for Parking-PT-104-CTLFireability-05 (obsolete)
lola: CANCELED task # 50 (type EQUN) for Parking-PT-104-CTLFireability-05 (obsolete)
lola: LAUNCH task # 38 (type EXCL) for 37 Parking-PT-104-CTLFireability-12
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 50 (type EQUN) for Parking-PT-104-CTLFireability-05
lola: result : unknown
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 38 (type EXCL) for Parking-PT-104-CTLFireability-12
lola: result : false
lola: markings : 3542
lola: fired transitions : 22059
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 47 (type EXCL) for 46 Parking-PT-104-CTLFireability-15
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 47 (type EXCL) for Parking-PT-104-CTLFireability-15
lola: result : false
lola: markings : 20
lola: fired transitions : 20
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 44 (type EXCL) for 43 Parking-PT-104-CTLFireability-14
lola: time limit : 327 sec
lola: memory limit: 32 pages
lola: FINISHED task # 44 (type EXCL) for Parking-PT-104-CTLFireability-14
lola: result : false
lola: markings : 21
lola: fired transitions : 82
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 41 (type EXCL) for 40 Parking-PT-104-CTLFireability-13
lola: time limit : 360 sec
lola: memory limit: 32 pages
lola: FINISHED task # 41 (type EXCL) for Parking-PT-104-CTLFireability-13
lola: result : false
lola: markings : 3071
lola: fired transitions : 4877
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 35 (type EXCL) for 34 Parking-PT-104-CTLFireability-11
lola: time limit : 400 sec
lola: memory limit: 32 pages
lola: FINISHED task # 35 (type EXCL) for Parking-PT-104-CTLFireability-11
lola: result : true
lola: markings : 1119
lola: fired transitions : 4114
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 Parking-PT-104-CTLFireability-08
lola: time limit : 450 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for Parking-PT-104-CTLFireability-08
lola: result : false
lola: markings : 4173
lola: fired transitions : 18713
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 22 Parking-PT-104-CTLFireability-06
lola: time limit : 514 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for Parking-PT-104-CTLFireability-06
lola: result : true
lola: markings : 21
lola: fired transitions : 59
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 Parking-PT-104-CTLFireability-02
lola: time limit : 600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for Parking-PT-104-CTLFireability-02
lola: result : true
lola: markings : 1145
lola: fired transitions : 4829
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 Parking-PT-104-CTLFireability-01
lola: time limit : 720 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for Parking-PT-104-CTLFireability-01
lola: result : false
lola: markings : 3080
lola: fired transitions : 12956
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 Parking-PT-104-CTLFireability-00
lola: time limit : 900 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for Parking-PT-104-CTLFireability-00
lola: result : false
lola: markings : 1382
lola: fired transitions : 5058
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 Parking-PT-104-CTLFireability-03
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for Parking-PT-104-CTLFireability-03
lola: result : true
lola: markings : 20
lola: fired transitions : 40
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 Parking-PT-104-CTLFireability-07
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for Parking-PT-104-CTLFireability-07
lola: result : true
lola: markings : 21
lola: fired transitions : 102
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 Parking-PT-104-CTLFireability-10
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for Parking-PT-104-CTLFireability-10
lola: result : false
lola: markings : 1093
lola: fired transitions : 4198
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
Parking-PT-104-CTLFireability-00: CTL false CTL model checker
Parking-PT-104-CTLFireability-01: CTL false CTL model checker
Parking-PT-104-CTLFireability-02: CTL true CTL model checker
Parking-PT-104-CTLFireability-03: EGEF true CTL model checker
Parking-PT-104-CTLFireability-04: CTL true CTL model checker
Parking-PT-104-CTLFireability-05: DISJ true findpath
Parking-PT-104-CTLFireability-06: CTL true CTL model checker
Parking-PT-104-CTLFireability-07: CTL true CTL model checker
Parking-PT-104-CTLFireability-08: CTL false CTL model checker
Parking-PT-104-CTLFireability-10: CTL false CTL model checker
Parking-PT-104-CTLFireability-11: CTL true CTL model checker
Parking-PT-104-CTLFireability-12: CTL false CTL model checker
Parking-PT-104-CTLFireability-13: CTL false CTL model checker
Parking-PT-104-CTLFireability-14: CTL false CTL model checker
Parking-PT-104-CTLFireability-15: CTL false CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Parking-PT-104"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is Parking-PT-104, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538200410"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Parking-PT-104.tgz
mv Parking-PT-104 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;