About the Execution of LoLa+red for ParamProductionCell-PT-5
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 768.111 | 86940.00 | 98002.00 | 805.00 | TTFFFFTTTTFFTFTF | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538200402.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ParamProductionCell-PT-5, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538200402
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 656K
-rw-r--r-- 1 mcc users 7.2K Feb 26 17:17 CTLCardinality.txt
-rw-r--r-- 1 mcc users 62K Feb 26 17:17 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.4K Feb 26 17:16 CTLFireability.txt
-rw-r--r-- 1 mcc users 38K Feb 26 17:16 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.2K Feb 25 16:30 LTLCardinality.txt
-rw-r--r-- 1 mcc users 25K Feb 25 16:30 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.7K Feb 25 16:30 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:30 LTLFireability.xml
-rw-r--r-- 1 mcc users 19K Feb 26 17:19 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 166K Feb 26 17:19 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 11K Feb 26 17:18 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 66K Feb 26 17:18 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:30 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:30 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 174K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-00
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-01
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-02
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-03
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-04
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-05
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-06
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-07
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-08
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-09
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-10
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-11
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-12
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-13
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-14
FORMULA_NAME ParamProductionCell-PT-5-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678781452630
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-5
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 08:10:55] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 08:10:55] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 08:10:55] [INFO ] Load time of PNML (sax parser for PT used): 101 ms
[2023-03-14 08:10:55] [INFO ] Transformed 231 places.
[2023-03-14 08:10:55] [INFO ] Transformed 202 transitions.
[2023-03-14 08:10:55] [INFO ] Found NUPN structural information;
[2023-03-14 08:10:55] [INFO ] Parsed PT model containing 231 places and 202 transitions and 846 arcs in 217 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 11 ms.
Support contains 106 out of 231 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 231/231 places, 202/202 transitions.
Discarding 5 places :
Symmetric choice reduction at 0 with 5 rule applications. Total rules 5 place count 226 transition count 197
Iterating global reduction 0 with 5 rules applied. Total rules applied 10 place count 226 transition count 197
Applied a total of 10 rules in 40 ms. Remains 226 /231 variables (removed 5) and now considering 197/202 (removed 5) transitions.
// Phase 1: matrix 197 rows 226 cols
[2023-03-14 08:10:55] [INFO ] Computed 59 place invariants in 25 ms
[2023-03-14 08:10:56] [INFO ] Implicit Places using invariants in 443 ms returned [15, 16, 24, 35, 36, 42, 46, 59, 119, 161, 166, 191, 192, 201, 202, 206, 217]
Discarding 17 places :
Implicit Place search using SMT only with invariants took 482 ms to find 17 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 209/231 places, 197/202 transitions.
Applied a total of 0 rules in 9 ms. Remains 209 /209 variables (removed 0) and now considering 197/197 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 534 ms. Remains : 209/231 places, 197/202 transitions.
Support contains 106 out of 209 places after structural reductions.
[2023-03-14 08:10:56] [INFO ] Flatten gal took : 62 ms
[2023-03-14 08:10:56] [INFO ] Flatten gal took : 25 ms
[2023-03-14 08:10:56] [INFO ] Input system was already deterministic with 197 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 468 ms. (steps per millisecond=21 ) properties (out of 54) seen :49
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 88 ms. (steps per millisecond=113 ) properties (out of 5) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 87 ms. (steps per millisecond=114 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 90 ms. (steps per millisecond=111 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 92 ms. (steps per millisecond=108 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 101 ms. (steps per millisecond=99 ) properties (out of 4) seen :0
Running SMT prover for 4 properties.
// Phase 1: matrix 197 rows 209 cols
[2023-03-14 08:10:57] [INFO ] Computed 42 place invariants in 13 ms
[2023-03-14 08:10:57] [INFO ] [Real]Absence check using 27 positive place invariants in 14 ms returned sat
[2023-03-14 08:10:58] [INFO ] [Real]Absence check using 27 positive and 15 generalized place invariants in 10 ms returned sat
[2023-03-14 08:10:58] [INFO ] After 181ms SMT Verify possible using all constraints in real domain returned unsat :1 sat :0 real:3
[2023-03-14 08:10:58] [INFO ] [Nat]Absence check using 27 positive place invariants in 14 ms returned sat
[2023-03-14 08:10:58] [INFO ] [Nat]Absence check using 27 positive and 15 generalized place invariants in 9 ms returned sat
[2023-03-14 08:10:58] [INFO ] After 182ms SMT Verify possible using state equation in natural domain returned unsat :3 sat :1
[2023-03-14 08:10:58] [INFO ] State equation strengthened by 68 read => feed constraints.
[2023-03-14 08:10:58] [INFO ] After 63ms SMT Verify possible using 68 Read/Feed constraints in natural domain returned unsat :3 sat :1
[2023-03-14 08:10:58] [INFO ] Deduced a trap composed of 7 places in 126 ms of which 10 ms to minimize.
[2023-03-14 08:10:58] [INFO ] Deduced a trap composed of 5 places in 107 ms of which 1 ms to minimize.
[2023-03-14 08:10:58] [INFO ] Deduced a trap composed of 10 places in 85 ms of which 1 ms to minimize.
[2023-03-14 08:10:58] [INFO ] Deduced a trap composed of 5 places in 84 ms of which 2 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Deduced a trap composed of 7 places in 87 ms of which 1 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Deduced a trap composed of 36 places in 91 ms of which 0 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Deduced a trap composed of 20 places in 84 ms of which 0 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Deduced a trap composed of 33 places in 79 ms of which 1 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Deduced a trap composed of 7 places in 76 ms of which 1 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Deduced a trap composed of 30 places in 76 ms of which 0 ms to minimize.
[2023-03-14 08:10:59] [INFO ] Trap strengthening procedure managed to obtain unsat after adding 10 trap constraints in 1109 ms
[2023-03-14 08:10:59] [INFO ] After 1186ms SMT Verify possible using trap constraints in natural domain returned unsat :4 sat :0
[2023-03-14 08:10:59] [INFO ] After 1521ms SMT Verify possible using all constraints in natural domain returned unsat :4 sat :0
Fused 4 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 0 ms.
Successfully simplified 4 atomic propositions for a total of 16 simplifications.
FORMULA ParamProductionCell-PT-5-CTLFireability-03 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 08:10:59] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 18 ms
FORMULA ParamProductionCell-PT-5-CTLFireability-04 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 18 ms
[2023-03-14 08:10:59] [INFO ] Input system was already deterministic with 197 transitions.
Support contains 88 out of 209 places (down from 91) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 26 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 26 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 15 ms
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 18 ms
[2023-03-14 08:10:59] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 9 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 15 ms
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 17 ms
[2023-03-14 08:10:59] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 209 transition count 189
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 16 place count 201 transition count 189
Performed 20 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 20 Pre rules applied. Total rules applied 16 place count 201 transition count 169
Deduced a syphon composed of 20 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 56 place count 181 transition count 169
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 57 place count 180 transition count 168
Iterating global reduction 2 with 1 rules applied. Total rules applied 58 place count 180 transition count 168
Performed 23 Post agglomeration using F-continuation condition.Transition count delta: 23
Deduced a syphon composed of 23 places in 1 ms
Reduce places removed 23 places and 0 transitions.
Iterating global reduction 2 with 46 rules applied. Total rules applied 104 place count 157 transition count 145
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 106 place count 156 transition count 144
Applied a total of 106 rules in 47 ms. Remains 156 /209 variables (removed 53) and now considering 144/197 (removed 53) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 47 ms. Remains : 156/209 places, 144/197 transitions.
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 12 ms
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 13 ms
[2023-03-14 08:10:59] [INFO ] Input system was already deterministic with 144 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 9 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 13 ms
[2023-03-14 08:10:59] [INFO ] Flatten gal took : 21 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 8 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 14 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 14 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Drop transitions removed 5 transitions
Trivial Post-agglo rules discarded 5 transitions
Performed 5 trivial Post agglomeration. Transition count delta: 5
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 209 transition count 192
Reduce places removed 5 places and 0 transitions.
Performed 2 Post agglomeration using F-continuation condition.Transition count delta: 2
Iterating post reduction 1 with 7 rules applied. Total rules applied 12 place count 204 transition count 190
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 2 with 2 rules applied. Total rules applied 14 place count 202 transition count 190
Performed 21 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 21 Pre rules applied. Total rules applied 14 place count 202 transition count 169
Deduced a syphon composed of 21 places in 0 ms
Reduce places removed 21 places and 0 transitions.
Iterating global reduction 3 with 42 rules applied. Total rules applied 56 place count 181 transition count 169
Discarding 1 places :
Symmetric choice reduction at 3 with 1 rule applications. Total rules 57 place count 180 transition count 168
Iterating global reduction 3 with 1 rules applied. Total rules applied 58 place count 180 transition count 168
Performed 22 Post agglomeration using F-continuation condition.Transition count delta: 22
Deduced a syphon composed of 22 places in 1 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 3 with 44 rules applied. Total rules applied 102 place count 158 transition count 146
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 104 place count 157 transition count 145
Applied a total of 104 rules in 38 ms. Remains 157 /209 variables (removed 52) and now considering 145/197 (removed 52) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 38 ms. Remains : 157/209 places, 145/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 7 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 7 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 8 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 21 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 8 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 9 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Drop transitions removed 8 transitions
Trivial Post-agglo rules discarded 8 transitions
Performed 8 trivial Post agglomeration. Transition count delta: 8
Iterating post reduction 0 with 8 rules applied. Total rules applied 8 place count 209 transition count 189
Reduce places removed 8 places and 0 transitions.
Iterating post reduction 1 with 8 rules applied. Total rules applied 16 place count 201 transition count 189
Performed 20 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 20 Pre rules applied. Total rules applied 16 place count 201 transition count 169
Deduced a syphon composed of 20 places in 0 ms
Reduce places removed 20 places and 0 transitions.
Iterating global reduction 2 with 40 rules applied. Total rules applied 56 place count 181 transition count 169
Discarding 1 places :
Symmetric choice reduction at 2 with 1 rule applications. Total rules 57 place count 180 transition count 168
Iterating global reduction 2 with 1 rules applied. Total rules applied 58 place count 180 transition count 168
Performed 22 Post agglomeration using F-continuation condition.Transition count delta: 22
Deduced a syphon composed of 22 places in 1 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 2 with 44 rules applied. Total rules applied 102 place count 158 transition count 146
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 104 place count 157 transition count 145
Applied a total of 104 rules in 36 ms. Remains 157 /209 variables (removed 52) and now considering 145/197 (removed 52) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 37 ms. Remains : 157/209 places, 145/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 7 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 8 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 145 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 7 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 12 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Applied a total of 0 rules in 3 ms. Remains 209 /209 variables (removed 0) and now considering 197/197 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 209/209 places, 197/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in LTL mode, iteration 0 : 209/209 places, 197/197 transitions.
Discarding 1 places :
Symmetric choice reduction at 0 with 1 rule applications. Total rules 1 place count 208 transition count 196
Iterating global reduction 0 with 1 rules applied. Total rules applied 2 place count 208 transition count 196
Applied a total of 2 rules in 8 ms. Remains 208 /209 variables (removed 1) and now considering 196/197 (removed 1) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/209 places, 196/197 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 17 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 10 ms
[2023-03-14 08:11:00] [INFO ] Input system was already deterministic with 196 transitions.
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Flatten gal took : 11 ms
[2023-03-14 08:11:00] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-14 08:11:00] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 209 places, 197 transitions and 764 arcs took 2 ms.
Total runtime 5233 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ParamProductionCell-PT-5
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/375
CTLFireability
FORMULA ParamProductionCell-PT-5-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-15 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-5-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678781539570
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/375/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/375/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/375/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: rewrite Frontend/Parser/formula_rewrite.k:199
lola: rewrite Frontend/Parser/formula_rewrite.k:147
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-5-CTLFireability-01
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-5-CTLFireability-01
lola: result : true
lola: markings : 550
lola: fired transitions : 564
lola: time used : 0.000000
lola: memory pages used : 1
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 38 (type EXCL) for 37 ParamProductionCell-PT-5-CTLFireability-13
lola: time limit : 163 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:776
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLFireability-01: CTL true CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-5-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-10: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 5/239 3/32 ParamProductionCell-PT-5-CTLFireability-13 495902 m, 99180 m/sec, 2033002 t fired, .
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ParamProductionCell-PT-5-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-10: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-15: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
38 CTL EXCL 10/239 5/32 ParamProductionCell-PT-5-CTLFireability-13 891364 m, 79092 m/sec, 4194428 t fired, .
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ParamProductionCell-PT-5-CTLFireability-01: CTL true CTL model checker
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ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-5-CTLFireability-10: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
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38 CTL EXCL 15/239 6/32 ParamProductionCell-PT-5-CTLFireability-13 1227212 m, 67169 m/sec, 6431712 t fired, .
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ParamProductionCell-PT-5-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-10: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
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38 CTL EXCL 20/239 8/32 ParamProductionCell-PT-5-CTLFireability-13 1603645 m, 75286 m/sec, 8613373 t fired, .
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lola: FINISHED task # 38 (type EXCL) for ParamProductionCell-PT-5-CTLFireability-13
lola: result : false
lola: markings : 1639575
lola: fired transitions : 9409542
lola: time used : 21.000000
lola: memory pages used : 8
lola: LAUNCH task # 48 (type EXCL) for 47 ParamProductionCell-PT-5-CTLFireability-15
lola: time limit : 255 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-5-CTLFireability-01: CTL true CTL model checker
ParamProductionCell-PT-5-CTLFireability-13: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-5-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
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48 CTL EXCL 4/255 2/32 ParamProductionCell-PT-5-CTLFireability-15 282884 m, 56576 m/sec, 1671680 t fired, .
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ParamProductionCell-PT-5-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-10: F 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-5-CTLFireability-14: DISJ 0 2 0 0 2 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 9/255 4/32 ParamProductionCell-PT-5-CTLFireability-15 660683 m, 75559 m/sec, 4405452 t fired, .
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ParamProductionCell-PT-5-CTLFireability-10: F 0 1 0 0 1 0 0 0
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48 CTL EXCL 14/255 5/32 ParamProductionCell-PT-5-CTLFireability-15 1016610 m, 71185 m/sec, 7279766 t fired, .
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ParamProductionCell-PT-5-CTLFireability-01: CTL true CTL model checker
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PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ParamProductionCell-PT-5-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-5-CTLFireability-07: CONJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-5-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
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FINAL RESULTS
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ParamProductionCell-PT-5-CTLFireability-00: CTL true CTL model checker
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ParamProductionCell-PT-5-CTLFireability-07: CONJ true CONJ
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ParamProductionCell-PT-5-CTLFireability-10: F false state space / EG
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-5"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ParamProductionCell-PT-5, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538200402"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-5.tgz
mv ParamProductionCell-PT-5 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;