Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538200378.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ParamProductionCell-PT-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538200378
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 712K
-rw-r--r-- 1 mcc users 8.4K Feb 26 17:16 CTLCardinality.txt
-rw-r--r-- 1 mcc users 79K Feb 26 17:16 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.3K Feb 26 17:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 48K Feb 26 17:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.1K Feb 25 16:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 23K Feb 25 16:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.9K Feb 25 16:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 18K Feb 26 17:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 160K Feb 26 17:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 14K Feb 26 17:17 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 98K Feb 26 17:17 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 174K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-00
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-01
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-02
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-03
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-04
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-05
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-06
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-07
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-08
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-09
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-10
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-11
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-12
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-13
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-14
FORMULA_NAME ParamProductionCell-PT-2-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678780470075

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 07:54:32] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-14 07:54:32] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 07:54:33] [INFO ] Load time of PNML (sax parser for PT used): 104 ms
[2023-03-14 07:54:33] [INFO ] Transformed 231 places.
[2023-03-14 07:54:33] [INFO ] Transformed 202 transitions.
[2023-03-14 07:54:33] [INFO ] Found NUPN structural information;
[2023-03-14 07:54:33] [INFO ] Parsed PT model containing 231 places and 202 transitions and 846 arcs in 226 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 13 ms.
Support contains 118 out of 231 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 231/231 places, 202/202 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 229 transition count 200
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 229 transition count 200
Applied a total of 4 rules in 42 ms. Remains 229 /231 variables (removed 2) and now considering 200/202 (removed 2) transitions.
// Phase 1: matrix 200 rows 229 cols
[2023-03-14 07:54:33] [INFO ] Computed 59 place invariants in 33 ms
[2023-03-14 07:54:33] [INFO ] Implicit Places using invariants in 446 ms returned [15, 18, 19, 24, 31, 35, 36, 42, 65, 119, 120, 167, 168, 194, 195, 204, 220]
Discarding 17 places :
Implicit Place search using SMT only with invariants took 489 ms to find 17 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 212/231 places, 200/202 transitions.
Applied a total of 0 rules in 8 ms. Remains 212 /212 variables (removed 0) and now considering 200/200 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 539 ms. Remains : 212/231 places, 200/202 transitions.
Support contains 118 out of 212 places after structural reductions.
[2023-03-14 07:54:34] [INFO ] Flatten gal took : 63 ms
[2023-03-14 07:54:34] [INFO ] Flatten gal took : 27 ms
[2023-03-14 07:54:34] [INFO ] Input system was already deterministic with 200 transitions.
Support contains 117 out of 212 places (down from 118) after GAL structural reductions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 566 ms. (steps per millisecond=17 ) properties (out of 78) seen :72
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 114 ms. (steps per millisecond=87 ) properties (out of 6) seen :1
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 5) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 69 ms. (steps per millisecond=144 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 63 ms. (steps per millisecond=158 ) properties (out of 3) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 61 ms. (steps per millisecond=163 ) properties (out of 3) seen :1
Running SMT prover for 2 properties.
// Phase 1: matrix 200 rows 212 cols
[2023-03-14 07:54:35] [INFO ] Computed 42 place invariants in 10 ms
[2023-03-14 07:54:35] [INFO ] After 104ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:2
[2023-03-14 07:54:35] [INFO ] [Nat]Absence check using 28 positive place invariants in 12 ms returned sat
[2023-03-14 07:54:35] [INFO ] [Nat]Absence check using 28 positive and 14 generalized place invariants in 9 ms returned sat
[2023-03-14 07:54:35] [INFO ] After 118ms SMT Verify possible using all constraints in natural domain returned unsat :2 sat :0
Fused 2 Parikh solutions to 0 different solutions.
Parikh walk visited 0 properties in 1 ms.
Successfully simplified 2 atomic propositions for a total of 16 simplifications.
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 19 ms
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 22 ms
[2023-03-14 07:54:35] [INFO ] Input system was already deterministic with 200 transitions.
Support contains 107 out of 212 places (down from 111) after GAL structural reductions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in SI_CTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 212 transition count 190
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 20 place count 202 transition count 190
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 20 place count 202 transition count 174
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 52 place count 186 transition count 174
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 56 place count 182 transition count 170
Iterating global reduction 2 with 4 rules applied. Total rules applied 60 place count 182 transition count 170
Performed 22 Post agglomeration using F-continuation condition.Transition count delta: 22
Deduced a syphon composed of 22 places in 1 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 2 with 44 rules applied. Total rules applied 104 place count 160 transition count 148
Applied a total of 104 rules in 71 ms. Remains 160 /212 variables (removed 52) and now considering 148/200 (removed 52) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 72 ms. Remains : 160/212 places, 148/200 transitions.
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:54:35] [INFO ] Input system was already deterministic with 148 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 10 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 18 ms
[2023-03-14 07:54:35] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 10 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 14 ms
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:54:35] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Drop transitions removed 10 transitions
Trivial Post-agglo rules discarded 10 transitions
Performed 10 trivial Post agglomeration. Transition count delta: 10
Iterating post reduction 0 with 10 rules applied. Total rules applied 10 place count 212 transition count 190
Reduce places removed 10 places and 0 transitions.
Iterating post reduction 1 with 10 rules applied. Total rules applied 20 place count 202 transition count 190
Performed 16 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 16 Pre rules applied. Total rules applied 20 place count 202 transition count 174
Deduced a syphon composed of 16 places in 1 ms
Reduce places removed 16 places and 0 transitions.
Iterating global reduction 2 with 32 rules applied. Total rules applied 52 place count 186 transition count 174
Discarding 4 places :
Symmetric choice reduction at 2 with 4 rule applications. Total rules 56 place count 182 transition count 170
Iterating global reduction 2 with 4 rules applied. Total rules applied 60 place count 182 transition count 170
Performed 22 Post agglomeration using F-continuation condition.Transition count delta: 22
Deduced a syphon composed of 22 places in 1 ms
Reduce places removed 22 places and 0 transitions.
Iterating global reduction 2 with 44 rules applied. Total rules applied 104 place count 160 transition count 148
Applied a total of 104 rules in 33 ms. Remains 160 /212 variables (removed 52) and now considering 148/200 (removed 52) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 33 ms. Remains : 160/212 places, 148/200 transitions.
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 18 ms
[2023-03-14 07:54:35] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:54:35] [INFO ] Input system was already deterministic with 148 transitions.
Finished random walk after 120 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=60 )
FORMULA ParamProductionCell-PT-2-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 9 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 209 transition count 197
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 209 transition count 197
Applied a total of 6 rules in 10 ms. Remains 209 /212 variables (removed 3) and now considering 197/200 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 209/212 places, 197/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 17 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 9 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 8 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 19 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 8 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 9 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 209 transition count 197
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 209 transition count 197
Applied a total of 6 rules in 9 ms. Remains 209 /212 variables (removed 3) and now considering 197/200 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 209/212 places, 197/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 8 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 4 places :
Symmetric choice reduction at 0 with 4 rule applications. Total rules 4 place count 208 transition count 196
Iterating global reduction 0 with 4 rules applied. Total rules applied 8 place count 208 transition count 196
Applied a total of 8 rules in 17 ms. Remains 208 /212 variables (removed 4) and now considering 196/200 (removed 4) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 17 ms. Remains : 208/212 places, 196/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 196 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 209 transition count 197
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 209 transition count 197
Applied a total of 6 rules in 7 ms. Remains 209 /212 variables (removed 3) and now considering 197/200 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 209/212 places, 197/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 209 transition count 197
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 209 transition count 197
Applied a total of 6 rules in 8 ms. Remains 209 /212 variables (removed 3) and now considering 197/200 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 209/212 places, 197/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 197 transitions.
Starting structural reductions in LTL mode, iteration 0 : 212/212 places, 200/200 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 209 transition count 197
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 209 transition count 197
Applied a total of 6 rules in 9 ms. Remains 209 /212 variables (removed 3) and now considering 197/200 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 10 ms. Remains : 209/212 places, 197/200 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Input system was already deterministic with 197 transitions.
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:54:36] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:54:36] [INFO ] Export to MCC of 15 properties in file /home/mcc/execution/CTLFireability.sr.xml took 5 ms.
[2023-03-14 07:54:36] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 212 places, 200 transitions and 786 arcs took 2 ms.
Total runtime 4211 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ParamProductionCell-PT-2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/367
CTLFireability

FORMULA ParamProductionCell-PT-2-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-11 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-12 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-2-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678780494091

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
++ perl -pe 's/.*\.//g'
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/367/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/367/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/367/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:388
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:469
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:397
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-2-CTLFireability-00
lola: time limit : 211 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-00
lola: result : false
lola: markings : 263
lola: fired transitions : 482
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ParamProductionCell-PT-2-CTLFireability-04
lola: time limit : 224 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 53 (type FNDP) for 34 ParamProductionCell-PT-2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 54 (type EQUN) for 34 ParamProductionCell-PT-2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 56 (type SRCH) for 34 ParamProductionCell-PT-2-CTLFireability-11
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 56 (type SRCH) for ParamProductionCell-PT-2-CTLFireability-11
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: FINISHED task # 53 (type FNDP) for ParamProductionCell-PT-2-CTLFireability-11
lola: result : true
lola: fired transitions : 53
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 54 (type EQUN) for ParamProductionCell-PT-2-CTLFireability-11 (obsolete)
sara: try reading problem file /home/mcc/execution/367/CTLFireability-54.sara.
sara: place or transition ordering is non-deterministic
lola: FINISHED task # 10 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-04
lola: result : false
lola: markings : 99320
lola: fired transitions : 283277
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 51 (type EXCL) for 50 ParamProductionCell-PT-2-CTLFireability-15
lola: time limit : 276 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-2-CTLFireability-00: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-04: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-11: DISJ true findpath

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-07: DISJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-2-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-12: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-15: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
51 CTL EXCL 5/276 2/32 ParamProductionCell-PT-2-CTLFireability-15 348438 m, 69687 m/sec, 2339277 t fired, .

Time elapsed: 6 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 51 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-15
lola: result : true
lola: markings : 348510
lola: fired transitions : 2371226
lola: time used : 5.000000
lola: memory pages used : 2
lola: LAUNCH task # 48 (type EXCL) for 47 ParamProductionCell-PT-2-CTLFireability-14
lola: time limit : 299 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-14
lola: result : false
lola: markings : 1014
lola: fired transitions : 1690
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 45 (type EXCL) for 44 ParamProductionCell-PT-2-CTLFireability-13
lola: time limit : 326 sec
lola: memory limit: 32 pages
lola: FINISHED task # 45 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-13
lola: result : true
lola: markings : 253912
lola: fired transitions : 1123463
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 42 (type EXCL) for 41 ParamProductionCell-PT-2-CTLFireability-12
lola: time limit : 359 sec
lola: memory limit: 32 pages
lola: FINISHED task # 42 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-12
lola: result : false
lola: markings : 654
lola: fired transitions : 1767
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 32 (type EXCL) for 31 ParamProductionCell-PT-2-CTLFireability-10
lola: time limit : 399 sec
lola: memory limit: 32 pages
lola: FINISHED task # 32 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-10
lola: result : true
lola: markings : 113718
lola: fired transitions : 529385
lola: time used : 1.000000
lola: memory pages used : 1
lola: LAUNCH task # 29 (type EXCL) for 28 ParamProductionCell-PT-2-CTLFireability-09
lola: time limit : 448 sec
lola: memory limit: 32 pages
lola: FINISHED task # 29 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-09
lola: result : true
lola: markings : 336
lola: fired transitions : 338
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 26 (type EXCL) for 25 ParamProductionCell-PT-2-CTLFireability-08
lola: time limit : 513 sec
lola: memory limit: 32 pages
lola: FINISHED task # 26 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-08
lola: result : true
lola: markings : 295
lola: fired transitions : 540
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 23 (type EXCL) for 18 ParamProductionCell-PT-2-CTLFireability-07
lola: time limit : 598 sec
lola: memory limit: 32 pages
lola: FINISHED task # 23 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-07
lola: result : false
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 21 (type EXCL) for 18 ParamProductionCell-PT-2-CTLFireability-07
lola: time limit : 718 sec
lola: memory limit: 32 pages
lola: FINISHED task # 21 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-07
lola: result : false
lola: markings : 67475
lola: fired transitions : 165214
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 15 ParamProductionCell-PT-2-CTLFireability-06
lola: time limit : 897 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-2-CTLFireability-00: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-04: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-07: DISJ false DISJ
ParamProductionCell-PT-2-CTLFireability-08: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-09: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-11: DISJ true findpath
ParamProductionCell-PT-2-CTLFireability-12: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-13: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-14: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-06: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 2/897 1/32 ParamProductionCell-PT-2-CTLFireability-06 190853 m, 38170 m/sec, 801274 t fired, .

Time elapsed: 11 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 16 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-06
lola: result : true
lola: markings : 348510
lola: fired transitions : 1724486
lola: time used : 4.000000
lola: memory pages used : 2
lola: LAUNCH task # 13 (type EXCL) for 12 ParamProductionCell-PT-2-CTLFireability-05
lola: time limit : 1195 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-05
lola: result : false
lola: markings : 28432
lola: fired transitions : 205701
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-2-CTLFireability-02
lola: time limit : 1793 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-2-CTLFireability-00: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-04: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-05: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-06: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-07: DISJ false DISJ
ParamProductionCell-PT-2-CTLFireability-08: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-09: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-11: DISJ true findpath
ParamProductionCell-PT-2-CTLFireability-12: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-13: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-14: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-15: CTL true CTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-2-CTLFireability-01: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-2-CTLFireability-02: CTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 3/1793 2/32 ParamProductionCell-PT-2-CTLFireability-02 267572 m, 53514 m/sec, 1279935 t fired, .

Time elapsed: 16 secs. Pages in use: 2
# running tasks: 1 of 4 Visible: 15
lola: FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-02
lola: result : false
lola: markings : 270618
lola: fired transitions : 1294169
lola: time used : 3.000000
lola: memory pages used : 2
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-2-CTLFireability-01
lola: time limit : 3584 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-2-CTLFireability-01
lola: result : false
lola: markings : 140247
lola: fired transitions : 407224
lola: time used : 1.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-2-CTLFireability-00: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-02: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-04: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-05: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-06: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-07: DISJ false DISJ
ParamProductionCell-PT-2-CTLFireability-08: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-09: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-11: DISJ true findpath
ParamProductionCell-PT-2-CTLFireability-12: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-13: CTL true CTL model checker
ParamProductionCell-PT-2-CTLFireability-14: CTL false CTL model checker
ParamProductionCell-PT-2-CTLFireability-15: CTL true CTL model checker


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ParamProductionCell-PT-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538200378"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-2.tgz
mv ParamProductionCell-PT-2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;