About the Execution of LoLa+red for ParamProductionCell-PT-0
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
543.107 | 57283.00 | 69555.00 | 646.80 | TFFTTFTTFFTFTTFT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r263-smll-167863538100361.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is ParamProductionCell-PT-0, examination is CTLCardinality
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863538100361
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 640K
-rw-r--r-- 1 mcc users 8.3K Feb 26 17:14 CTLCardinality.txt
-rw-r--r-- 1 mcc users 75K Feb 26 17:14 CTLCardinality.xml
-rw-r--r-- 1 mcc users 6.5K Feb 26 17:13 CTLFireability.txt
-rw-r--r-- 1 mcc users 46K Feb 26 17:13 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.5K Feb 25 16:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 27K Feb 25 16:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 16:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 19K Feb 25 16:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 15K Feb 26 17:15 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 135K Feb 26 17:15 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 17:14 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 81K Feb 26 17:14 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 149K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-00
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-01
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-02
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-03
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-04
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-05
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-06
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-07
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-08
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-09
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-10
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-11
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-12
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-13
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-14
FORMULA_NAME ParamProductionCell-PT-0-CTLCardinality-15
=== Now, execution of the tool begins
BK_START 1678779853230
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLCardinality
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-0
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-14 07:44:15] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLCardinality, -timeout, 360, -rebuildPNML]
[2023-03-14 07:44:15] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-14 07:44:15] [INFO ] Load time of PNML (sax parser for PT used): 98 ms
[2023-03-14 07:44:15] [INFO ] Transformed 198 places.
[2023-03-14 07:44:15] [INFO ] Transformed 176 transitions.
[2023-03-14 07:44:15] [INFO ] Found NUPN structural information;
[2023-03-14 07:44:15] [INFO ] Parsed PT model containing 198 places and 176 transitions and 730 arcs in 191 ms.
Parsed 16 properties from file /home/mcc/execution/CTLCardinality.xml in 17 ms.
FORMULA ParamProductionCell-PT-0-CTLCardinality-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA ParamProductionCell-PT-0-CTLCardinality-15 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 74 out of 198 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 198/198 places, 176/176 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 195 transition count 173
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 195 transition count 173
Applied a total of 6 rules in 42 ms. Remains 195 /198 variables (removed 3) and now considering 173/176 (removed 3) transitions.
// Phase 1: matrix 173 rows 195 cols
[2023-03-14 07:44:15] [INFO ] Computed 49 place invariants in 28 ms
[2023-03-14 07:44:16] [INFO ] Implicit Places using invariants in 414 ms returned [24, 31, 35, 36, 41, 47, 64, 65, 73, 79, 101, 115, 117, 119, 120, 161, 166, 167]
Discarding 18 places :
Implicit Place search using SMT only with invariants took 458 ms to find 18 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 177/198 places, 173/176 transitions.
Applied a total of 0 rules in 7 ms. Remains 177 /177 variables (removed 0) and now considering 173/173 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 508 ms. Remains : 177/198 places, 173/176 transitions.
Support contains 74 out of 177 places after structural reductions.
[2023-03-14 07:44:16] [INFO ] Flatten gal took : 53 ms
[2023-03-14 07:44:16] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA ParamProductionCell-PT-0-CTLCardinality-01 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-14 07:44:16] [INFO ] Flatten gal took : 24 ms
[2023-03-14 07:44:16] [INFO ] Input system was already deterministic with 173 transitions.
Support contains 65 out of 177 places (down from 74) after GAL structural reductions.
FORMULA ParamProductionCell-PT-0-CTLCardinality-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Incomplete random walk after 10000 steps, including 2 resets, run finished after 642 ms. (steps per millisecond=15 ) properties (out of 45) seen :41
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 137 ms. (steps per millisecond=72 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 102 ms. (steps per millisecond=98 ) properties (out of 4) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 54 ms. (steps per millisecond=185 ) properties (out of 4) seen :1
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 77 ms. (steps per millisecond=129 ) properties (out of 3) seen :0
Running SMT prover for 3 properties.
// Phase 1: matrix 173 rows 177 cols
[2023-03-14 07:44:17] [INFO ] Computed 31 place invariants in 4 ms
[2023-03-14 07:44:18] [INFO ] After 110ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:3
[2023-03-14 07:44:18] [INFO ] [Nat]Absence check using 25 positive place invariants in 14 ms returned sat
[2023-03-14 07:44:18] [INFO ] [Nat]Absence check using 25 positive and 6 generalized place invariants in 3 ms returned sat
[2023-03-14 07:44:18] [INFO ] After 194ms SMT Verify possible using state equation in natural domain returned unsat :1 sat :2
[2023-03-14 07:44:18] [INFO ] State equation strengthened by 59 read => feed constraints.
[2023-03-14 07:44:18] [INFO ] After 50ms SMT Verify possible using 59 Read/Feed constraints in natural domain returned unsat :1 sat :2
[2023-03-14 07:44:18] [INFO ] Deduced a trap composed of 8 places in 109 ms of which 10 ms to minimize.
[2023-03-14 07:44:18] [INFO ] Deduced a trap composed of 8 places in 91 ms of which 1 ms to minimize.
[2023-03-14 07:44:18] [INFO ] Deduced a trap composed of 7 places in 101 ms of which 2 ms to minimize.
[2023-03-14 07:44:18] [INFO ] Deduced a trap composed of 20 places in 79 ms of which 2 ms to minimize.
[2023-03-14 07:44:18] [INFO ] Deduced a trap composed of 7 places in 58 ms of which 0 ms to minimize.
[2023-03-14 07:44:18] [INFO ] Deduced a trap composed of 7 places in 48 ms of which 1 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Deduced a trap composed of 26 places in 44 ms of which 0 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Trap strengthening (SAT) tested/added 8/7 trap constraints in 629 ms
[2023-03-14 07:44:19] [INFO ] Deduced a trap composed of 7 places in 86 ms of which 1 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Deduced a trap composed of 21 places in 74 ms of which 0 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Deduced a trap composed of 17 places in 65 ms of which 0 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Deduced a trap composed of 42 places in 75 ms of which 1 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Deduced a trap composed of 40 places in 51 ms of which 1 ms to minimize.
[2023-03-14 07:44:19] [INFO ] Trap strengthening (SAT) tested/added 6/5 trap constraints in 412 ms
[2023-03-14 07:44:19] [INFO ] After 1124ms SMT Verify possible using trap constraints in natural domain returned unsat :1 sat :2
Attempting to minimize the solution found.
Minimization took 25 ms.
[2023-03-14 07:44:19] [INFO ] After 1481ms SMT Verify possible using all constraints in natural domain returned unsat :1 sat :2
Fused 3 Parikh solutions to 2 different solutions.
Parikh walk visited 0 properties in 20 ms.
Support contains 5 out of 177 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 177/177 places, 173/173 transitions.
Drop transitions removed 14 transitions
Trivial Post-agglo rules discarded 14 transitions
Performed 14 trivial Post agglomeration. Transition count delta: 14
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 177 transition count 159
Reduce places removed 14 places and 0 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 28 place count 163 transition count 159
Performed 12 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 12 Pre rules applied. Total rules applied 28 place count 163 transition count 147
Deduced a syphon composed of 12 places in 1 ms
Reduce places removed 12 places and 0 transitions.
Iterating global reduction 2 with 24 rules applied. Total rules applied 52 place count 151 transition count 147
Discarding 2 places :
Symmetric choice reduction at 2 with 2 rule applications. Total rules 54 place count 149 transition count 145
Iterating global reduction 2 with 2 rules applied. Total rules applied 56 place count 149 transition count 145
Performed 29 Post agglomeration using F-continuation condition.Transition count delta: 29
Deduced a syphon composed of 29 places in 0 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 116 place count 118 transition count 116
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 116 place count 118 transition count 115
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 118 place count 117 transition count 115
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 121 place count 115 transition count 114
Free-agglomeration rule (complex) applied 5 times.
Iterating global reduction 2 with 5 rules applied. Total rules applied 126 place count 115 transition count 109
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 2 with 5 rules applied. Total rules applied 131 place count 110 transition count 109
Applied a total of 131 rules in 59 ms. Remains 110 /177 variables (removed 67) and now considering 109/173 (removed 64) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 60 ms. Remains : 110/177 places, 109/173 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 183 ms. (steps per millisecond=54 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 75 ms. (steps per millisecond=133 ) properties (out of 2) seen :0
Incomplete Best-First random walk after 10000 steps, including 2 resets, run finished after 31 ms. (steps per millisecond=322 ) properties (out of 2) seen :1
Running SMT prover for 1 properties.
// Phase 1: matrix 109 rows 110 cols
[2023-03-14 07:44:19] [INFO ] Computed 28 place invariants in 2 ms
[2023-03-14 07:44:19] [INFO ] After 39ms SMT Verify possible using all constraints in real domain returned unsat :0 sat :0 real:1
[2023-03-14 07:44:19] [INFO ] [Nat]Absence check using 22 positive place invariants in 6 ms returned sat
[2023-03-14 07:44:19] [INFO ] [Nat]Absence check using 22 positive and 6 generalized place invariants in 3 ms returned sat
[2023-03-14 07:44:20] [INFO ] After 54ms SMT Verify possible using state equation in natural domain returned unsat :0 sat :1
[2023-03-14 07:44:20] [INFO ] State equation strengthened by 60 read => feed constraints.
[2023-03-14 07:44:20] [INFO ] After 24ms SMT Verify possible using 60 Read/Feed constraints in natural domain returned unsat :0 sat :1
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 5 places in 61 ms of which 1 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 5 places in 52 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 18 places in 54 ms of which 1 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 5 places in 50 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 6 places in 50 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 30 places in 66 ms of which 1 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 21 places in 52 ms of which 1 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 5 places in 54 ms of which 1 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 17 places in 49 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 18 places in 47 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 36 places in 49 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 28 places in 50 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Deduced a trap composed of 19 places in 45 ms of which 0 ms to minimize.
[2023-03-14 07:44:20] [INFO ] Trap strengthening (SAT) tested/added 14/13 trap constraints in 804 ms
[2023-03-14 07:44:20] [INFO ] After 839ms SMT Verify possible using trap constraints in natural domain returned unsat :0 sat :1
Attempting to minimize the solution found.
Minimization took 9 ms.
[2023-03-14 07:44:20] [INFO ] After 958ms SMT Verify possible using all constraints in natural domain returned unsat :0 sat :1
Parikh walk visited 0 properties in 8 ms.
Support contains 3 out of 110 places. Attempting structural reductions.
Starting structural reductions in REACHABILITY mode, iteration 0 : 110/110 places, 109/109 transitions.
Applied a total of 0 rules in 6 ms. Remains 110 /110 variables (removed 0) and now considering 109/109 (removed 0) transitions.
Finished structural reductions in REACHABILITY mode , in 1 iterations and 6 ms. Remains : 110/110 places, 109/109 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 18 ms. (steps per millisecond=555 ) properties (out of 1) seen :0
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 10 ms. (steps per millisecond=1000 ) properties (out of 1) seen :0
Finished probabilistic random walk after 36459 steps, run visited all 1 properties in 121 ms. (steps per millisecond=301 )
Probabilistic random walk after 36459 steps, saw 12620 distinct states, run finished after 121 ms. (steps per millisecond=301 ) properties seen :1
Successfully simplified 1 atomic propositions for a total of 12 simplifications.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 14 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 173 transitions.
Computed a total of 0 stabilizing places and 0 stable transitions
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 174 transition count 170
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 174 transition count 170
Applied a total of 6 rules in 8 ms. Remains 174 /177 variables (removed 3) and now considering 170/173 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 174/177 places, 170/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 14 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 175 transition count 171
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 175 transition count 171
Applied a total of 4 rules in 8 ms. Remains 175 /177 variables (removed 2) and now considering 171/173 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 175/177 places, 171/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 14 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 171 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 175 transition count 171
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 175 transition count 171
Applied a total of 4 rules in 8 ms. Remains 175 /177 variables (removed 2) and now considering 171/173 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 175/177 places, 171/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 13 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 14 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 171 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Drop transitions removed 14 transitions
Trivial Post-agglo rules discarded 14 transitions
Performed 14 trivial Post agglomeration. Transition count delta: 14
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 177 transition count 159
Reduce places removed 14 places and 0 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 28 place count 163 transition count 159
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 11 Pre rules applied. Total rules applied 28 place count 163 transition count 148
Deduced a syphon composed of 11 places in 1 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 50 place count 152 transition count 148
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 53 place count 149 transition count 145
Iterating global reduction 2 with 3 rules applied. Total rules applied 56 place count 149 transition count 145
Performed 29 Post agglomeration using F-continuation condition.Transition count delta: 29
Deduced a syphon composed of 29 places in 0 ms
Reduce places removed 31 places and 0 transitions.
Iterating global reduction 2 with 60 rules applied. Total rules applied 116 place count 118 transition count 116
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 116 place count 118 transition count 115
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 118 place count 117 transition count 115
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 121 place count 115 transition count 114
Applied a total of 121 rules in 29 ms. Remains 115 /177 variables (removed 62) and now considering 114/173 (removed 59) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 30 ms. Remains : 115/177 places, 114/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 114 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 174 transition count 170
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 174 transition count 170
Applied a total of 6 rules in 7 ms. Remains 174 /177 variables (removed 3) and now considering 170/173 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 174/177 places, 170/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 11 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Drop transitions removed 14 transitions
Trivial Post-agglo rules discarded 14 transitions
Performed 14 trivial Post agglomeration. Transition count delta: 14
Iterating post reduction 0 with 14 rules applied. Total rules applied 14 place count 177 transition count 159
Reduce places removed 14 places and 0 transitions.
Iterating post reduction 1 with 14 rules applied. Total rules applied 28 place count 163 transition count 159
Performed 11 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 11 Pre rules applied. Total rules applied 28 place count 163 transition count 148
Deduced a syphon composed of 11 places in 1 ms
Reduce places removed 11 places and 0 transitions.
Iterating global reduction 2 with 22 rules applied. Total rules applied 50 place count 152 transition count 148
Discarding 3 places :
Symmetric choice reduction at 2 with 3 rule applications. Total rules 53 place count 149 transition count 145
Iterating global reduction 2 with 3 rules applied. Total rules applied 56 place count 149 transition count 145
Performed 30 Post agglomeration using F-continuation condition.Transition count delta: 30
Deduced a syphon composed of 30 places in 0 ms
Reduce places removed 32 places and 0 transitions.
Iterating global reduction 2 with 62 rules applied. Total rules applied 118 place count 117 transition count 115
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 118 place count 117 transition count 114
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 120 place count 116 transition count 114
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 0 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 2 with 3 rules applied. Total rules applied 123 place count 114 transition count 113
Applied a total of 123 rules in 28 ms. Remains 114 /177 variables (removed 63) and now considering 113/173 (removed 60) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 114/177 places, 113/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 8 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 113 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 174 transition count 170
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 174 transition count 170
Applied a total of 6 rules in 6 ms. Remains 174 /177 variables (removed 3) and now considering 170/173 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 174/177 places, 170/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 16 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 175 transition count 171
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 175 transition count 171
Applied a total of 4 rules in 6 ms. Remains 175 /177 variables (removed 2) and now considering 171/173 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 175/177 places, 171/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 12 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 171 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Drop transitions removed 11 transitions
Trivial Post-agglo rules discarded 11 transitions
Performed 11 trivial Post agglomeration. Transition count delta: 11
Iterating post reduction 0 with 11 rules applied. Total rules applied 11 place count 177 transition count 162
Reduce places removed 11 places and 0 transitions.
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Iterating post reduction 1 with 12 rules applied. Total rules applied 23 place count 166 transition count 161
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 2 with 1 rules applied. Total rules applied 24 place count 165 transition count 161
Performed 10 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 10 Pre rules applied. Total rules applied 24 place count 165 transition count 151
Deduced a syphon composed of 10 places in 1 ms
Reduce places removed 10 places and 0 transitions.
Iterating global reduction 3 with 20 rules applied. Total rules applied 44 place count 155 transition count 151
Discarding 3 places :
Symmetric choice reduction at 3 with 3 rule applications. Total rules 47 place count 152 transition count 148
Iterating global reduction 3 with 3 rules applied. Total rules applied 50 place count 152 transition count 148
Performed 24 Post agglomeration using F-continuation condition.Transition count delta: 24
Deduced a syphon composed of 24 places in 0 ms
Reduce places removed 26 places and 0 transitions.
Iterating global reduction 3 with 50 rules applied. Total rules applied 100 place count 126 transition count 124
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 3 with 1 Pre rules applied. Total rules applied 100 place count 126 transition count 123
Deduced a syphon composed of 1 places in 1 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 3 with 2 rules applied. Total rules applied 102 place count 125 transition count 123
Performed 1 Post agglomeration using F-continuation condition.Transition count delta: 1
Deduced a syphon composed of 1 places in 1 ms
Ensure Unique test removed 1 places
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 3 with 3 rules applied. Total rules applied 105 place count 123 transition count 122
Applied a total of 105 rules in 28 ms. Remains 123 /177 variables (removed 54) and now considering 122/173 (removed 51) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 28 ms. Remains : 123/177 places, 122/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 7 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 7 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 122 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 175 transition count 171
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 175 transition count 171
Applied a total of 4 rules in 6 ms. Remains 175 /177 variables (removed 2) and now considering 171/173 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 175/177 places, 171/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 8 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 171 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 174 transition count 170
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 174 transition count 170
Applied a total of 6 rules in 6 ms. Remains 174 /177 variables (removed 3) and now considering 170/173 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 174/177 places, 170/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 8 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 17 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 170 transitions.
Starting structural reductions in LTL mode, iteration 0 : 177/177 places, 173/173 transitions.
Discarding 3 places :
Symmetric choice reduction at 0 with 3 rule applications. Total rules 3 place count 174 transition count 170
Iterating global reduction 0 with 3 rules applied. Total rules applied 6 place count 174 transition count 170
Applied a total of 6 rules in 7 ms. Remains 174 /177 variables (removed 3) and now considering 170/173 (removed 3) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 174/177 places, 170/173 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 8 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 9 ms
[2023-03-14 07:44:21] [INFO ] Input system was already deterministic with 170 transitions.
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:44:21] [INFO ] Flatten gal took : 10 ms
[2023-03-14 07:44:21] [INFO ] Export to MCC of 12 properties in file /home/mcc/execution/CTLCardinality.sr.xml took 4 ms.
[2023-03-14 07:44:21] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 177 places, 173 transitions and 615 arcs took 2 ms.
Total runtime 6473 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT ParamProductionCell-PT-0
BK_EXAMINATION: CTLCardinality
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/368
FORMULA ParamProductionCell-PT-0-CTLCardinality-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-13 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-08 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-00 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-04 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-06 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-0-CTLCardinality-09 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678779910513
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLCardinality -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/368/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/368/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/368/CTLCardinality.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:475
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:550
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:472
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:394
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:749
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: LAUNCH task # 25 (type EXCL) for 20 ParamProductionCell-PT-0-CTLCardinality-05
lola: time limit : 200 sec
lola: memory limit: 32 pages
lola: LAUNCH INITIAL
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: LAUNCH task # 12 (type CNST) for 9 ParamProductionCell-PT-0-CTLCardinality-04
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 12 (type CNST) for ParamProductionCell-PT-0-CTLCardinality-04
lola: result : false
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:703
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:714
lola: FINISHED task # 25 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-05
lola: result : false
lola: markings : 66470
lola: fired transitions : 232157
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 46 (type EXCL) for 45 ParamProductionCell-PT-0-CTLCardinality-13
lola: time limit : 300 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-13
lola: result : true
lola: markings : 86
lola: fired transitions : 85
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 ParamProductionCell-PT-0-CTLCardinality-12
lola: time limit : 327 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-0-CTLCardinality-05: CONJ false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-13: EXEF true state space /EXEF
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ParamProductionCell-PT-0-CTLCardinality-04: DISJ 0 2 0 0 2 0 0 0
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ParamProductionCell-PT-0-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 5/327 3/32 ParamProductionCell-PT-0-CTLCardinality-12 551856 m, 110371 m/sec, 2505701 t fired, .
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43 CTL EXCL 10/327 5/32 ParamProductionCell-PT-0-CTLCardinality-12 1072126 m, 104054 m/sec, 5341637 t fired, .
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43 CTL EXCL 15/327 7/32 ParamProductionCell-PT-0-CTLCardinality-12 1564075 m, 98389 m/sec, 8240868 t fired, .
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43 CTL EXCL 20/327 9/32 ParamProductionCell-PT-0-CTLCardinality-12 2019402 m, 91065 m/sec, 11136019 t fired, .
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 25/327 11/32 ParamProductionCell-PT-0-CTLCardinality-12 2471870 m, 90493 m/sec, 14015806 t fired, .
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ParamProductionCell-PT-0-CTLCardinality-05: CONJ false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-13: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-0-CTLCardinality-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-04: DISJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-12: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
43 CTL EXCL 30/327 13/32 ParamProductionCell-PT-0-CTLCardinality-12 2773626 m, 60351 m/sec, 16845146 t fired, .
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lola: FINISHED task # 43 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-12
lola: result : true
lola: markings : 2773672
lola: fired transitions : 17516660
lola: time used : 31.000000
lola: memory pages used : 13
lola: LAUNCH task # 40 (type EXCL) for 39 ParamProductionCell-PT-0-CTLCardinality-11
lola: time limit : 356 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-11
lola: result : false
lola: markings : 4452
lola: fired transitions : 7108
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 ParamProductionCell-PT-0-CTLCardinality-08
lola: time limit : 396 sec
lola: memory limit: 32 pages
lola: FINISHED task # 34 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-08
lola: result : false
lola: markings : 500918
lola: fired transitions : 1772260
lola: time used : 3.000000
lola: memory pages used : 3
lola: LAUNCH task # 31 (type EXCL) for 30 ParamProductionCell-PT-0-CTLCardinality-07
lola: time limit : 445 sec
lola: memory limit: 32 pages
lola: FINISHED task # 31 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-07
lola: result : true
lola: markings : 252
lola: fired transitions : 504
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-0-CTLCardinality-03
lola: time limit : 509 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-03
lola: result : true
lola: markings : 292
lola: fired transitions : 1088
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-0-CTLCardinality-02
lola: time limit : 594 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-02
lola: result : false
lola: markings : 337
lola: fired transitions : 358
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-0-CTLCardinality-00
lola: time limit : 713 sec
lola: memory limit: 32 pages
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ParamProductionCell-PT-0-CTLCardinality-02: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-05: CONJ false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-07: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-08: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-12: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-13: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-0-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-04: DISJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 1/713 1/32 ParamProductionCell-PT-0-CTLCardinality-00 169336 m, 33867 m/sec, 574589 t fired, .
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ParamProductionCell-PT-0-CTLCardinality-02: CTL false CTL model checker
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ParamProductionCell-PT-0-CTLCardinality-05: CONJ false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-07: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-08: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-12: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-13: EXEF true state space /EXEF
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ParamProductionCell-PT-0-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
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TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 6/713 5/32 ParamProductionCell-PT-0-CTLCardinality-00 1008003 m, 167733 m/sec, 3786163 t fired, .
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ParamProductionCell-PT-0-CTLCardinality-02: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-05: CONJ false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-07: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-08: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-12: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-13: EXEF true state space /EXEF
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-0-CTLCardinality-00: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-04: DISJ 0 2 0 0 2 0 0 0
ParamProductionCell-PT-0-CTLCardinality-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-0-CTLCardinality-09: CTL 0 1 0 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
1 CTL EXCL 11/713 8/32 ParamProductionCell-PT-0-CTLCardinality-00 1681282 m, 134655 m/sec, 6971844 t fired, .
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lola: FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-00
lola: result : true
lola: markings : 1945603
lola: fired transitions : 8288542
lola: time used : 13.000000
lola: memory pages used : 9
lola: LAUNCH task # 48 (type EXCL) for 9 ParamProductionCell-PT-0-CTLCardinality-04
lola: time limit : 888 sec
lola: memory limit: 32 pages
lola: FINISHED task # 48 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-04
lola: result : false
lola: markings : 14
lola: fired transitions : 13
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 16 (type EXCL) for 9 ParamProductionCell-PT-0-CTLCardinality-04
lola: time limit : 1184 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-04
lola: result : true
lola: markings : 2840
lola: fired transitions : 3775
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 ParamProductionCell-PT-0-CTLCardinality-06
lola: time limit : 1776 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-06
lola: result : true
lola: markings : 26788
lola: fired transitions : 179403
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 ParamProductionCell-PT-0-CTLCardinality-09
lola: time limit : 3553 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ParamProductionCell-PT-0-CTLCardinality-09
lola: result : false
lola: markings : 3861
lola: fired transitions : 5138
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-0-CTLCardinality-00: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-02: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-03: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-04: DISJ true DISJ
ParamProductionCell-PT-0-CTLCardinality-05: CONJ false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-06: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-07: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-08: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-09: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-11: CTL false CTL model checker
ParamProductionCell-PT-0-CTLCardinality-12: CTL true CTL model checker
ParamProductionCell-PT-0-CTLCardinality-13: EXEF true state space /EXEF
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-0"
export BK_EXAMINATION="CTLCardinality"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is ParamProductionCell-PT-0, examination is CTLCardinality"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863538100361"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-0.tgz
mv ParamProductionCell-PT-0 execution
cd execution
if [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "UpperBounds" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] || [ "CTLCardinality" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLCardinality" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLCardinality" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLCardinality.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLCardinality.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLCardinality.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLCardinality" = "ReachabilityDeadlock" ] || [ "CTLCardinality" = "QuasiLiveness" ] || [ "CTLCardinality" = "StableMarking" ] || [ "CTLCardinality" = "Liveness" ] || [ "CTLCardinality" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLCardinality"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;