About the Execution of LoLa+red for NoC3x3-PT-1A
| Execution Summary | |||||
| Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
| 7507.144 | 380527.00 | 356000.00 | 1468.60 | ??F?F?????FTT?F? | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r263-smll-167863537900226.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is NoC3x3-PT-1A, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863537900226
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 560K
-rw-r--r-- 1 mcc users 6.7K Feb 26 09:55 CTLCardinality.txt
-rw-r--r-- 1 mcc users 76K Feb 26 09:55 CTLCardinality.xml
-rw-r--r-- 1 mcc users 5.3K Feb 26 09:52 CTLFireability.txt
-rw-r--r-- 1 mcc users 49K Feb 26 09:52 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.1K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:28 LTLCardinality.txt
-rw-r--r-- 1 mcc users 26K Feb 25 16:28 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.1K Feb 25 16:28 LTLFireability.txt
-rw-r--r-- 1 mcc users 16K Feb 25 16:28 LTLFireability.xml
-rw-r--r-- 1 mcc users 13K Feb 26 09:58 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 151K Feb 26 09:58 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 7.7K Feb 26 09:56 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 65K Feb 26 09:56 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.5K Feb 25 16:28 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.6K Feb 25 16:28 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 3 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 81K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-00
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-01
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-02
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-03
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-04
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-05
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-06
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-07
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-08
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-09
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-10
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-11
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-12
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-13
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-14
FORMULA_NAME NoC3x3-PT-1A-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678748975103
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=NoC3x3-PT-1A
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-13 23:09:38] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-13 23:09:38] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-13 23:09:38] [INFO ] Load time of PNML (sax parser for PT used): 138 ms
[2023-03-13 23:09:38] [INFO ] Transformed 165 places.
[2023-03-13 23:09:38] [INFO ] Transformed 355 transitions.
[2023-03-13 23:09:38] [INFO ] Found NUPN structural information;
[2023-03-13 23:09:38] [INFO ] Parsed PT model containing 165 places and 355 transitions and 1069 arcs in 301 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 22 ms.
Initial state reduction rules removed 1 formulas.
Ensure Unique test removed 108 transitions
Reduce redundant transitions removed 108 transitions.
FORMULA NoC3x3-PT-1A-CTLFireability-12 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 84 out of 165 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 165/165 places, 247/247 transitions.
Discarding 16 places :
Symmetric choice reduction at 0 with 16 rule applications. Total rules 16 place count 149 transition count 228
Iterating global reduction 0 with 16 rules applied. Total rules applied 32 place count 149 transition count 228
Drop transitions removed 31 transitions
Redundant transition composition rules discarded 31 transitions
Iterating global reduction 0 with 31 rules applied. Total rules applied 63 place count 149 transition count 197
Applied a total of 63 rules in 59 ms. Remains 149 /165 variables (removed 16) and now considering 197/247 (removed 50) transitions.
// Phase 1: matrix 197 rows 149 cols
[2023-03-13 23:09:39] [INFO ] Computed 40 place invariants in 32 ms
[2023-03-13 23:09:39] [INFO ] Implicit Places using invariants in 469 ms returned []
[2023-03-13 23:09:39] [INFO ] Invariant cache hit.
[2023-03-13 23:09:39] [INFO ] Implicit Places using invariants and state equation in 327 ms returned []
Implicit Place search using SMT with State Equation took 867 ms to find 0 implicit places.
[2023-03-13 23:09:39] [INFO ] Invariant cache hit.
[2023-03-13 23:09:40] [INFO ] Dead Transitions using invariants and state equation in 355 ms found 0 transitions.
Starting structural reductions in LTL mode, iteration 1 : 149/165 places, 197/247 transitions.
Finished structural reductions in LTL mode , in 1 iterations and 1283 ms. Remains : 149/165 places, 197/247 transitions.
Support contains 84 out of 149 places after structural reductions.
[2023-03-13 23:09:40] [INFO ] Flatten gal took : 106 ms
[2023-03-13 23:09:40] [INFO ] Flatten gal took : 47 ms
[2023-03-13 23:09:40] [INFO ] Input system was already deterministic with 197 transitions.
Incomplete random walk after 10000 steps, including 2 resets, run finished after 891 ms. (steps per millisecond=11 ) properties (out of 72) seen :68
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 33 ms. (steps per millisecond=303 ) properties (out of 4) seen :2
Incomplete Best-First random walk after 10001 steps, including 2 resets, run finished after 17 ms. (steps per millisecond=588 ) properties (out of 2) seen :1
Finished Best-First random walk after 5168 steps, including 1 resets, run visited all 1 properties in 16 ms. (steps per millisecond=323 )
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 27 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 25 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 197 transitions.
Computed a total of 7 stabilizing places and 1 stable transitions
Graph (complete) has 458 edges and 149 vertex of which 143 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.5 ms
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 143 transition count 197
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 18 place count 131 transition count 185
Iterating global reduction 1 with 12 rules applied. Total rules applied 30 place count 131 transition count 185
Applied a total of 30 rules in 29 ms. Remains 131 /149 variables (removed 18) and now considering 185/197 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 30 ms. Remains : 131/149 places, 185/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 18 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 20 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 185 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Graph (trivial) has 79 edges and 149 vertex of which 41 / 149 are part of one of the 18 SCC in 5 ms
Free SCC test removed 23 places
Ensure Unique test removed 46 transitions
Reduce isomorphic transitions removed 46 transitions.
Graph (complete) has 412 edges and 126 vertex of which 121 are kept as prefixes of interest. Removing 5 places using SCC suffix rule.2 ms
Discarding 5 places :
Also discarding 0 output transitions
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 14 place count 109 transition count 139
Iterating global reduction 0 with 12 rules applied. Total rules applied 26 place count 109 transition count 139
Drop transitions removed 3 transitions
Redundant transition composition rules discarded 3 transitions
Iterating global reduction 0 with 3 rules applied. Total rules applied 29 place count 109 transition count 136
Applied a total of 29 rules in 51 ms. Remains 109 /149 variables (removed 40) and now considering 136/197 (removed 61) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 51 ms. Remains : 109/149 places, 136/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 12 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 14 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 136 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 143 transition count 197
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 17 place count 132 transition count 186
Iterating global reduction 1 with 11 rules applied. Total rules applied 28 place count 132 transition count 186
Applied a total of 28 rules in 9 ms. Remains 132 /149 variables (removed 17) and now considering 186/197 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 9 ms. Remains : 132/149 places, 186/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 16 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 16 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 144 transition count 197
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 16 place count 133 transition count 186
Iterating global reduction 1 with 11 rules applied. Total rules applied 27 place count 133 transition count 186
Applied a total of 27 rules in 8 ms. Remains 133 /149 variables (removed 16) and now considering 186/197 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 133/149 places, 186/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 15 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 15 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 144 transition count 197
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 16 place count 133 transition count 186
Iterating global reduction 1 with 11 rules applied. Total rules applied 27 place count 133 transition count 186
Applied a total of 27 rules in 7 ms. Remains 133 /149 variables (removed 16) and now considering 186/197 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 133/149 places, 186/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 15 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 15 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 145 transition count 197
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 16 place count 133 transition count 185
Iterating global reduction 1 with 12 rules applied. Total rules applied 28 place count 133 transition count 185
Applied a total of 28 rules in 7 ms. Remains 133 /149 variables (removed 16) and now considering 185/197 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 7 ms. Remains : 133/149 places, 185/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 14 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 15 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 185 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 143 transition count 197
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 17 place count 132 transition count 186
Iterating global reduction 1 with 11 rules applied. Total rules applied 28 place count 132 transition count 186
Applied a total of 28 rules in 7 ms. Remains 132 /149 variables (removed 17) and now considering 186/197 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 8 ms. Remains : 132/149 places, 186/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 13 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 14 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 5 places and 0 transitions.
Iterating post reduction 0 with 5 rules applied. Total rules applied 5 place count 144 transition count 197
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 16 place count 133 transition count 186
Iterating global reduction 1 with 11 rules applied. Total rules applied 27 place count 133 transition count 186
Applied a total of 27 rules in 5 ms. Remains 133 /149 variables (removed 16) and now considering 186/197 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 133/149 places, 186/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 11 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 11 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 145 transition count 197
Discarding 8 places :
Symmetric choice reduction at 1 with 8 rule applications. Total rules 12 place count 137 transition count 189
Iterating global reduction 1 with 8 rules applied. Total rules applied 20 place count 137 transition count 189
Applied a total of 20 rules in 5 ms. Remains 137 /149 variables (removed 12) and now considering 189/197 (removed 8) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 137/149 places, 189/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 9 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 10 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 189 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 143 transition count 197
Discarding 12 places :
Symmetric choice reduction at 1 with 12 rule applications. Total rules 18 place count 131 transition count 185
Iterating global reduction 1 with 12 rules applied. Total rules applied 30 place count 131 transition count 185
Applied a total of 30 rules in 5 ms. Remains 131 /149 variables (removed 18) and now considering 185/197 (removed 12) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 131/149 places, 185/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 10 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 10 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 185 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 6 places and 0 transitions.
Iterating post reduction 0 with 6 rules applied. Total rules applied 6 place count 143 transition count 197
Discarding 11 places :
Symmetric choice reduction at 1 with 11 rule applications. Total rules 17 place count 132 transition count 186
Iterating global reduction 1 with 11 rules applied. Total rules applied 28 place count 132 transition count 186
Applied a total of 28 rules in 5 ms. Remains 132 /149 variables (removed 17) and now considering 186/197 (removed 11) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 6 ms. Remains : 132/149 places, 186/197 transitions.
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 9 ms
[2023-03-13 23:09:42] [INFO ] Flatten gal took : 10 ms
[2023-03-13 23:09:42] [INFO ] Input system was already deterministic with 186 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Graph (trivial) has 83 edges and 149 vertex of which 44 / 149 are part of one of the 19 SCC in 1 ms
Free SCC test removed 25 places
Ensure Unique test removed 50 transitions
Reduce isomorphic transitions removed 50 transitions.
Graph (complete) has 408 edges and 124 vertex of which 118 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 0 output transitions
Reduce places removed 1 places and 1 transitions.
Reduce places removed 6 places and 0 transitions.
Ensure Unique test removed 5 transitions
Reduce isomorphic transitions removed 5 transitions.
Drop transitions removed 13 transitions
Trivial Post-agglo rules discarded 13 transitions
Performed 13 trivial Post agglomeration. Transition count delta: 13
Iterating post reduction 0 with 24 rules applied. Total rules applied 26 place count 111 transition count 128
Reduce places removed 13 places and 0 transitions.
Iterating post reduction 1 with 13 rules applied. Total rules applied 39 place count 98 transition count 128
Discarding 11 places :
Symmetric choice reduction at 2 with 11 rule applications. Total rules 50 place count 87 transition count 117
Iterating global reduction 2 with 11 rules applied. Total rules applied 61 place count 87 transition count 117
Drop transitions removed 14 transitions
Redundant transition composition rules discarded 14 transitions
Iterating global reduction 2 with 14 rules applied. Total rules applied 75 place count 87 transition count 103
Applied a total of 75 rules in 19 ms. Remains 87 /149 variables (removed 62) and now considering 103/197 (removed 94) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 19 ms. Remains : 87/149 places, 103/197 transitions.
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 5 ms
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 6 ms
[2023-03-13 23:09:43] [INFO ] Input system was already deterministic with 103 transitions.
Finished random walk after 65 steps, including 0 resets, run visited all 1 properties in 2 ms. (steps per millisecond=32 )
FORMULA NoC3x3-PT-1A-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL RANDOM_WALK
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 3 places and 0 transitions.
Iterating post reduction 0 with 3 rules applied. Total rules applied 3 place count 146 transition count 197
Discarding 10 places :
Symmetric choice reduction at 1 with 10 rule applications. Total rules 13 place count 136 transition count 187
Iterating global reduction 1 with 10 rules applied. Total rules applied 23 place count 136 transition count 187
Applied a total of 23 rules in 5 ms. Remains 136 /149 variables (removed 13) and now considering 187/197 (removed 10) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 5 ms. Remains : 136/149 places, 187/197 transitions.
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 8 ms
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 9 ms
[2023-03-13 23:09:43] [INFO ] Input system was already deterministic with 187 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Graph (trivial) has 74 edges and 149 vertex of which 40 / 149 are part of one of the 18 SCC in 0 ms
Free SCC test removed 22 places
Ensure Unique test removed 44 transitions
Reduce isomorphic transitions removed 44 transitions.
Graph (complete) has 414 edges and 127 vertex of which 121 are kept as prefixes of interest. Removing 6 places using SCC suffix rule.1 ms
Discarding 6 places :
Also discarding 0 output transitions
Discarding 12 places :
Symmetric choice reduction at 0 with 12 rule applications. Total rules 14 place count 109 transition count 141
Iterating global reduction 0 with 12 rules applied. Total rules applied 26 place count 109 transition count 141
Drop transitions removed 2 transitions
Redundant transition composition rules discarded 2 transitions
Iterating global reduction 0 with 2 rules applied. Total rules applied 28 place count 109 transition count 139
Applied a total of 28 rules in 16 ms. Remains 109 /149 variables (removed 40) and now considering 139/197 (removed 58) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 16 ms. Remains : 109/149 places, 139/197 transitions.
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 6 ms
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 6 ms
[2023-03-13 23:09:43] [INFO ] Input system was already deterministic with 139 transitions.
Starting structural reductions in LTL mode, iteration 0 : 149/149 places, 197/197 transitions.
Reduce places removed 4 places and 0 transitions.
Iterating post reduction 0 with 4 rules applied. Total rules applied 4 place count 145 transition count 197
Discarding 9 places :
Symmetric choice reduction at 1 with 9 rule applications. Total rules 13 place count 136 transition count 188
Iterating global reduction 1 with 9 rules applied. Total rules applied 22 place count 136 transition count 188
Applied a total of 22 rules in 4 ms. Remains 136 /149 variables (removed 13) and now considering 188/197 (removed 9) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 4 ms. Remains : 136/149 places, 188/197 transitions.
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 8 ms
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 8 ms
[2023-03-13 23:09:43] [INFO ] Input system was already deterministic with 188 transitions.
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 9 ms
[2023-03-13 23:09:43] [INFO ] Flatten gal took : 10 ms
[2023-03-13 23:09:43] [INFO ] Export to MCC of 14 properties in file /home/mcc/execution/CTLFireability.sr.xml took 4 ms.
[2023-03-13 23:09:43] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 149 places, 197 transitions and 653 arcs took 2 ms.
Total runtime 4648 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT NoC3x3-PT-1A
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/374
CTLFireability
FORMULA NoC3x3-PT-1A-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-1A-CTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-1A-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA NoC3x3-PT-1A-CTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678749355630
--------------------
content from stderr:
+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/374/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/374/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/374/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:544
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:451
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 1 (type EXCL) for 0 NoC3x3-PT-1A-CTLFireability-00
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: LAUNCH task # 55 (type FNDP) for 10 NoC3x3-PT-1A-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 56 (type EQUN) for 10 NoC3x3-PT-1A-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 58 (type SRCH) for 10 NoC3x3-PT-1A-CTLFireability-02
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: FINISHED task # 55 (type FNDP) for NoC3x3-PT-1A-CTLFireability-02
lola: result : true
lola: fired transitions : 3
lola: tried executions : 1
lola: time used : 0.000000
lola: memory pages used : 0
lola: CANCELED task # 56 (type EQUN) for NoC3x3-PT-1A-CTLFireability-02 (obsolete)
lola: CANCELED task # 58 (type SRCH) for NoC3x3-PT-1A-CTLFireability-02 (obsolete)
lola: rewrite Frontend/Parser/formula_rewrite.k:721
lola: rewrite Frontend/Parser/formula_rewrite.k:787
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 58 (type SRCH) for NoC3x3-PT-1A-CTLFireability-02
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: planning for (null) stopped (result already fixed).
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/374/CTLFireability-56.sara.
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: FINISHED task # 56 (type EQUN) for NoC3x3-PT-1A-CTLFireability-02
lola: result : true
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
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lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
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lola: FINISHED task # 62 (type SRCH) for NoC3x3-PT-1A-CTLFireability-01
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lola: CANCELED task # 60 (type EQUN) for NoC3x3-PT-1A-CTLFireability-01 (obsolete)
sara: try reading problem file /home/mcc/execution/374/CTLFireability-60.sara.
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NoC3x3-PT-1A-CTLFireability-04: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-10: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-1A-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-01: CONJ 0 0 1 0 5 0 0 1
NoC3x3-PT-1A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
NoC3x3-PT-1A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-1A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 AGEF EXCL 20/1635 18/32 NoC3x3-PT-1A-CTLFireability-01 4430378 m, 218174 m/sec, 12321257 t fired, .
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NoC3x3-PT-1A-CTLFireability-02: CONJ false findpath
NoC3x3-PT-1A-CTLFireability-04: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-10: CTL false CTL model checker
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NoC3x3-PT-1A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
NoC3x3-PT-1A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-09: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-1A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 AGEF EXCL 25/1635 22/32 NoC3x3-PT-1A-CTLFireability-01 5526777 m, 219279 m/sec, 15413491 t fired, .
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NoC3x3-PT-1A-CTLFireability-02: CONJ false findpath
NoC3x3-PT-1A-CTLFireability-04: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-10: CTL false CTL model checker
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NoC3x3-PT-1A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
NoC3x3-PT-1A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-1A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-1A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 AGEF EXCL 30/1635 27/32 NoC3x3-PT-1A-CTLFireability-01 6650177 m, 224680 m/sec, 18526530 t fired, .
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NoC3x3-PT-1A-CTLFireability-02: CONJ false findpath
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NoC3x3-PT-1A-CTLFireability-10: CTL false CTL model checker
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NoC3x3-PT-1A-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
NoC3x3-PT-1A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-1A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
NoC3x3-PT-1A-CTLFireability-15: CTL 0 0 0 0 1 0 1 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
6 AGEF EXCL 35/1635 31/32 NoC3x3-PT-1A-CTLFireability-01 7742451 m, 218454 m/sec, 21605501 t fired, .
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NoC3x3-PT-1A-CTLFireability-02: CONJ false findpath
NoC3x3-PT-1A-CTLFireability-04: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-10: CTL false CTL model checker
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
NoC3x3-PT-1A-CTLFireability-00: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-1A-CTLFireability-03: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-05: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-06: DISJ 0 0 0 0 3 0 1 0
NoC3x3-PT-1A-CTLFireability-07: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-08: CTL 0 0 0 0 1 0 1 0
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NoC3x3-PT-1A-CTLFireability-13: CTL 0 0 0 0 1 0 1 0
NoC3x3-PT-1A-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
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lola: LAUNCH task # 49 (type EXCL) for 48 NoC3x3-PT-1A-CTLFireability-14
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lola: result : false
lola: markings : 2
lola: fired transitions : 2
lola: time used : 0.000000
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FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NoC3x3-PT-1A-CTLFireability-00: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-01: CONJ unknown CONJ
NoC3x3-PT-1A-CTLFireability-02: CONJ false findpath
NoC3x3-PT-1A-CTLFireability-03: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-04: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-05: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-06: DISJ unknown DISJ
NoC3x3-PT-1A-CTLFireability-07: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-08: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-09: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-10: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-13: CTL unknown AGGR
NoC3x3-PT-1A-CTLFireability-14: CTL false CTL model checker
NoC3x3-PT-1A-CTLFireability-15: CTL unknown AGGR
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NoC3x3-PT-1A"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is NoC3x3-PT-1A, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863537900226"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/NoC3x3-PT-1A.tgz
mv NoC3x3-PT-1A execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;