Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r263-smll-167863537800170.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
...............
=====================================================================
Generated by BenchKit 2-5348
Executing tool lolaxred
Input is NeoElection-PT-2, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r263-smll-167863537800170
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 1.8M
-rw-r--r-- 1 mcc users 75K Feb 26 15:47 CTLCardinality.txt
-rw-r--r-- 1 mcc users 283K Feb 26 15:47 CTLCardinality.xml
-rw-r--r-- 1 mcc users 38K Feb 26 15:46 CTLFireability.txt
-rw-r--r-- 1 mcc users 158K Feb 26 15:46 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.6K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:27 LTLCardinality.txt
-rw-r--r-- 1 mcc users 43K Feb 25 16:27 LTLCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 25 16:27 LTLFireability.txt
-rw-r--r-- 1 mcc users 40K Feb 25 16:27 LTLFireability.xml
-rw-r--r-- 1 mcc users 96K Feb 26 15:49 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 343K Feb 26 15:49 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 55K Feb 26 15:48 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 223K Feb 26 15:48 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 11K Feb 25 16:27 UpperBounds.txt
-rw-r--r-- 1 mcc users 20K Feb 25 16:27 UpperBounds.xml
-rw-r--r-- 1 mcc users 5 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 332K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME NeoElection-PT-2-CTLFireability-00
FORMULA_NAME NeoElection-PT-2-CTLFireability-01
FORMULA_NAME NeoElection-PT-2-CTLFireability-02
FORMULA_NAME NeoElection-PT-2-CTLFireability-03
FORMULA_NAME NeoElection-PT-2-CTLFireability-04
FORMULA_NAME NeoElection-PT-2-CTLFireability-05
FORMULA_NAME NeoElection-PT-2-CTLFireability-06
FORMULA_NAME NeoElection-PT-2-CTLFireability-07
FORMULA_NAME NeoElection-PT-2-CTLFireability-08
FORMULA_NAME NeoElection-PT-2-CTLFireability-09
FORMULA_NAME NeoElection-PT-2-CTLFireability-10
FORMULA_NAME NeoElection-PT-2-CTLFireability-11
FORMULA_NAME NeoElection-PT-2-CTLFireability-12
FORMULA_NAME NeoElection-PT-2-CTLFireability-13
FORMULA_NAME NeoElection-PT-2-CTLFireability-14
FORMULA_NAME NeoElection-PT-2-CTLFireability-15

=== Now, execution of the tool begins

BK_START 1678734539968

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lolaxred
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=NeoElection-PT-2
Applying reductions before tool lola
Invoking reducer
Running Version 202303021504
[2023-03-13 19:09:02] [INFO ] Running its-tools with arguments : [-pnfolder, /home/mcc/execution, -examination, CTLFireability, -timeout, 360, -rebuildPNML]
[2023-03-13 19:09:02] [INFO ] Parsing pnml file : /home/mcc/execution/model.pnml
[2023-03-13 19:09:03] [INFO ] Load time of PNML (sax parser for PT used): 236 ms
[2023-03-13 19:09:03] [INFO ] Transformed 438 places.
[2023-03-13 19:09:03] [INFO ] Transformed 357 transitions.
[2023-03-13 19:09:03] [INFO ] Found NUPN structural information;
[2023-03-13 19:09:03] [INFO ] Completing missing partition info from NUPN : creating a component with [P_crashed_0, P_crashed_1, P_crashed_2, P_dead_0, P_dead_1, P_dead_2, P_electedPrimary_0, P_electedPrimary_1, P_electedPrimary_2, P_electedSecondary_0, P_electedSecondary_1, P_electedSecondary_2, P_electionFailed_0, P_electionFailed_1, P_electionFailed_2, P_electionInit_0, P_electionInit_1, P_electionInit_2, P_masterList_0_1_0, P_masterList_0_1_1, P_masterList_0_1_2, P_masterList_0_2_0, P_masterList_0_2_1, P_masterList_0_2_2, P_masterList_1_1_0, P_masterList_1_1_1, P_masterList_1_1_2, P_masterList_1_2_0, P_masterList_1_2_1, P_masterList_1_2_2, P_masterList_2_1_0, P_masterList_2_1_1, P_masterList_2_1_2, P_masterList_2_2_0, P_masterList_2_2_1, P_masterList_2_2_2, P_masterState_0_F_0, P_masterState_0_F_1, P_masterState_0_F_2, P_masterState_0_T_0, P_masterState_0_T_1, P_masterState_0_T_2, P_masterState_1_F_0, P_masterState_1_F_1, P_masterState_1_F_2, P_masterState_1_T_0, P_masterState_1_T_1, P_masterState_1_T_2, P_masterState_2_F_0, P_masterState_2_F_1, P_masterState_2_F_2, P_masterState_2_T_0, P_masterState_2_T_1, P_masterState_2_T_2, P_negotiation_0_0_NONE, P_negotiation_0_0_CO, P_negotiation_0_0_DONE, P_negotiation_0_1_NONE, P_negotiation_0_1_CO, P_negotiation_0_1_DONE, P_negotiation_0_2_NONE, P_negotiation_0_2_CO, P_negotiation_0_2_DONE, P_negotiation_1_0_NONE, P_negotiation_1_0_CO, P_negotiation_1_0_DONE, P_negotiation_1_1_NONE, P_negotiation_1_1_CO, P_negotiation_1_1_DONE, P_negotiation_1_2_NONE, P_negotiation_1_2_CO, P_negotiation_1_2_DONE, P_negotiation_2_0_NONE, P_negotiation_2_0_CO, P_negotiation_2_0_DONE, P_negotiation_2_1_NONE, P_negotiation_2_1_CO, P_negotiation_2_1_DONE, P_negotiation_2_2_NONE, P_negotiation_2_2_CO, P_negotiation_2_2_DONE, P_network_0_0_AskP_0, P_network_0_0_AskP_1, P_network_0_0_AskP_2, P_network_0_0_AnsP_0, P_network_0_0_AnsP_1, P_network_0_0_AnsP_2, P_network_0_0_RI_0, P_network_0_0_RI_1, P_network_0_0_RI_2, P_network_0_0_AI_0, P_network_0_0_AI_1, P_network_0_0_AI_2, P_network_0_0_AnnP_0, P_network_0_0_AnnP_1, P_network_0_0_AnnP_2, P_network_0_0_RP_0, P_network_0_0_RP_1, P_network_0_0_RP_2, P_network_0_1_AskP_0, P_network_0_1_AskP_1, P_network_0_1_AskP_2, P_network_0_1_AnsP_0, P_network_0_1_AnsP_1, P_network_0_1_AnsP_2, P_network_0_1_RI_0, P_network_0_1_RI_1, P_network_0_1_RI_2, P_network_0_1_AI_0, P_network_0_1_AI_1, P_network_0_1_AI_2, P_network_0_1_AnnP_0, P_network_0_1_AnnP_1, P_network_0_1_AnnP_2, P_network_0_1_RP_0, P_network_0_1_RP_1, P_network_0_1_RP_2, P_network_0_2_AskP_0, P_network_0_2_AskP_1, P_network_0_2_AskP_2, P_network_0_2_AnsP_0, P_network_0_2_AnsP_1, P_network_0_2_AnsP_2, P_network_0_2_RI_0, P_network_0_2_RI_1, P_network_0_2_RI_2, P_network_0_2_AI_0, P_network_0_2_AI_1, P_network_0_2_AI_2, P_network_0_2_AnnP_0, P_network_0_2_AnnP_1, P_network_0_2_AnnP_2, P_network_0_2_RP_0, P_network_0_2_RP_1, P_network_0_2_RP_2, P_network_1_0_AskP_0, P_network_1_0_AskP_1, P_network_1_0_AskP_2, P_network_1_0_AnsP_0, P_network_1_0_AnsP_1, P_network_1_0_AnsP_2, P_network_1_0_RI_0, P_network_1_0_RI_1, P_network_1_0_RI_2, P_network_1_0_AI_0, P_network_1_0_AI_1, P_network_1_0_AI_2, P_network_1_0_AnnP_0, P_network_1_0_AnnP_1, P_network_1_0_AnnP_2, P_network_1_0_RP_0, P_network_1_0_RP_1, P_network_1_0_RP_2, P_network_1_1_AskP_0, P_network_1_1_AskP_1, P_network_1_1_AskP_2, P_network_1_1_AnsP_0, P_network_1_1_AnsP_1, P_network_1_1_AnsP_2, P_network_1_1_RI_0, P_network_1_1_RI_1, P_network_1_1_RI_2, P_network_1_1_AI_0, P_network_1_1_AI_1, P_network_1_1_AI_2, P_network_1_1_AnnP_0, P_network_1_1_AnnP_1, P_network_1_1_AnnP_2, P_network_1_1_RP_0, P_network_1_1_RP_1, P_network_1_1_RP_2, P_network_1_2_AskP_0, P_network_1_2_AskP_1, P_network_1_2_AskP_2, P_network_1_2_AnsP_0, P_network_1_2_AnsP_1, P_network_1_2_AnsP_2, P_network_1_2_RI_0, P_network_1_2_RI_1, P_network_1_2_RI_2, P_network_1_2_AI_0, P_network_1_2_AI_1, P_network_1_2_AI_2, P_network_1_2_AnnP_0, P_network_1_2_AnnP_1, P_network_1_2_AnnP_2, P_network_1_2_RP_0, P_network_1_2_RP_1, P_network_1_2_RP_2, P_network_2_0_AskP_0, P_network_2_0_AskP_1, P_network_2_0_AskP_2, P_network_2_0_AnsP_0, P_network_2_0_AnsP_1, P_network_2_0_AnsP_2, P_network_2_0_RI_0, P_network_2_0_RI_1, P_network_2_0_RI_2, P_network_2_0_AI_0, P_network_2_0_AI_1, P_network_2_0_AI_2, P_network_2_0_AnnP_0, P_network_2_0_AnnP_1, P_network_2_0_AnnP_2, P_network_2_0_RP_0, P_network_2_0_RP_1, P_network_2_0_RP_2, P_network_2_1_AskP_0, P_network_2_1_AskP_1, P_network_2_1_AskP_2, P_network_2_1_AnsP_0, P_network_2_1_AnsP_1, P_network_2_1_AnsP_2, P_network_2_1_RI_0, P_network_2_1_RI_1, P_network_2_1_RI_2, P_network_2_1_AI_0, P_network_2_1_AI_1, P_network_2_1_AI_2, P_network_2_1_AnnP_0, P_network_2_1_AnnP_1, P_network_2_1_AnnP_2, P_network_2_1_RP_0, P_network_2_1_RP_1, P_network_2_1_RP_2, P_network_2_2_AskP_0, P_network_2_2_AskP_1, P_network_2_2_AskP_2, P_network_2_2_AnsP_0, P_network_2_2_AnsP_1, P_network_2_2_AnsP_2, P_network_2_2_RI_0, P_network_2_2_RI_1, P_network_2_2_RI_2, P_network_2_2_AI_0, P_network_2_2_AI_1, P_network_2_2_AI_2, P_network_2_2_AnnP_0, P_network_2_2_AnnP_1, P_network_2_2_AnnP_2, P_network_2_2_RP_0, P_network_2_2_RP_1, P_network_2_2_RP_2, P_poll__handlingMessage_0, P_poll__handlingMessage_1, P_poll__handlingMessage_2, P_poll__networl_0_0_AskP_0, P_poll__networl_0_0_AskP_1, P_poll__networl_0_0_AskP_2, P_poll__networl_0_0_AnsP_0, P_poll__networl_0_0_AnsP_1, P_poll__networl_0_0_AnsP_2, P_poll__networl_0_0_RI_0, P_poll__networl_0_0_RI_1, P_poll__networl_0_0_RI_2, P_poll__networl_0_0_AI_0, P_poll__networl_0_0_AI_1, P_poll__networl_0_0_AI_2, P_poll__networl_0_0_AnnP_0, P_poll__networl_0_0_AnnP_1, P_poll__networl_0_0_AnnP_2, P_poll__networl_0_0_RP_0, P_poll__networl_0_0_RP_1, P_poll__networl_0_0_RP_2, P_poll__networl_0_1_AskP_0, P_poll__networl_0_1_AskP_1, P_poll__networl_0_1_AskP_2, P_poll__networl_0_1_AnsP_0, P_poll__networl_0_1_AnsP_1, P_poll__networl_0_1_AnsP_2, P_poll__networl_0_1_RI_0, P_poll__networl_0_1_RI_1, P_poll__networl_0_1_RI_2, P_poll__networl_0_1_AI_0, P_poll__networl_0_1_AI_1, P_poll__networl_0_1_AI_2, P_poll__networl_0_1_AnnP_0, P_poll__networl_0_1_AnnP_1, P_poll__networl_0_1_AnnP_2, P_poll__networl_0_1_RP_0, P_poll__networl_0_1_RP_1, P_poll__networl_0_1_RP_2, P_poll__networl_0_2_AskP_0, P_poll__networl_0_2_AskP_1, P_poll__networl_0_2_AskP_2, P_poll__networl_0_2_AnsP_0, P_poll__networl_0_2_AnsP_1, P_poll__networl_0_2_AnsP_2, P_poll__networl_0_2_RI_0, P_poll__networl_0_2_RI_1, P_poll__networl_0_2_RI_2, P_poll__networl_0_2_AI_0, P_poll__networl_0_2_AI_1, P_poll__networl_0_2_AI_2, P_poll__networl_0_2_AnnP_0, P_poll__networl_0_2_AnnP_1, P_poll__networl_0_2_AnnP_2, P_poll__networl_0_2_RP_0, P_poll__networl_0_2_RP_1, P_poll__networl_0_2_RP_2, P_poll__networl_1_0_AskP_0, P_poll__networl_1_0_AskP_1, P_poll__networl_1_0_AskP_2, P_poll__networl_1_0_AnsP_0, P_poll__networl_1_0_AnsP_1, P_poll__networl_1_0_AnsP_2, P_poll__networl_1_0_RI_0, P_poll__networl_1_0_RI_1, P_poll__networl_1_0_RI_2, P_poll__networl_1_0_AI_0, P_poll__networl_1_0_AI_1, P_poll__networl_1_0_AI_2, P_poll__networl_1_0_AnnP_0, P_poll__networl_1_0_AnnP_1, P_poll__networl_1_0_AnnP_2, P_poll__networl_1_0_RP_0, P_poll__networl_1_0_RP_1, P_poll__networl_1_0_RP_2, P_poll__networl_1_1_AskP_0, P_poll__networl_1_1_AskP_1, P_poll__networl_1_1_AskP_2, P_poll__networl_1_1_AnsP_0, P_poll__networl_1_1_AnsP_1, P_poll__networl_1_1_AnsP_2, P_poll__networl_1_1_RI_0, P_poll__networl_1_1_RI_1, P_poll__networl_1_1_RI_2, P_poll__networl_1_1_AI_0, P_poll__networl_1_1_AI_1, P_poll__networl_1_1_AI_2, P_poll__networl_1_1_AnnP_0, P_poll__networl_1_1_AnnP_1, P_poll__networl_1_1_AnnP_2, P_poll__networl_1_1_RP_0, P_poll__networl_1_1_RP_1, P_poll__networl_1_1_RP_2, P_poll__networl_1_2_AskP_0, P_poll__networl_1_2_AskP_1, P_poll__networl_1_2_AskP_2, P_poll__networl_1_2_AnsP_0, P_poll__networl_1_2_AnsP_1, P_poll__networl_1_2_AnsP_2, P_poll__networl_1_2_RI_0, P_poll__networl_1_2_RI_1, P_poll__networl_1_2_RI_2, P_poll__networl_1_2_AI_0, P_poll__networl_1_2_AI_1, P_poll__networl_1_2_AI_2, P_poll__networl_1_2_AnnP_0, P_poll__networl_1_2_AnnP_1, P_poll__networl_1_2_AnnP_2, P_poll__networl_1_2_RP_0, P_poll__networl_1_2_RP_1, P_poll__networl_1_2_RP_2, P_poll__networl_2_0_AskP_0, P_poll__networl_2_0_AskP_1, P_poll__networl_2_0_AskP_2, P_poll__networl_2_0_AnsP_0, P_poll__networl_2_0_AnsP_1, P_poll__networl_2_0_AnsP_2, P_poll__networl_2_0_RI_0, P_poll__networl_2_0_RI_1, P_poll__networl_2_0_RI_2, P_poll__networl_2_0_AI_0, P_poll__networl_2_0_AI_1, P_poll__networl_2_0_AI_2, P_poll__networl_2_0_AnnP_0, P_poll__networl_2_0_AnnP_1, P_poll__networl_2_0_AnnP_2, P_poll__networl_2_0_RP_0, P_poll__networl_2_0_RP_1, P_poll__networl_2_0_RP_2, P_poll__networl_2_1_AskP_0, P_poll__networl_2_1_AskP_1, P_poll__networl_2_1_AskP_2, P_poll__networl_2_1_AnsP_0, P_poll__networl_2_1_AnsP_1, P_poll__networl_2_1_AnsP_2, P_poll__networl_2_1_RI_0, P_poll__networl_2_1_RI_1, P_poll__networl_2_1_RI_2, P_poll__networl_2_1_AI_0, P_poll__networl_2_1_AI_1, P_poll__networl_2_1_AI_2, P_poll__networl_2_1_AnnP_0, P_poll__networl_2_1_AnnP_1, P_poll__networl_2_1_AnnP_2, P_poll__networl_2_1_RP_0, P_poll__networl_2_1_RP_1, P_poll__networl_2_1_RP_2, P_poll__networl_2_2_AskP_0, P_poll__networl_2_2_AskP_1, P_poll__networl_2_2_AskP_2, P_poll__networl_2_2_AnsP_0, P_poll__networl_2_2_AnsP_1, P_poll__networl_2_2_AnsP_2, P_poll__networl_2_2_RI_0, P_poll__networl_2_2_RI_1, P_poll__networl_2_2_RI_2, P_poll__networl_2_2_AI_0, P_poll__networl_2_2_AI_1, P_poll__networl_2_2_AI_2, P_poll__networl_2_2_AnnP_0, P_poll__networl_2_2_AnnP_1, P_poll__networl_2_2_AnnP_2, P_poll__networl_2_2_RP_0, P_poll__networl_2_2_RP_1, P_poll__networl_2_2_RP_2, P_poll__pollEnd_0, P_poll__pollEnd_1, P_poll__pollEnd_2, P_poll__waitingMessage_0, P_poll__waitingMessage_1, P_poll__waitingMessage_2, P_polling_0, P_polling_1, P_polling_2, P_sendAnnPs__broadcasting_0_1, P_sendAnnPs__broadcasting_0_2, P_sendAnnPs__broadcasting_1_1, P_sendAnnPs__broadcasting_1_2, P_sendAnnPs__broadcasting_2_1, P_sendAnnPs__broadcasting_2_2, P_stage_0_NEG, P_stage_0_PRIM, P_stage_0_SEC, P_stage_1_NEG, P_stage_1_PRIM, P_stage_1_SEC, P_stage_2_NEG, P_stage_2_PRIM, P_stage_2_SEC, P_startNeg__broadcasting_0_1, P_startNeg__broadcasting_0_2, P_startNeg__broadcasting_1_1, P_startNeg__broadcasting_1_2, P_startNeg__broadcasting_2_1, P_startNeg__broadcasting_2_2]
[2023-03-13 19:09:03] [INFO ] Parsed PT model containing 438 places and 357 transitions and 1998 arcs in 443 ms.
Parsed 16 properties from file /home/mcc/execution/CTLFireability.xml in 37 ms.
Deduced a syphon composed of 403 places in 2 ms
Reduce places removed 405 places and 337 transitions.
Reduce places removed 5 places and 0 transitions.
Initial state reduction rules removed 1 formulas.
FORMULA NeoElection-PT-2-CTLFireability-03 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-04 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-08 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-10 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-11 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-14 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Support contains 22 out of 28 places. Attempting structural reductions.
Starting structural reductions in LTL mode, iteration 0 : 28/28 places, 20/20 transitions.
Reduce places removed 2 places and 0 transitions.
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 26 transition count 20
Applied a total of 2 rules in 18 ms. Remains 26 /28 variables (removed 2) and now considering 20/20 (removed 0) transitions.
[2023-03-13 19:09:03] [INFO ] Flow matrix only has 19 transitions (discarded 1 similar events)
// Phase 1: matrix 19 rows 26 cols
[2023-03-13 19:09:03] [INFO ] Computed 7 place invariants in 7 ms
[2023-03-13 19:09:03] [INFO ] Implicit Places using invariants in 276 ms returned [5]
Discarding 1 places :
Implicit Place search using SMT only with invariants took 344 ms to find 1 implicit places.
Starting structural reductions in LTL mode, iteration 1 : 25/28 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 25 /25 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 2 iterations and 364 ms. Remains : 25/28 places, 20/20 transitions.
Support contains 22 out of 25 places after structural reductions.
[2023-03-13 19:09:03] [INFO ] Initial state reduction rules for CTL removed 4 formulas.
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 24 ms
[2023-03-13 19:09:03] [INFO ] Initial state reduction rules for CTL removed 1 formulas.
FORMULA NeoElection-PT-2-CTLFireability-12 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-09 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-06 TRUE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-02 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
FORMULA NeoElection-PT-2-CTLFireability-00 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 8 ms
[2023-03-13 19:09:03] [INFO ] Input system was already deterministic with 20 transitions.
Support contains 20 out of 25 places (down from 22) after GAL structural reductions.
Finished random walk after 15 steps, including 0 resets, run visited all 8 properties in 11 ms. (steps per millisecond=1 )
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 6 ms
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 5 ms
[2023-03-13 19:09:03] [INFO ] Input system was already deterministic with 20 transitions.
Computed a total of 25 stabilizing places and 20 stable transitions
Complete graph has no SCC; deadlocks are unavoidable. place count 25 transition count 20
Detected that all paths lead to deadlock. Applying this knowledge to assert that all AP eventually converge (and all enablings converge to false).
AF dead knowledge conclusive for 1 formulas.
FORMULA NeoElection-PT-2-CTLFireability-15 FALSE TECHNIQUES TOPOLOGICAL INITIAL_STATE
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 20/20 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 23 transition count 18
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 23 transition count 18
Applied a total of 4 rules in 3 ms. Remains 23 /25 variables (removed 2) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 3 ms. Remains : 23/25 places, 18/20 transitions.
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 3 ms
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 4 ms
[2023-03-13 19:09:03] [INFO ] Input system was already deterministic with 18 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 20/20 transitions.
Applied a total of 0 rules in 0 ms. Remains 25 /25 variables (removed 0) and now considering 20/20 (removed 0) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 0 ms. Remains : 25/25 places, 20/20 transitions.
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 4 ms
[2023-03-13 19:09:03] [INFO ] Flatten gal took : 4 ms
[2023-03-13 19:09:04] [INFO ] Input system was already deterministic with 20 transitions.
Starting structural reductions in SI_CTL mode, iteration 0 : 25/25 places, 20/20 transitions.
Reduce places removed 2 places and 2 transitions.
Ensure Unique test removed 2 places
Iterating post reduction 0 with 2 rules applied. Total rules applied 2 place count 21 transition count 18
Performed 2 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 2 Pre rules applied. Total rules applied 2 place count 21 transition count 16
Deduced a syphon composed of 2 places in 0 ms
Reduce places removed 2 places and 0 transitions.
Iterating global reduction 1 with 4 rules applied. Total rules applied 6 place count 19 transition count 16
Discarding 2 places :
Symmetric choice reduction at 1 with 2 rule applications. Total rules 8 place count 17 transition count 14
Iterating global reduction 1 with 2 rules applied. Total rules applied 10 place count 17 transition count 14
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 1 with 1 Pre rules applied. Total rules applied 10 place count 17 transition count 13
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 1 with 2 rules applied. Total rules applied 12 place count 16 transition count 13
Reduce places removed 1 places and 1 transitions.
Iterating global reduction 1 with 1 rules applied. Total rules applied 13 place count 15 transition count 12
Reduce places removed 1 places and 0 transitions.
Iterating post reduction 1 with 1 rules applied. Total rules applied 14 place count 14 transition count 12
Performed 1 Pre agglomeration using Quasi-Persistent + Divergent Free condition..
Pre-agglomeration after 2 with 1 Pre rules applied. Total rules applied 14 place count 14 transition count 11
Deduced a syphon composed of 1 places in 0 ms
Reduce places removed 1 places and 0 transitions.
Iterating global reduction 2 with 2 rules applied. Total rules applied 16 place count 13 transition count 11
Applied a total of 16 rules in 14 ms. Remains 13 /25 variables (removed 12) and now considering 11/20 (removed 9) transitions.
Finished structural reductions in SI_CTL mode , in 1 iterations and 14 ms. Remains : 13/25 places, 11/20 transitions.
[2023-03-13 19:09:04] [INFO ] Flatten gal took : 1 ms
[2023-03-13 19:09:04] [INFO ] Flatten gal took : 2 ms
[2023-03-13 19:09:04] [INFO ] Input system was already deterministic with 11 transitions.
Starting structural reductions in LTL mode, iteration 0 : 25/25 places, 20/20 transitions.
Discarding 2 places :
Symmetric choice reduction at 0 with 2 rule applications. Total rules 2 place count 23 transition count 18
Iterating global reduction 0 with 2 rules applied. Total rules applied 4 place count 23 transition count 18
Applied a total of 4 rules in 2 ms. Remains 23 /25 variables (removed 2) and now considering 18/20 (removed 2) transitions.
Finished structural reductions in LTL mode , in 1 iterations and 2 ms. Remains : 23/25 places, 18/20 transitions.
[2023-03-13 19:09:04] [INFO ] Flatten gal took : 2 ms
[2023-03-13 19:09:04] [INFO ] Flatten gal took : 2 ms
[2023-03-13 19:09:04] [INFO ] Input system was already deterministic with 18 transitions.
[2023-03-13 19:09:04] [INFO ] Flatten gal took : 4 ms
[2023-03-13 19:09:04] [INFO ] Flatten gal took : 3 ms
[2023-03-13 19:09:04] [INFO ] Export to MCC of 4 properties in file /home/mcc/execution/CTLFireability.sr.xml took 3 ms.
[2023-03-13 19:09:04] [INFO ] Export to PNML in file /home/mcc/execution/model.sr.pnml of net with 25 places, 20 transitions and 71 arcs took 0 ms.
Total runtime 1496 ms.
There are residual formulas that ITS could not solve within timeout
starting LoLA
BK_INPUT NeoElection-PT-2
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../reducer/bin//../../lola/bin/
current directory: /home/mcc/execution/367
CTLFireability

FORMULA NeoElection-PT-2-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NeoElection-PT-2-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NeoElection-PT-2-CTLFireability-01 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA NeoElection-PT-2-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678734545361

--------------------
content from stderr:

+ ulimit -s 65536
+ [[ -z '' ]]
+ export LTSMIN_MEM_SIZE=8589934592
+ LTSMIN_MEM_SIZE=8589934592
+ export PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ PYTHONPATH=/home/mcc/BenchKit/itstools/pylibs
+ export LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
+ LD_LIBRARY_PATH=/home/mcc/BenchKit/itstools/pylibs:
++ sed s/.jar//
++ perl -pe 's/.*\.//g'
++ ls /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/plugins/fr.lip6.move.gal.application.pnmcc_1.0.0.202303021504.jar
+ VERSION=202303021504
+ echo 'Running Version 202303021504'
+ /home/mcc/BenchKit/bin//../reducer/bin//../../itstools//itstools/its-tools -pnfolder /home/mcc/execution -examination CTLFireability -timeout 360 -rebuildPNML
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/367/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/367/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/367/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:98
lola: rewrite Frontend/Parser/formula_rewrite.k:129
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:138
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: LAUNCH INITIAL
lola: LAUNCH task # 10 (type CNST) for 9 NeoElection-PT-2-CTLFireability-13
lola: time limit : 0 sec
lola: memory limit: 0 pages
lola: FINISHED task # 10 (type CNST) for NeoElection-PT-2-CTLFireability-13
lola: result : false
lola: LAUNCH task # 4 (type EXCL) for 3 NeoElection-PT-2-CTLFireability-05
lola: time limit : 1200 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 4 (type EXCL) for NeoElection-PT-2-CTLFireability-05
lola: result : false
lola: markings : 52
lola: fired transitions : 103
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 1 (type EXCL) for 0 NeoElection-PT-2-CTLFireability-01
lola: time limit : 1800 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for NeoElection-PT-2-CTLFireability-01
lola: result : true
lola: markings : 2
lola: fired transitions : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 NeoElection-PT-2-CTLFireability-07
lola: time limit : 3600 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for NeoElection-PT-2-CTLFireability-07
lola: result : true
lola: markings : 40
lola: fired transitions : 150
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open formulas

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
NeoElection-PT-2-CTLFireability-01: CTL true CTL model checker
NeoElection-PT-2-CTLFireability-05: CTL false CTL model checker
NeoElection-PT-2-CTLFireability-07: CTL true CTL model checker
NeoElection-PT-2-CTLFireability-13: INITIAL false preprocessing


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Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="NeoElection-PT-2"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lolaxred"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lolaxred"
echo " Input is NeoElection-PT-2, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r263-smll-167863537800170"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/NeoElection-PT-2.tgz
mv NeoElection-PT-2 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;