MCC'2023- Execution of r262-smll-167863537600626

About the Execution of LoLA for Peterson-PT-5

Execution Summary
Max Memory Used (MB)	Time wait (ms)	CPU Usage (ms)	I/O Wait (ms)	Computed Result	Execution Status
14266.728	3600000.00	8380440.00	8989.90	F??F?F?F?????F??	normal

Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-inpu
Waiting for the VM to be
................................
..........
================================
Generated by BenchKit 2-5348
Executing tool lola
Input is Peterson-PT-5,
Time confinement is
Memory confinement
Number of cores is 4
Run identifier is r262-smll-
================================

--------------------
preparation of the directory
/home/mcc/execution
total 4.3M
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users
-rw-r--r-- 1 mcc users 535K Mar

--------------------
content from stdout:

=== Data for post analysis

The expected result is
BOOL_VECTOR

here is the order used
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi
FORMULA_NAME Peterson-PT-5-CTLFi

=== Now, execution of the

BK_START 1679001781292

bash -c /home/mcc/BenchKit/BenchKit_head.sh
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/b
BK_TIME_CONFINEMENT=3600
BK_INPUT=Peterson-PT-5
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT Peterson-PT-5
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKi
current directory: /home/mcc/exe
CTLFireability

FORMULA Peterson-PT-5-CTLFireability-13

FORMULA Peterson-PT-5-CTLFireability-05

FORMULA Peterson-PT-5-CTLFireability-03

FORMULA Peterson-PT-5-CTLFireability-00

FORMULA Peterson-PT-5-CTLFireability-07
TIME LIMIT: Killed
MemTotal: 16393216 kB
MemFree: 1942504 kB
After kill :
MemTotal: 16393216 kB
MemFree: 16163292 kB

BK_TIME_CONFINEMENT_REACHED

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file
lola: reading net from
lola: reading pnml
lola: PNML file contains
lola: finished parsing
lola: closed net file
lola: Reading formula.
lola: Using XML format
lola: reading XML formula
lola: reading formula
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: RELEASE
lola: RELEASE
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Rule S: 0 transitions
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: LAUNCH task # 47
lola: time limit : 154 sec
lola: memory limit: 32 pages
lola: Created skeleton
lola: Created skeleton
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: LAUNCH task # 56
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 57
lola: time limit :
lola: memory limit: 5 pages
lola: LAUNCH task # 59
lola: time limit :
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: FINISHED task #
lola: result
lola: time used :
lola: memory pages used :
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
sara: try reading problem
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
sara: place or transition
lola: Created skeleton
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
lola: rewrite Frontend/Parser/
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
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TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 5/196
56 EF FNDP 4/3543
57 EF STEQ 4/3543

Time elapsed: 61 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 10/196
56 EF FNDP 9/3543
57 EF STEQ 9/3543

Time elapsed: 66 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 15/196
56 EF FNDP 14/3543
57 EF STEQ 14/3543

Time elapsed: 71 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 20/196
56 EF FNDP 19/3543
57 EF STEQ 19/3543

Time elapsed: 76 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 25/196
56 EF FNDP 24/3543
57 EF STEQ 24/3543

Time elapsed: 81 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 30/196
56 EF FNDP 29/3543
57 EF STEQ 29/3543

Time elapsed: 86 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 35/196
56 EF FNDP 34/3543
57 EF STEQ 34/3543

Time elapsed: 91 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 40/196
56 EF FNDP 39/3543
57 EF STEQ 39/3543

Time elapsed: 96 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 45/196
56 EF FNDP 44/3543
57 EF STEQ 44/3543

Time elapsed: 101 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 50/196
56 EF FNDP 49/3543
57 EF STEQ 49/3543

Time elapsed: 106 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
Peterson-PT-5-CTLFireability-05:
Peterson-PT-5-CTLFireability-06:
Peterson-PT-5-CTLFireability-07:
Peterson-PT-5-CTLFireability-08:
Peterson-PT-5-CTLFireability-09:
Peterson-PT-5-CTLFireability-10:
Peterson-PT-5-CTLFireability-11:
Peterson-PT-5-CTLFireability-12:
Peterson-PT-5-CTLFireability-13:
Peterson-PT-5-CTLFireability-14:
Peterson-PT-5-CTLFireability-15:

TASK CATEGORY TYPE TIME/TLIMIT
47 CTL EXCL 55/196
56 EF FNDP 54/3543
57 EF STEQ 54/3543

Time elapsed: 111 secs.
# running tasks: 3 of 4
FINISHED FORMULA: CATEGORY

PENDING FORMULAS: CATEGORY
Peterson-PT-5-CTLFireability-00:
Peterson-PT-5-CTLFireability-01:
Peterson-PT-5-CTLFireability-02:
Peterson-PT-5-CTLFireability-03:
Peterson-PT-5-CTLFireability-04:
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1860/3543
57 EF STEQ 1860/3543

Time elapsed: 1917 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1865/3543
57 EF STEQ 1865/3543

Time elapsed: 1922 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1870/3543
57 EF STEQ 1870/3543

Time elapsed: 1927 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1875/3543
57 EF STEQ 1875/3543

Time elapsed: 1932 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1880/3543
57 EF STEQ 1880/3543

Time elapsed: 1937 secs.
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FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1885/3543
57 EF STEQ 1885/3543

Time elapsed: 1942 secs.
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FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1890/3543
57 EF STEQ 1890/3543

Time elapsed: 1947 secs.
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FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1895/3543
57 EF STEQ 1895/3543

Time elapsed: 1952 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1900/3543
57 EF STEQ 1900/3543

Time elapsed: 1957 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1905/3543
57 EF STEQ 1905/3543

Time elapsed: 1962 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1910/3543
57 EF STEQ 1910/3543

Time elapsed: 1967 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1915/3543
57 EF STEQ 1915/3543

Time elapsed: 1972 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1920/3543
57 EF STEQ 1920/3543

Time elapsed: 1977 secs.
# running tasks: 2 of 4
FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1925/3543
57 EF STEQ 1925/3543

Time elapsed: 1982 secs.
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FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1930/3543
57 EF STEQ 1930/3543

Time elapsed: 1987 secs.
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FINISHED FORMULA: CATEGORY
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PENDING FORMULAS: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1935/3543
57 EF STEQ 1935/3543

Time elapsed: 1992 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1940/3543
57 EF STEQ 1940/3543

Time elapsed: 1997 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1945/3543
57 EF STEQ 1945/3543

Time elapsed: 2002 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1950/3543
57 EF STEQ 1950/3543

Time elapsed: 2007 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1955/3543
57 EF STEQ 1955/3543

Time elapsed: 2012 secs.
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FINISHED FORMULA: CATEGORY
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1960/3543
57 EF STEQ 1960/3543

Time elapsed: 2017 secs.
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1965/3543
57 EF STEQ 1965/3543

Time elapsed: 2022 secs.
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TASK CATEGORY TYPE TIME/TLIMIT
56 EF FNDP 1970/3543
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Time elapsed: 2027 secs.
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56 EF FNDP 1980/3543
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56 EF FNDP 1985/3543
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56 EF FNDP 1990/3543
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56 EF FNDP 1995/3543
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56 EF FNDP 2000/3543
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56 EF FNDP 2005/3543
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56 EF FNDP 2010/3543
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56 EF FNDP 2015/3543
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56 EF FNDP 2020/3543
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56 EF FNDP 2025/3543
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56 EF FNDP 2030/3543
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========== file over 1MB
retrieve it from the run
t.r262-smll-167863537600626.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16 ready (probing ssh) ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................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===================================== examination is CTLFireability 3600 seconds is 16384 MBytes 167863537600626 ===================================== to be used: 139K Feb 25 22:30 CTLCardinality.txt 565K Feb 25 22:30 CTLCardinality.xml 124K Feb 25 22:22 CTLFireability.txt 584K Feb 25 22:22 CTLFireability.xml 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml 6.5K Jan 29 11:40 GenericPropertiesVerdict.xml 64K Feb 25 16:31 LTLCardinality.txt 201K Feb 25 16:31 LTLCardinality.xml 48K Feb 25 16:31 LTLFireability.txt 166K Feb 25 16:31 LTLFireability.xml 161K Feb 25 22:46 ReachabilityCardinality.txt 668K Feb 25 22:46 ReachabilityCardinality.xml 189K Feb 25 22:38 ReachabilityFireability.txt 841K Feb 25 22:38 ReachabilityFireability.xml 17K Feb 25 16:31 UpperBounds.txt 36K Feb 25 16:31 UpperBounds.xml 5 Mar 5 18:23 equiv_col 2 Mar 5 18:23 instance 6 Mar 5 18:23 iscolored 5 18:23 model.pnml generated by BenchKit (invocation template) a vector of booleans to build the result vector(from text file) reability-00 reability-01 reability-02 reability-03 reability-04 reability-05 reability-06 reability-07 reability-08 reability-09 reability-10 reability-11 reability-12 reability-13 reability-14 reability-15 tool begins 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N in/ t/bin//../lola/bin/ cution FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT by timeout after 3600 seconds (--pnmlnet) /home/mcc/execution/model.pnml place/transition net /home/mcc/execution/model.pnml (--xmlformula) from /home/mcc/execution/CTLFireability.xml formula_rewrite.k:553 formula_rewrite.k:253 formula_rewrite.k:250 formula_rewrite.k:253 formula_rewrite.k:253 formula_rewrite.k:445 formula_rewrite.k:454 formula_rewrite.k:445 formula_rewrite.k:388 formula_rewrite.k:388 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:253 formula_rewrite.k:325 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:250 formula_rewrite.k:250 formula_rewrite.k:314 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:460 formula_rewrite.k:550 formula_rewrite.k:250 formula_rewrite.k:325 formula_rewrite.k:337 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:314 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:322 formula_rewrite.k:334 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:296 formula_rewrite.k:314 formula_rewrite.k:325 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:322 formula_rewrite.k:331 formula_rewrite.k:296 formula_rewrite.k:317 formula_rewrite.k:325 formula_rewrite.k:328 formula_rewrite.k:299 formula_rewrite.k:322 formula_rewrite.k:337 formula_rewrite.k:296 formula_rewrite.k:296 formula_rewrite.k:250 in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. removed,0 places removed in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. in 0.000000 secs. formula_rewrite.k:806 formula_rewrite.k:808 (type EXCL) for 46 Peterson-PT-5-CTLFireability-14 in 0.000000 secs. in 0.000000 secs. in 1.000000 secs. formula_rewrite.k:806 formula_rewrite.k:811 formula_rewrite.k:809 formula_rewrite.k:813 formula_rewrite.k:808 formula_rewrite.k:806 formula_rewrite.k:815 formula_rewrite.k:807 formula_rewrite.k:808 formula_rewrite.k:711 formula_rewrite.k:811 formula_rewrite.k:807 formula_rewrite.k:807 formula_rewrite.k:807 formula_rewrite.k:813 formula_rewrite.k:813 formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:807 formula_rewrite.k:806 formula_rewrite.k:808 formula_rewrite.k:806 formula_rewrite.k:809 formula_rewrite.k:711 formula_rewrite.k:711 (type FNDP) for 40 Peterson-PT-5-CTLFireability-12 32000000 sec (type EQUN) for 40 Peterson-PT-5-CTLFireability-12 32000000 sec (type SRCH) for 40 Peterson-PT-5-CTLFireability-12 32000000 sec formula_rewrite.k:711 in 0.000000 secs. formula_rewrite.k:813 formula_rewrite.k:809 formula_rewrite.k:811 formula_rewrite.k:807 59 (type SRCH) for Peterson-PT-5-CTLFireability-12 : unknown 0.000000 1 formula_rewrite.k:812 formula_rewrite.k:812 formula_rewrite.k:807 formula_rewrite.k:806 formula_rewrite.k:811 formula_rewrite.k:807 formula_rewrite.k:807 formula_rewrite.k:807 formula_rewrite.k:814 file /home/mcc/execution/CTLFireability-57.sara. formula_rewrite.k:808 formula_rewrite.k:812 formula_rewrite.k:807 formula_rewrite.k:810 formula_rewrite.k:813 formula_rewrite.k:811 formula_rewrite.k:807 formula_rewrite.k:806 formula_rewrite.k:810 formula_rewrite.k:811 formula_rewrite.k:813 formula_rewrite.k:811 formula_rewrite.k:815 ordering is non-deterministic in 0.000000 secs. formula_rewrite.k:811 formula_rewrite.k:815 formula_rewrite.k:806 formula_rewrite.k:813 formula_rewrite.k:814 formula_rewrite.k:811 formula_rewrite.k:813 formula_rewrite.k:812 formula_rewrite.k:806 formula_rewrite.k:812 formula_rewrite.k:811 formula_rewrite.k:807 formula_rewrite.k:807 formula_rewrite.k:811 formula_rewrite.k:807 formula_rewrite.k:806 formula_rewrite.k:808 formula_rewrite.k:814 formula_rewrite.k:813 formula_rewrite.k:812 formula_rewrite.k:811 formula_rewrite.k:809 formula_rewrite.k:749 formula_rewrite.k:787 formula_rewrite.k:811 formula_rewrite.k:810 formula_rewrite.k:811 formula_rewrite.k:814 formula_rewrite.k:806 formula_rewrite.k:808 formula_rewrite.k:810 formula_rewrite.k:807 formula_rewrite.k:815 formula_rewrite.k:810 formula_rewrite.k:811 formula_rewrite.k:810 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-5-CTLFireability-14 506083 m, 101216 m/sec, 3034725 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 208732 t fired, 1 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 3 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-14 1062034 m, 111190 m/sec, 6371868 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 468307 t fired, 1 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 6 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-5-CTLFireability-14 1583924 m, 104378 m/sec, 9503406 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 727218 t fired, 1 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 8 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-14 2099276 m, 103070 m/sec, 12595198 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 985735 t fired, 1 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 10 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-5-CTLFireability-14 2614583 m, 103061 m/sec, 15687087 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 1241786 t fired, 2 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 13 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-14 3120733 m, 101230 m/sec, 18724139 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 1497216 t fired, 2 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 15 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-14 3640222 m, 103897 m/sec, 21841045 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 1754397 t fired, 2 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 17 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-14 4125394 m, 97034 m/sec, 24751872 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 2024447 t fired, 3 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 20 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-14 4582803 m, 91481 m/sec, 27496585 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 2291973 t fired, 3 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 22 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-14 5057625 m, 94964 m/sec, 30345333 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 2547402 t fired, 3 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 24 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-14 5512993 m, 91073 m/sec, 33077610 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 2803037 t fired, 3 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 26 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-5-CTLFireability-14 5974563 m, 92314 m/sec, 35847184 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 3056987 t fired, 4 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 28 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-5-CTLFireability-14 6448720 m, 94831 m/sec, 38691657 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 3312995 t fired, 4 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 30 Visible: 16 VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 1 0 1 0 0 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-14 6905347 m, 91325 m/sec, 41431777 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 3569905 t fired, 4 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 47 (type EXCL) for Peterson-PT-5-CTLFireability-14 (memory limit exceeded) VALUE PRODUCED BY IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 3827409 t fired, 4 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 43 Peterson-PT-5-CTLFireability-13 44 (type EXCL) for Peterson-PT-5-CTLFireability-13 : false 237 716 0.000000 1 (type EXCL) for 37 Peterson-PT-5-CTLFireability-11 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-5-CTLFireability-11 564587 m, 112917 m/sec, 1480365 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 4084831 t fired, 5 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-11 952128 m, 77508 m/sec, 2968459 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 4343035 t fired, 5 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-5-CTLFireability-11 1269485 m, 63471 m/sec, 4398397 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 4601309 t fired, 5 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-11 1775912 m, 101285 m/sec, 5868156 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 4859623 t fired, 5 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-11 2236820 m, 92181 m/sec, 7336295 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 5120346 t fired, 6 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-11 2774159 m, 107467 m/sec, 8781772 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 5380632 t fired, 6 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-5-CTLFireability-11 3207951 m, 86758 m/sec, 10200577 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 5638698 t fired, 6 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-11 3732864 m, 104982 m/sec, 11620440 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 5897034 t fired, 6 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-11 4244580 m, 102343 m/sec, 13055759 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 6157734 t fired, 7 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-5-CTLFireability-11 4616436 m, 74371 m/sec, 14529102 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 6419304 t fired, 7 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-11 5014515 m, 79615 m/sec, 15977710 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 6680511 t fired, 7 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 38 (type EXCL) for Peterson-PT-5-CTLFireability-11 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 6942572 t fired, 7 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 34 Peterson-PT-5-CTLFireability-10 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-5-CTLFireability-10 530811 m, 106162 m/sec, 1446177 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 7204093 t fired, 8 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-10 1022000 m, 98237 m/sec, 2886020 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 7464998 t fired, 8 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-10 1503098 m, 96219 m/sec, 4330644 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 7725977 t fired, 8 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-10 2014600 m, 102300 m/sec, 5773576 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 7986676 t fired, 8 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-10 2531151 m, 103310 m/sec, 7191503 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 8247470 t fired, 9 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-10 2955481 m, 84866 m/sec, 8607992 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 8508551 t fired, 9 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-5-CTLFireability-10 3473636 m, 103631 m/sec, 9994818 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 8769324 t fired, 9 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-10 3942932 m, 93859 m/sec, 11402002 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 9030324 t fired, 10 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-10 4441736 m, 99760 m/sec, 12773974 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 9292184 t fired, 10 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-10 4879294 m, 87511 m/sec, 14171441 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 9552373 t fired, 10 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 35 (type EXCL) for Peterson-PT-5-CTLFireability-10 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 9820558 t fired, 10 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 31 Peterson-PT-5-CTLFireability-09 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-5-CTLFireability-09 433903 m, 86780 m/sec, 1529542 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 10091240 t fired, 11 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-09 783099 m, 69839 m/sec, 3052649 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 10351685 t fired, 11 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-5-CTLFireability-09 1066971 m, 56774 m/sec, 4555447 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 10610661 t fired, 11 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-5-CTLFireability-09 1350625 m, 56730 m/sec, 6027554 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 10869708 t fired, 11 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-09 1752647 m, 80404 m/sec, 7542787 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 11129734 t fired, 12 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-09 2122076 m, 73885 m/sec, 9052628 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 11388798 t fired, 12 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-5-CTLFireability-09 2393503 m, 54285 m/sec, 10544765 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 11648203 t fired, 12 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-09 2662294 m, 53758 m/sec, 12017317 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 11907089 t fired, 12 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-09 2941850 m, 55911 m/sec, 13488558 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 12166052 t fired, 13 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-09 3202905 m, 52211 m/sec, 14932014 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 12425113 t fired, 13 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-5-CTLFireability-09 3603086 m, 80036 m/sec, 16435738 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 12683809 t fired, 13 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-09 3944062 m, 68195 m/sec, 17934151 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 12942424 t fired, 13 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-09 4216476 m, 54482 m/sec, 19410784 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 13200336 t fired, 14 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-5-CTLFireability-09 4537887 m, 64282 m/sec, 20888664 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 13458494 t fired, 14 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 32 (type EXCL) for Peterson-PT-5-CTLFireability-09 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 2 0 0 2 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 13715049 t fired, 14 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 24 Peterson-PT-5-CTLFireability-08 29 (type EXCL) for Peterson-PT-5-CTLFireability-08 : true 237 242 0.000000 1 (type EXCL) for 24 Peterson-PT-5-CTLFireability-08 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-5-CTLFireability-08 445945 m, 89189 m/sec, 1568921 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 13974895 t fired, 14 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 of lp_solve (at job 8107) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-08 803548 m, 71520 m/sec, 3115258 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 14236359 t fired, 15 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-5-CTLFireability-08 1091893 m, 57669 m/sec, 4635792 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 14496981 t fired, 15 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-08 1379360 m, 57493 m/sec, 6121497 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 14758214 t fired, 15 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-08 1786688 m, 81465 m/sec, 7656200 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 15019207 t fired, 16 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-08 2163658 m, 75394 m/sec, 9175977 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 15279152 t fired, 16 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-08 2438802 m, 55028 m/sec, 10687645 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 15538903 t fired, 16 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-5-CTLFireability-08 2711333 m, 54506 m/sec, 12168875 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 15797934 t fired, 16 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-5-CTLFireability-08 2998955 m, 57524 m/sec, 13632151 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 16055314 t fired, 17 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-08 3284273 m, 57063 m/sec, 15113859 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 16313617 t fired, 17 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-5-CTLFireability-08 3707090 m, 84563 m/sec, 16621271 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 16571418 t fired, 17 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-08 4031961 m, 64974 m/sec, 18107865 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 16829007 t fired, 17 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-08 4312854 m, 56178 m/sec, 19568260 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 17088050 t fired, 18 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 1 0 3 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-08 4675501 m, 72529 m/sec, 21047333 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 17348339 t fired, 18 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 27 (type EXCL) for Peterson-PT-5-CTLFireability-08 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 17609220 t fired, 18 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 18 Peterson-PT-5-CTLFireability-06 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Peterson-PT-5-CTLFireability-06 270669 m, 54133 m/sec, 1309930 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 17869282 t fired, 18 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-5-CTLFireability-06 375182 m, 20902 m/sec, 2732047 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 18129346 t fired, 19 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-5-CTLFireability-06 503681 m, 25699 m/sec, 4140139 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 18387744 t fired, 19 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-5-CTLFireability-06 637014 m, 26666 m/sec, 5527616 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 18645434 t fired, 19 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-06 780261 m, 28649 m/sec, 6893213 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 18902503 t fired, 19 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-06 952552 m, 34458 m/sec, 8176022 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 19161094 t fired, 20 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-06 1038169 m, 17123 m/sec, 9562102 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 19421854 t fired, 20 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-5-CTLFireability-06 1086181 m, 9602 m/sec, 11049254 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 19682687 t fired, 20 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-5-CTLFireability-06 1326953 m, 48154 m/sec, 12349109 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 19943025 t fired, 20 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-06 1392846 m, 13178 m/sec, 13812713 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 20203188 t fired, 21 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-06 1493924 m, 20215 m/sec, 15203157 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 20463337 t fired, 21 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-5-CTLFireability-06 1615815 m, 24378 m/sec, 16588901 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 20723328 t fired, 21 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-06 1746013 m, 26039 m/sec, 17944307 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 20983225 t fired, 21 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-5-CTLFireability-06 1890835 m, 28964 m/sec, 19287882 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 21244290 t fired, 22 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-06 2055028 m, 32838 m/sec, 20557181 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 21504712 t fired, 22 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-06 2160919 m, 21178 m/sec, 21884304 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 21765611 t fired, 22 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-06 2303064 m, 28429 m/sec, 23307682 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 22027182 t fired, 23 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-06 2505115 m, 40410 m/sec, 24613067 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 22287531 t fired, 23 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-06 2590104 m, 16997 m/sec, 26054465 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 22546871 t fired, 23 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-06 2716289 m, 25237 m/sec, 27453754 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 22807144 t fired, 23 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-5-CTLFireability-06 2842874 m, 25317 m/sec, 28868210 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 23065839 t fired, 24 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-06 2988353 m, 29095 m/sec, 30214365 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 23323505 t fired, 24 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-5-CTLFireability-06 3158597 m, 34048 m/sec, 31448400 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 23580932 t fired, 24 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-06 3238740 m, 16028 m/sec, 32765410 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 23840409 t fired, 24 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-06 3331864 m, 18624 m/sec, 34183610 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 24097956 t fired, 25 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-06 3541971 m, 42021 m/sec, 35483585 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 24357783 t fired, 25 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-06 3643969 m, 20399 m/sec, 36895268 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 24618130 t fired, 25 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-5-CTLFireability-06 3773262 m, 25858 m/sec, 38221548 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 24877850 t fired, 25 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-06 3899097 m, 25167 m/sec, 39590747 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 25137828 t fired, 26 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-06 4041024 m, 28385 m/sec, 40969136 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 25394264 t fired, 26 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-5-CTLFireability-06 4212492 m, 34293 m/sec, 42284049 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 25649637 t fired, 26 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-06 4310326 m, 19566 m/sec, 43621695 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 25908274 t fired, 26 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-06 4352549 m, 8444 m/sec, 45060679 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 26165830 t fired, 27 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-5-CTLFireability-06 4536657 m, 36821 m/sec, 46435536 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 26427547 t fired, 27 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-5-CTLFireability-06 4708313 m, 34331 m/sec, 47728953 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 26688331 t fired, 27 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-06 4798447 m, 18026 m/sec, 49161662 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 26947543 t fired, 27 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 19 (type EXCL) for Peterson-PT-5-CTLFireability-06 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 27212521 t fired, 28 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 15 Peterson-PT-5-CTLFireability-05 16 (type EXCL) for Peterson-PT-5-CTLFireability-05 : false 1344 1840 0.000000 1 (type EXCL) for 12 Peterson-PT-5-CTLFireability-04 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Peterson-PT-5-CTLFireability-04 234594 m, 46918 m/sec, 1570611 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 27468859 t fired, 28 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-5-CTLFireability-04 459663 m, 45013 m/sec, 3123397 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 27725583 t fired, 28 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-5-CTLFireability-04 687612 m, 45589 m/sec, 4655962 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 27983983 t fired, 28 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-04 906634 m, 43804 m/sec, 6184870 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 28243137 t fired, 29 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-5-CTLFireability-04 1122816 m, 43236 m/sec, 7686017 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 28504681 t fired, 29 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-5-CTLFireability-04 1339482 m, 43333 m/sec, 9160866 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 28766186 t fired, 29 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-04 1553944 m, 42892 m/sec, 10628249 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 29027784 t fired, 30 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-04 1761171 m, 41445 m/sec, 12090072 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 29290220 t fired, 30 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-5-CTLFireability-04 1970263 m, 41818 m/sec, 13556782 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 29552811 t fired, 30 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-04 2180282 m, 42003 m/sec, 15022736 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 29814882 t fired, 30 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-5-CTLFireability-04 2392401 m, 42423 m/sec, 16508634 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 30076436 t fired, 31 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-04 2613655 m, 44250 m/sec, 18004182 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 30336551 t fired, 31 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-04 2826383 m, 42545 m/sec, 19488798 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 30594524 t fired, 31 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-5-CTLFireability-04 3034400 m, 41603 m/sec, 20937230 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 30853255 t fired, 31 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-04 3251680 m, 43456 m/sec, 22409481 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 31112411 t fired, 32 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-04 3460071 m, 41678 m/sec, 23865179 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 31371693 t fired, 32 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-5-CTLFireability-04 3664158 m, 40817 m/sec, 25297068 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 31631754 t fired, 32 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-04 3875386 m, 42245 m/sec, 26771597 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 31891921 t fired, 32 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-5-CTLFireability-04 4081763 m, 41275 m/sec, 28212860 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 32151496 t fired, 33 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-04 4288993 m, 41446 m/sec, 29670130 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 32408865 t fired, 33 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-5-CTLFireability-04 4503799 m, 42961 m/sec, 31129512 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 32667373 t fired, 33 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-04 4721909 m, 43622 m/sec, 32611061 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 32925715 t fired, 33 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-5-CTLFireability-04 4929041 m, 41426 m/sec, 34046279 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 33183806 t fired, 34 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-04 5139647 m, 42121 m/sec, 35506002 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 33441727 t fired, 34 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 13 (type EXCL) for Peterson-PT-5-CTLFireability-04 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 33699127 t fired, 34 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 9 Peterson-PT-5-CTLFireability-03 10 (type EXCL) for Peterson-PT-5-CTLFireability-03 : false 266313 351321 1.000000 2 (type EXCL) for 3 Peterson-PT-5-CTLFireability-01 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Peterson-PT-5-CTLFireability-01 260493 m, 52098 m/sec, 1024794 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 33957891 t fired, 34 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-5-CTLFireability-01 421781 m, 32257 m/sec, 2549821 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 34217956 t fired, 35 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-5-CTLFireability-01 588378 m, 33319 m/sec, 4049671 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 34478123 t fired, 35 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-01 755181 m, 33360 m/sec, 5527653 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 34737964 t fired, 35 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-01 928695 m, 34702 m/sec, 6971995 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 34998114 t fired, 35 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-01 1048985 m, 24058 m/sec, 8493019 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 35260216 t fired, 36 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-5-CTLFireability-01 1242709 m, 38744 m/sec, 9969133 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 35522581 t fired, 36 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-01 1384007 m, 28259 m/sec, 11485149 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 35784604 t fired, 36 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-5-CTLFireability-01 1542843 m, 31767 m/sec, 12945956 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 36046697 t fired, 37 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-01 1704909 m, 32413 m/sec, 14401773 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 36306669 t fired, 37 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 13/32 Peterson-PT-5-CTLFireability-01 1868638 m, 32745 m/sec, 15853820 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 36566567 t fired, 37 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-01 2035514 m, 33375 m/sec, 17269721 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 36824047 t fired, 37 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-01 2151276 m, 23152 m/sec, 18725229 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 37081793 t fired, 38 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 16/32 Peterson-PT-5-CTLFireability-01 2386498 m, 47044 m/sec, 20182571 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 37341441 t fired, 38 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-01 2561664 m, 35033 m/sec, 21685918 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 37601202 t fired, 38 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-01 2728806 m, 33428 m/sec, 23174340 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 37860764 t fired, 38 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 19/32 Peterson-PT-5-CTLFireability-01 2898799 m, 33998 m/sec, 24702666 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 38118514 t fired, 39 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-01 3065811 m, 33402 m/sec, 26163109 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 38375599 t fired, 39 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-5-CTLFireability-01 3208264 m, 28490 m/sec, 27604870 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 38633476 t fired, 39 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-01 3332607 m, 24868 m/sec, 29100124 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 38890665 t fired, 39 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-01 3561308 m, 45740 m/sec, 30532692 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 39149161 t fired, 40 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 25/32 Peterson-PT-5-CTLFireability-01 3720895 m, 31917 m/sec, 31962135 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 39408183 t fired, 40 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-01 3883751 m, 32571 m/sec, 33432760 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 39668835 t fired, 40 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-01 4046132 m, 32476 m/sec, 34868563 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 39929604 t fired, 40 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 28/32 Peterson-PT-5-CTLFireability-01 4214772 m, 33728 m/sec, 36266199 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 40189663 t fired, 41 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-01 4332358 m, 23517 m/sec, 37746702 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 40449463 t fired, 41 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-5-CTLFireability-01 4447709 m, 23070 m/sec, 39233489 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 40709477 t fired, 41 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-5-CTLFireability-01 4700750 m, 50608 m/sec, 40632612 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 40970317 t fired, 41 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 1 0 1 0 0 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-01 4868273 m, 33504 m/sec, 42135029 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 41229011 t fired, 42 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 4 (type EXCL) for Peterson-PT-5-CTLFireability-01 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 1 2 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 41489619 t fired, 42 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 0 Peterson-PT-5-CTLFireability-00 1 (type EXCL) for Peterson-PT-5-CTLFireability-00 : false 252 257 0.000000 1 (type EXCL) for 40 Peterson-PT-5-CTLFireability-12 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 41744998 t fired, 42 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 1/32 Peterson-PT-5-CTLFireability-12 205767 m, 41153 m/sec, 604315 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 42000721 t fired, 43 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 2/32 Peterson-PT-5-CTLFireability-12 391416 m, 37129 m/sec, 1372334 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 42256936 t fired, 43 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 3/32 Peterson-PT-5-CTLFireability-12 572489 m, 36214 m/sec, 2155066 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 42514230 t fired, 43 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 3/32 Peterson-PT-5-CTLFireability-12 750686 m, 35639 m/sec, 2936928 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 42770370 t fired, 43 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 4/32 Peterson-PT-5-CTLFireability-12 927610 m, 35384 m/sec, 3687486 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 43026674 t fired, 44 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 5/32 Peterson-PT-5-CTLFireability-12 1106351 m, 35748 m/sec, 4461266 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 43282157 t fired, 44 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 5/32 Peterson-PT-5-CTLFireability-12 1285348 m, 35799 m/sec, 5259928 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 43537772 t fired, 44 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 6/32 Peterson-PT-5-CTLFireability-12 1464667 m, 35863 m/sec, 5991314 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 43795326 t fired, 44 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 7/32 Peterson-PT-5-CTLFireability-12 1646927 m, 36452 m/sec, 6663022 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 44053081 t fired, 45 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 8/32 Peterson-PT-5-CTLFireability-12 1826255 m, 35865 m/sec, 7335947 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 44308790 t fired, 45 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 8/32 Peterson-PT-5-CTLFireability-12 2012753 m, 37299 m/sec, 8091725 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 44564583 t fired, 45 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 9/32 Peterson-PT-5-CTLFireability-12 2195545 m, 36558 m/sec, 8867559 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 44820339 t fired, 45 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 10/32 Peterson-PT-5-CTLFireability-12 2378274 m, 36545 m/sec, 9645706 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 45076679 t fired, 46 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 10/32 Peterson-PT-5-CTLFireability-12 2560117 m, 36368 m/sec, 10411297 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 45333297 t fired, 46 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 11/32 Peterson-PT-5-CTLFireability-12 2739604 m, 35897 m/sec, 11189822 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 45590149 t fired, 46 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 12/32 Peterson-PT-5-CTLFireability-12 2918049 m, 35689 m/sec, 11981529 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 45846936 t fired, 46 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 12/32 Peterson-PT-5-CTLFireability-12 3092511 m, 34892 m/sec, 12774233 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 46102589 t fired, 47 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 13/32 Peterson-PT-5-CTLFireability-12 3273621 m, 36222 m/sec, 13548268 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 46357958 t fired, 47 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 14/32 Peterson-PT-5-CTLFireability-12 3450578 m, 35391 m/sec, 14328002 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 46614610 t fired, 47 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 14/32 Peterson-PT-5-CTLFireability-12 3626348 m, 35154 m/sec, 15127289 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 46871061 t fired, 47 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 15/32 Peterson-PT-5-CTLFireability-12 3801405 m, 35011 m/sec, 15930124 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 47127526 t fired, 48 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 16/32 Peterson-PT-5-CTLFireability-12 3977015 m, 35122 m/sec, 16705210 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 47383566 t fired, 48 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 16/32 Peterson-PT-5-CTLFireability-12 4151367 m, 34870 m/sec, 17473358 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 47638689 t fired, 48 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 17/32 Peterson-PT-5-CTLFireability-12 4321617 m, 34050 m/sec, 18246881 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 47892875 t fired, 48 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 17/32 Peterson-PT-5-CTLFireability-12 4493200 m, 34316 m/sec, 18996584 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 48147835 t fired, 49 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 18/32 Peterson-PT-5-CTLFireability-12 4660660 m, 33492 m/sec, 19765266 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 48403441 t fired, 49 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 19/32 Peterson-PT-5-CTLFireability-12 4829816 m, 33831 m/sec, 20547603 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 48658653 t fired, 49 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 19/32 Peterson-PT-5-CTLFireability-12 4998338 m, 33704 m/sec, 21290542 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 48914300 t fired, 49 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 20/32 Peterson-PT-5-CTLFireability-12 5163933 m, 33119 m/sec, 22018711 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 49170290 t fired, 50 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 20/32 Peterson-PT-5-CTLFireability-12 5327170 m, 32647 m/sec, 22751748 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 49425975 t fired, 50 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 21/32 Peterson-PT-5-CTLFireability-12 5489401 m, 32446 m/sec, 23500385 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 49681081 t fired, 50 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 22/32 Peterson-PT-5-CTLFireability-12 5664240 m, 34967 m/sec, 24289782 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 49936822 t fired, 50 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 22/32 Peterson-PT-5-CTLFireability-12 5840339 m, 35219 m/sec, 25102718 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 50191310 t fired, 51 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 23/32 Peterson-PT-5-CTLFireability-12 6015497 m, 35031 m/sec, 25899628 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 50445847 t fired, 51 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 24/32 Peterson-PT-5-CTLFireability-12 6192829 m, 35466 m/sec, 26650784 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 50700486 t fired, 51 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 24/32 Peterson-PT-5-CTLFireability-12 6372126 m, 35859 m/sec, 27406043 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 50955397 t fired, 51 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 25/32 Peterson-PT-5-CTLFireability-12 6544878 m, 34550 m/sec, 28179556 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 51210753 t fired, 52 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 26/32 Peterson-PT-5-CTLFireability-12 6719931 m, 35010 m/sec, 28913868 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 51465888 t fired, 52 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 26/32 Peterson-PT-5-CTLFireability-12 6892125 m, 34438 m/sec, 29674547 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 51720972 t fired, 52 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 27/32 Peterson-PT-5-CTLFireability-12 7064596 m, 34494 m/sec, 30466157 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 51976211 t fired, 52 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 28/32 Peterson-PT-5-CTLFireability-12 7239158 m, 34912 m/sec, 31260713 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 52230555 t fired, 53 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 28/32 Peterson-PT-5-CTLFireability-12 7409935 m, 34155 m/sec, 32040522 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 52485431 t fired, 53 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 29/32 Peterson-PT-5-CTLFireability-12 7584512 m, 34915 m/sec, 32773675 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 52739332 t fired, 53 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 30/32 Peterson-PT-5-CTLFireability-12 7753055 m, 33708 m/sec, 33531575 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 52992260 t fired, 53 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 30/32 Peterson-PT-5-CTLFireability-12 7919440 m, 33277 m/sec, 34284962 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 53249408 t fired, 54 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 31/32 Peterson-PT-5-CTLFireability-12 8088554 m, 33822 m/sec, 35074562 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 53507904 t fired, 54 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 32/32 Peterson-PT-5-CTLFireability-12 8254886 m, 33266 m/sec, 35852042 t fired, . Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 3 0 2 0 0 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 53766724 t fired, 54 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. 32/32 Peterson-PT-5-CTLFireability-12 8428429 m, 34708 m/sec, 36582664 t fired, . Pages in use: 32 Visible: 16 58 (type EXCL) for Peterson-PT-5-CTLFireability-12 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 2 0 0 2 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 54026597 t fired, 55 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 49 Peterson-PT-5-CTLFireability-15 60 (type EXCL) for Peterson-PT-5-CTLFireability-15 : true 12 12 0.000000 1 (type EXCL) for 49 Peterson-PT-5-CTLFireability-15 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 2/32 Peterson-PT-5-CTLFireability-15 388538 m, 77707 m/sec, 3102767 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 54286831 t fired, 55 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 4/32 Peterson-PT-5-CTLFireability-15 759398 m, 74172 m/sec, 6071855 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 54545981 t fired, 55 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-15 1112443 m, 70609 m/sec, 8899178 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 54805319 t fired, 55 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 7/32 Peterson-PT-5-CTLFireability-15 1451812 m, 67873 m/sec, 11614063 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 55065739 t fired, 56 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 9/32 Peterson-PT-5-CTLFireability-15 1796671 m, 68971 m/sec, 14372524 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 55326960 t fired, 56 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 11/32 Peterson-PT-5-CTLFireability-15 2148493 m, 70364 m/sec, 17187337 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 55587732 t fired, 56 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-15 2482669 m, 66835 m/sec, 19861004 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 55848698 t fired, 56 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-15 2828671 m, 69200 m/sec, 22627811 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 56107997 t fired, 57 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-15 3167392 m, 67744 m/sec, 25338622 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 56366154 t fired, 57 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-15 3502461 m, 67013 m/sec, 28019340 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 56626383 t fired, 57 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-15 3813919 m, 62291 m/sec, 30511147 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 56885922 t fired, 57 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-15 4127595 m, 62735 m/sec, 33020478 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 57145085 t fired, 58 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 21/32 Peterson-PT-5-CTLFireability-15 4465533 m, 67587 m/sec, 35723958 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 57405440 t fired, 58 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 23/32 Peterson-PT-5-CTLFireability-15 4796684 m, 66230 m/sec, 38373111 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 57665595 t fired, 58 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-15 5114302 m, 63523 m/sec, 40914061 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 57926157 t fired, 58 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-15 5414602 m, 60060 m/sec, 43316330 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 58185687 t fired, 59 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-15 5713871 m, 59853 m/sec, 45709340 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 58445624 t fired, 59 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-15 6031302 m, 63486 m/sec, 48249203 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 58703982 t fired, 59 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 30/32 Peterson-PT-5-CTLFireability-15 6340993 m, 61938 m/sec, 50727715 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 58963752 t fired, 59 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 1 0 3 0 0 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-5-CTLFireability-15 6640761 m, 59953 m/sec, 53125676 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 59221645 t fired, 60 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 54 (type EXCL) for Peterson-PT-5-CTLFireability-15 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 1 0 0 1 0 0 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 59480072 t fired, 60 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 (type EXCL) for 21 Peterson-PT-5-CTLFireability-07 22 (type EXCL) for Peterson-PT-5-CTLFireability-07 : false 210 367 0.000000 1 (type EXCL) for 6 Peterson-PT-5-CTLFireability-02 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 3/32 Peterson-PT-5-CTLFireability-02 343959 m, 68791 m/sec, 1540438 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 59738313 t fired, 60 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 5/32 Peterson-PT-5-CTLFireability-02 678445 m, 66897 m/sec, 3057855 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 59996881 t fired, 60 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 6/32 Peterson-PT-5-CTLFireability-02 1007522 m, 65815 m/sec, 4555390 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 60258394 t fired, 61 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 8/32 Peterson-PT-5-CTLFireability-02 1337689 m, 66033 m/sec, 6056070 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 60519176 t fired, 61 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 10/32 Peterson-PT-5-CTLFireability-02 1668204 m, 66103 m/sec, 7528997 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 60780169 t fired, 61 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 12/32 Peterson-PT-5-CTLFireability-02 1993481 m, 65055 m/sec, 8982091 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 61040490 t fired, 62 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 14/32 Peterson-PT-5-CTLFireability-02 2323871 m, 66078 m/sec, 10468558 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 61298715 t fired, 62 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 15/32 Peterson-PT-5-CTLFireability-02 2641673 m, 63560 m/sec, 11916040 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 61556640 t fired, 62 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 17/32 Peterson-PT-5-CTLFireability-02 2966285 m, 64922 m/sec, 13344037 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 61814817 t fired, 62 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 18/32 Peterson-PT-5-CTLFireability-02 3283155 m, 63374 m/sec, 14803386 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 62073517 t fired, 63 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 20/32 Peterson-PT-5-CTLFireability-02 3605822 m, 64533 m/sec, 16318167 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 62333373 t fired, 63 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 22/32 Peterson-PT-5-CTLFireability-02 3926098 m, 64055 m/sec, 17792873 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 62593090 t fired, 63 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 24/32 Peterson-PT-5-CTLFireability-02 4252097 m, 65199 m/sec, 19264849 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 62852466 t fired, 63 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 26/32 Peterson-PT-5-CTLFireability-02 4562817 m, 62144 m/sec, 20687625 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 63110571 t fired, 64 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 27/32 Peterson-PT-5-CTLFireability-02 4881046 m, 63645 m/sec, 22090526 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 63367553 t fired, 64 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 29/32 Peterson-PT-5-CTLFireability-02 5197670 m, 63324 m/sec, 23560589 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 63626985 t fired, 64 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 31/32 Peterson-PT-5-CTLFireability-02 5508038 m, 62073 m/sec, 24960459 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 63887358 t fired, 64 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 1 0 1 0 0 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 32/32 Peterson-PT-5-CTLFireability-02 5814418 m, 61276 m/sec, 26362091 t fired, . 0/5 Peterson-PT-5-CTLFireability-12 64148500 t fired, 65 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 7 (type EXCL) for Peterson-PT-5-CTLFireability-02 (memory limit exceeded) VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 64410014 t fired, 65 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 64671239 t fired, 65 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 64931076 t fired, 65 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 65189753 t fired, 66 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 65447641 t fired, 66 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 65705998 t fired, 66 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 65964469 t fired, 66 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 66228457 t fired, 67 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 66494849 t fired, 67 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 66761571 t fired, 67 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 67033495 t fired, 68 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 67307418 t fired, 68 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 67576580 t fired, 68 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 67850584 t fired, 68 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 68124083 t fired, 69 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 68398495 t fired, 69 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 68672936 t fired, 69 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 68946846 t fired, 69 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 69222296 t fired, 70 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 69498046 t fired, 70 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 69764007 t fired, 70 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 70033782 t fired, 71 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 70306262 t fired, 71 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 70578868 t fired, 71 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 70851272 t fired, 71 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 71123059 t fired, 72 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 71394155 t fired, 72 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 71665197 t fired, 72 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 71935951 t fired, 72 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 72206782 t fired, 73 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 72477692 t fired, 73 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 72748690 t fired, 73 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 73019900 t fired, 74 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 73292836 t fired, 74 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 73565880 t fired, 74 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 73838490 t fired, 74 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 74111474 t fired, 75 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 74384530 t fired, 75 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 74655362 t fired, 75 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 74922253 t fired, 75 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 75194749 t fired, 76 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 75466829 t fired, 76 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 75739146 t fired, 76 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 76011451 t fired, 77 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 76285331 t fired, 77 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 76558687 t fired, 77 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 76832697 t fired, 77 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 77106614 t fired, 78 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 77381088 t fired, 78 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 77655146 t fired, 78 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 77929638 t fired, 78 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 78203333 t fired, 79 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 78477257 t fired, 79 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 78751324 t fired, 79 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 79025124 t fired, 80 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 79300210 t fired, 80 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 79572754 t fired, 80 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 79847031 t fired, 80 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 80122921 t fired, 81 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 80397519 t fired, 81 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 80671610 t fired, 81 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 80946245 t fired, 81 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 81223280 t fired, 82 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 81500661 t fired, 82 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 81777488 t fired, 82 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 82054117 t fired, 83 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 82329414 t fired, 83 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 82604559 t fired, 83 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 82879882 t fired, 83 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 83156080 t fired, 84 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 83432260 t fired, 84 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 83708642 t fired, 84 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 83984245 t fired, 84 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 84260369 t fired, 85 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 84527008 t fired, 85 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 84789893 t fired, 85 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 85062338 t fired, 86 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 85333833 t fired, 86 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 85597880 t fired, 86 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 85871112 t fired, 86 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 86145273 t fired, 87 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 86419892 t fired, 87 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 86693831 t fired, 87 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 86967930 t fired, 87 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 87241340 t fired, 88 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 87513726 t fired, 88 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 87786046 t fired, 88 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 88045333 t fired, 89 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 88315616 t fired, 89 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 88586321 t fired, 89 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 88857473 t fired, 89 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 89130059 t fired, 90 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 89402697 t fired, 90 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 89674222 t fired, 90 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 89949194 t fired, 90 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 90220468 t fired, 91 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 90491677 t fired, 91 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 90764172 t fired, 91 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 91037007 t fired, 92 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 91309817 t fired, 92 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 91569078 t fired, 92 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 91840059 t fired, 92 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 92110027 t fired, 93 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 92380500 t fired, 93 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 92650487 t fired, 93 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 92918007 t fired, 93 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 93188480 t fired, 94 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 93459623 t fired, 94 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 93731048 t fired, 94 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 94002202 t fired, 95 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 94272976 t fired, 95 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 94543792 t fired, 95 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 94813755 t fired, 95 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 95083889 t fired, 96 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 95353739 t fired, 96 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 95624039 t fired, 96 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 95893845 t fired, 96 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 96164260 t fired, 97 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 96423328 t fired, 97 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 96663122 t fired, 97 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 96936760 t fired, 97 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 97211783 t fired, 98 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 97488123 t fired, 98 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 97764367 t fired, 98 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 98040358 t fired, 99 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 98316077 t fired, 99 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 98591469 t fired, 99 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 98867157 t fired, 99 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 99143697 t fired, 100 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 99420515 t fired, 100 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 99697162 t fired, 100 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 99973777 t fired, 100 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 100250795 t fired, 101 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 100527971 t fired, 101 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 100805140 t fired, 101 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 101082296 t fired, 102 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 101359631 t fired, 102 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 101636704 t fired, 102 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 101913993 t fired, 102 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 102190620 t fired, 103 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 102466783 t fired, 103 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 102743140 t fired, 103 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 103019139 t fired, 104 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 103293626 t fired, 104 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 103567936 t fired, 104 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 103841883 t fired, 104 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 104116584 t fired, 105 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 104392030 t fired, 105 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 104667470 t fired, 105 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 104942306 t fired, 105 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 105214334 t fired, 106 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 105486713 t fired, 106 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 105758103 t fired, 106 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 106032314 t fired, 107 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 106306222 t fired, 107 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 106550647 t fired, 107 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 106808686 t fired, 107 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 107039170 t fired, 108 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 107308525 t fired, 108 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 107578677 t fired, 108 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 107849129 t fired, 108 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 108120371 t fired, 109 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 108392278 t fired, 109 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 108663694 t fired, 109 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 108934750 t fired, 109 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 109206985 t fired, 110 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 109478886 t fired, 110 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 109751822 t fired, 110 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 110025017 t fired, 111 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 110299019 t fired, 111 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 110572385 t fired, 111 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 110845819 t fired, 111 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 111119219 t fired, 112 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 111392573 t fired, 112 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 111667381 t fired, 112 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 111943345 t fired, 112 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 112219941 t fired, 113 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 112496657 t fired, 113 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 112773386 t fired, 113 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 113049872 t fired, 114 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 113308886 t fired, 114 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 113581191 t fired, 114 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 113853401 t fired, 114 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 114124633 t fired, 115 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 114394790 t fired, 115 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 114666069 t fired, 115 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 114937301 t fired, 115 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 115209817 t fired, 116 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 115482294 t fired, 116 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 115755750 t fired, 116 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 116031698 t fired, 117 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 116304629 t fired, 117 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 116579959 t fired, 117 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 116854726 t fired, 117 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 117129350 t fired, 118 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 117403598 t fired, 118 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 117677975 t fired, 118 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 117951937 t fired, 118 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 118224003 t fired, 119 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 118494687 t fired, 119 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 118767682 t fired, 119 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 119040647 t fired, 120 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 119317440 t fired, 120 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 119592860 t fired, 120 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 119869503 t fired, 120 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 120145122 t fired, 121 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 120405656 t fired, 121 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 DISJ 0 0 0 0 3 0 1 0 MEM PG/PGLIMIT FORMULA STATUS 0/5 Peterson-PT-5-CTLFireability-12 120671714 t fired, 121 attempts, . 0/5 Peterson-PT-5-CTLFireability-12 sara is running. Pages in use: 32 Visible: 16 VALUE PRODUCED BY CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker CTL false CTL model checker IDL ACT RUN SUS FIN C/T C/M OBS CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CONJ 0 0 0 0 3 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 CTL 0 0 0 0 1 0 1 0 EF 0 0 2 0 2 0 1 0 EGEF 0 0 0 0 1 0 1 0 has been truncated ====== archives if needed

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="Peterson-PT-5"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is Peterson-PT-5, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-smll-167863537600626"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/Peterson-PT-5.tgz
mv Peterson-PT-5 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' CTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;