Execution Chart

We display below the execution chart for this examination (boot time has been removed).

Trace from the execution

Formatting '/data/fkordon/mcc2023-input.r262-smll-167863537200388.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................
=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ParamProductionCell-PT-3, examination is LTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r262-smll-167863537200388
=====================================================================

--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 8.0K Feb 26 17:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 17:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 26 17:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 17:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 16:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 17:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 26 17:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 26 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 174K Mar 5 18:23 model.pnml

--------------------
content from stdout:

=== Data for post analysis generated by BenchKit (invocation template)

The expected result is a vector of booleans
BOOL_VECTOR

here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-00
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-01
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-02
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-03
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-04
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-05
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-06
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-07
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-08
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-09
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-10
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-11
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-12
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-13
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-14
FORMULA_NAME ParamProductionCell-PT-3-LTLFireability-15

=== Now, execution of the tool begins

BK_START 1678877927900

bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=LTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-3
Not applying reductions.
Model is PT
LTLFireability PT
starting LoLA
BK_INPUT ParamProductionCell-PT-3
BK_EXAMINATION: LTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
LTLFireability

FORMULA ParamProductionCell-PT-3-LTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-14 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-10 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-07 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-05 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-03 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

FORMULA ParamProductionCell-PT-3-LTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT

BK_STOP 1678878053950

--------------------
content from stderr:

lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/LTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:376
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:379
lola: rewrite Frontend/Parser/formula_rewrite.k:421
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:346
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:433
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:436
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:521
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:430
lola: rewrite Frontend/Parser/formula_rewrite.k:355
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:349
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:527
lola: rewrite Frontend/Parser/formula_rewrite.k:122
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:352
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-3-LTLFireability-00
lola: time limit : 156 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-00
lola: result : false
lola: markings : 436
lola: fired transitions : 436
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 25 (type EXCL) for 24 ParamProductionCell-PT-3-LTLFireability-08
lola: time limit : 171 sec
lola: memory limit: 32 pages
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 5/239 4/32 ParamProductionCell-PT-3-LTLFireability-08 496007 m, 99201 m/sec, 4557706 t fired, .

Time elapsed: 6 secs. Pages in use: 4
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 10/239 7/32 ParamProductionCell-PT-3-LTLFireability-08 1018104 m, 104419 m/sec, 9374798 t fired, .

Time elapsed: 11 secs. Pages in use: 7
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 15/239 11/32 ParamProductionCell-PT-3-LTLFireability-08 1584313 m, 113241 m/sec, 14666803 t fired, .

Time elapsed: 16 secs. Pages in use: 11
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 20/239 14/32 ParamProductionCell-PT-3-LTLFireability-08 2142247 m, 111586 m/sec, 20066874 t fired, .

Time elapsed: 21 secs. Pages in use: 14
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 25/239 18/32 ParamProductionCell-PT-3-LTLFireability-08 2704643 m, 112479 m/sec, 25520618 t fired, .

Time elapsed: 26 secs. Pages in use: 18
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 30/239 21/32 ParamProductionCell-PT-3-LTLFireability-08 3258701 m, 110811 m/sec, 31078663 t fired, .

Time elapsed: 31 secs. Pages in use: 21
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 35/239 25/32 ParamProductionCell-PT-3-LTLFireability-08 3808681 m, 109996 m/sec, 36589491 t fired, .

Time elapsed: 36 secs. Pages in use: 25
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 40/239 28/32 ParamProductionCell-PT-3-LTLFireability-08 4307517 m, 99767 m/sec, 41637878 t fired, .

Time elapsed: 41 secs. Pages in use: 28
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 45/239 30/32 ParamProductionCell-PT-3-LTLFireability-08 4578260 m, 54148 m/sec, 47365691 t fired, .

Time elapsed: 46 secs. Pages in use: 30
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
25 LTL EXCL 50/239 32/32 ParamProductionCell-PT-3-LTLFireability-08 4836828 m, 51713 m/sec, 53225507 t fired, .

Time elapsed: 51 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 25 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-08 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-13: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-14: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-15: LTL 0 1 0 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 56 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 46 (type EXCL) for 45 ParamProductionCell-PT-3-LTLFireability-15
lola: time limit : 253 sec
lola: memory limit: 32 pages
lola: FINISHED task # 46 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-15
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 43 (type EXCL) for 42 ParamProductionCell-PT-3-LTLFireability-14
lola: time limit : 272 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-14
lola: result : false
lola: markings : 436
lola: fired transitions : 436
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 40 (type EXCL) for 39 ParamProductionCell-PT-3-LTLFireability-13
lola: time limit : 295 sec
lola: memory limit: 32 pages
lola: FINISHED task # 40 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-13
lola: result : false
lola: markings : 626
lola: fired transitions : 626
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 37 (type EXCL) for 36 ParamProductionCell-PT-3-LTLFireability-12
lola: time limit : 322 sec
lola: memory limit: 32 pages
lola: FINISHED task # 37 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-12
lola: result : true
lola: markings : 4
lola: fired transitions : 3
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 34 (type EXCL) for 33 ParamProductionCell-PT-3-LTLFireability-11
lola: time limit : 354 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 LTL EXCL 5/354 8/32 ParamProductionCell-PT-3-LTLFireability-11 1123792 m, 224758 m/sec, 4048188 t fired, .

Time elapsed: 61 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 LTL EXCL 10/354 14/32 ParamProductionCell-PT-3-LTLFireability-11 1911393 m, 157520 m/sec, 8529273 t fired, .

Time elapsed: 66 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 LTL EXCL 15/354 18/32 ParamProductionCell-PT-3-LTLFireability-11 2513780 m, 120477 m/sec, 13244583 t fired, .

Time elapsed: 71 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 LTL EXCL 20/354 21/32 ParamProductionCell-PT-3-LTLFireability-11 3017130 m, 100670 m/sec, 18062240 t fired, .

Time elapsed: 76 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 LTL EXCL 25/354 27/32 ParamProductionCell-PT-3-LTLFireability-11 3920552 m, 180684 m/sec, 21797696 t fired, .

Time elapsed: 81 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 1 0 1 0 0 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
34 LTL EXCL 30/354 32/32 ParamProductionCell-PT-3-LTLFireability-11 4811350 m, 178159 m/sec, 25988572 t fired, .

Time elapsed: 86 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: CANCELED task # 34 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-11 (memory limit exceeded)
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS

Time elapsed: 91 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: LAUNCH task # 31 (type EXCL) for 30 ParamProductionCell-PT-3-LTLFireability-10
lola: time limit : 389 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 LTL EXCL 5/389 9/32 ParamProductionCell-PT-3-LTLFireability-10 1282354 m, 256470 m/sec, 4038079 t fired, .

Time elapsed: 96 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 LTL EXCL 10/389 17/32 ParamProductionCell-PT-3-LTLFireability-10 2421684 m, 227866 m/sec, 8394418 t fired, .

Time elapsed: 101 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 LTL EXCL 15/389 24/32 ParamProductionCell-PT-3-LTLFireability-10 3499138 m, 215490 m/sec, 12889686 t fired, .

Time elapsed: 106 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-10: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
31 LTL EXCL 20/389 30/32 ParamProductionCell-PT-3-LTLFireability-10 4382944 m, 176761 m/sec, 17299942 t fired, .

Time elapsed: 111 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 31 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-10
lola: result : false
lola: markings : 4399887
lola: fired transitions : 17791621
lola: time used : 20.000000
lola: memory pages used : 30
lola: LAUNCH task # 22 (type EXCL) for 21 ParamProductionCell-PT-3-LTLFireability-07
lola: time limit : 436 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-10: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 LTL EXCL 5/436 6/32 ParamProductionCell-PT-3-LTLFireability-07 856518 m, 171303 m/sec, 3704979 t fired, .

Time elapsed: 116 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-10: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 LTL EXCL 10/436 10/32 ParamProductionCell-PT-3-LTLFireability-07 1430299 m, 114756 m/sec, 8250124 t fired, .

Time elapsed: 121 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-10: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker

PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-LTLFireability-01: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-02: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-03: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-04: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-05: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-06: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-07: LTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-08: LTL 0 0 0 0 1 0 1 0
ParamProductionCell-PT-3-LTLFireability-09: LTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-LTLFireability-11: LTL 0 0 0 0 1 0 1 0

TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
22 LTL EXCL 15/436 14/32 ParamProductionCell-PT-3-LTLFireability-07 2028487 m, 119637 m/sec, 12913845 t fired, .

Time elapsed: 126 secs. Pages in use: 32
# running tasks: 1 of 4 Visible: 16
lola: FINISHED task # 22 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-07
lola: result : false
lola: markings : 2116212
lola: fired transitions : 13629236
lola: time used : 15.000000
lola: memory pages used : 14
lola: LAUNCH task # 16 (type EXCL) for 15 ParamProductionCell-PT-3-LTLFireability-05
lola: time limit : 496 sec
lola: memory limit: 32 pages
lola: FINISHED task # 16 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-05
lola: result : true
lola: markings : 9
lola: fired transitions : 11
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 ParamProductionCell-PT-3-LTLFireability-04
lola: time limit : 579 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-04
lola: result : false
lola: markings : 436
lola: fired transitions : 436
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 10 (type EXCL) for 9 ParamProductionCell-PT-3-LTLFireability-03
lola: time limit : 694 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-03
lola: result : false
lola: markings : 436
lola: fired transitions : 436
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-3-LTLFireability-01
lola: time limit : 868 sec
lola: memory limit: 32 pages
lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-01
lola: result : false
lola: markings : 436
lola: fired transitions : 436
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 ParamProductionCell-PT-3-LTLFireability-06
lola: time limit : 1158 sec
lola: memory limit: 32 pages
lola: FINISHED task # 19 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-06
lola: result : false
lola: markings : 369
lola: fired transitions : 371
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 28 (type EXCL) for 27 ParamProductionCell-PT-3-LTLFireability-09
lola: time limit : 1737 sec
lola: memory limit: 32 pages
lola: FINISHED task # 28 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-09
lola: result : true
lola: markings : 1
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-3-LTLFireability-02
lola: time limit : 3474 sec
lola: memory limit: 32 pages
lola: FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-3-LTLFireability-02
lola: result : false
lola: markings : 350
lola: fired transitions : 351
lola: time used : 0.000000
lola: memory pages used : 1
lola: Portfolio finished: no open tasks 16

FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-LTLFireability-00: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-01: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-02: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-03: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-04: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-05: LTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-06: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-07: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-08: LTL unknown AGGR
ParamProductionCell-PT-3-LTLFireability-09: LTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-10: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-11: LTL unknown AGGR
ParamProductionCell-PT-3-LTLFireability-12: LTL/CTL true LTL model checker
ParamProductionCell-PT-3-LTLFireability-13: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-14: LTL false LTL model checker
ParamProductionCell-PT-3-LTLFireability-15: LTL true LTL model checker


Time elapsed: 126 secs. Pages in use: 32

Sequence of Actions to be Executed by the VM

This is useful if one wants to reexecute the tool in the VM from the submitted image disk.

set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-3"
export BK_EXAMINATION="LTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"

# this is specific to your benchmark or test

export BIN_DIR="$HOME/BenchKit/bin"

# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi

# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ParamProductionCell-PT-3, examination is LTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-smll-167863537200388"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"

tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-3.tgz
mv ParamProductionCell-PT-3 execution
cd execution
if [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "UpperBounds" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] || [ "LTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh

echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "LTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "LTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "LTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property LTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "LTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '' LTLFireability.xml | cut -d '>' -f 2 | cut -d '<' -f 1 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ "LTLFireability" = "ReachabilityDeadlock" ] || [ "LTLFireability" = "QuasiLiveness" ] || [ "LTLFireability" = "StableMarking" ] || [ "LTLFireability" = "Liveness" ] || [ "LTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME LTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;