About the Execution of LoLA for ParamProductionCell-PT-3
Execution Summary | |||||
Max Memory Used (MB) |
Time wait (ms) | CPU Usage (ms) | I/O Wait (ms) | Computed Result | Execution Status |
2288.939 | 77950.00 | 227091.00 | 100.10 | FFFTFFFTTTTFTFTT | normal |
Execution Chart
We display below the execution chart for this examination (boot time has been removed).
Trace from the execution
Formatting '/data/fkordon/mcc2023-input.r262-smll-167863537200386.qcow2', fmt=qcow2 size=4294967296 backing_file=/data/fkordon/mcc2023-input.qcow2 cluster_size=65536 lazy_refcounts=off refcount_bits=16
Waiting for the VM to be ready (probing ssh)
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=====================================================================
Generated by BenchKit 2-5348
Executing tool lola
Input is ParamProductionCell-PT-3, examination is CTLFireability
Time confinement is 3600 seconds
Memory confinement is 16384 MBytes
Number of cores is 4
Run identifier is r262-smll-167863537200386
=====================================================================
--------------------
preparation of the directory to be used:
/home/mcc/execution
total 616K
-rw-r--r-- 1 mcc users 8.0K Feb 26 17:15 CTLCardinality.txt
-rw-r--r-- 1 mcc users 69K Feb 26 17:15 CTLCardinality.xml
-rw-r--r-- 1 mcc users 7.3K Feb 26 17:15 CTLFireability.txt
-rw-r--r-- 1 mcc users 57K Feb 26 17:15 CTLFireability.xml
-rw-r--r-- 1 mcc users 4.2K Jan 29 11:40 GenericPropertiesDefinition.xml
-rw-r--r-- 1 mcc users 6.2K Jan 29 11:40 GenericPropertiesVerdict.xml
-rw-r--r-- 1 mcc users 4.8K Feb 25 16:29 LTLCardinality.txt
-rw-r--r-- 1 mcc users 29K Feb 25 16:29 LTLCardinality.xml
-rw-r--r-- 1 mcc users 2.8K Feb 25 16:29 LTLFireability.txt
-rw-r--r-- 1 mcc users 18K Feb 25 16:29 LTLFireability.xml
-rw-r--r-- 1 mcc users 9.9K Feb 26 17:17 ReachabilityCardinality.txt
-rw-r--r-- 1 mcc users 81K Feb 26 17:17 ReachabilityCardinality.xml
-rw-r--r-- 1 mcc users 12K Feb 26 17:16 ReachabilityFireability.txt
-rw-r--r-- 1 mcc users 84K Feb 26 17:16 ReachabilityFireability.xml
-rw-r--r-- 1 mcc users 1.9K Feb 25 16:29 UpperBounds.txt
-rw-r--r-- 1 mcc users 3.9K Feb 25 16:29 UpperBounds.xml
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 equiv_col
-rw-r--r-- 1 mcc users 2 Mar 5 18:23 instance
-rw-r--r-- 1 mcc users 6 Mar 5 18:23 iscolored
-rw-r--r-- 1 mcc users 174K Mar 5 18:23 model.pnml
--------------------
content from stdout:
=== Data for post analysis generated by BenchKit (invocation template)
The expected result is a vector of booleans
BOOL_VECTOR
here is the order used to build the result vector(from text file)
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-00
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-01
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-02
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-03
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-04
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-05
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-06
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-07
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-08
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-09
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-10
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-11
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-12
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-13
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-14
FORMULA_NAME ParamProductionCell-PT-3-CTLFireability-15
=== Now, execution of the tool begins
BK_START 1678877813790
bash -c /home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n "BK_STOP " ; date -u +%s%3N
Invoking MCC driver with
BK_TOOL=lola
BK_EXAMINATION=CTLFireability
BK_BIN_PATH=/home/mcc/BenchKit/bin/
BK_TIME_CONFINEMENT=3600
BK_INPUT=ParamProductionCell-PT-3
Not applying reductions.
Model is PT
CTLFireability PT
starting LoLA
BK_INPUT ParamProductionCell-PT-3
BK_EXAMINATION: CTLFireability
bin directory: /home/mcc/BenchKit/bin//../lola/bin/
current directory: /home/mcc/execution
CTLFireability
FORMULA ParamProductionCell-PT-3-CTLFireability-12 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-01 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-15 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-14 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-13 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-11 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-10 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-07 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-06 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-05 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-03 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-02 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-09 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-08 TRUE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-00 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
FORMULA ParamProductionCell-PT-3-CTLFireability-04 FALSE TECHNIQUES COLLATERAL_PROCESSING EXPLICIT TOPOLOGICAL STATE_COMPRESSION STUBBORN_SETS USE_NUPN UNFOLDING_TO_PT
BK_STOP 1678877891740
--------------------
content from stderr:
lola: MEM LIMIT 32
lola: MEM LIMIT 5
lola: NET
lola: input: PNML file (--pnmlnet)
lola: reading net from /home/mcc/execution/model.pnml
lola: reading pnml
lola: PNML file contains place/transition net
lola: finished parsing
lola: closed net file /home/mcc/execution/model.pnml
lola: Reading formula.
lola: Using XML format (--xmlformula)
lola: reading XML formula
lola: reading formula from /home/mcc/execution/CTLFireability.xml
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:547
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:400
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:120
lola: rewrite Frontend/Parser/formula_rewrite.k:454
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:457
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:478
lola: rewrite Frontend/Parser/formula_rewrite.k:448
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:162
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:156
lola: rewrite Frontend/Parser/formula_rewrite.k:150
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:121
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:96
lola: rewrite Frontend/Parser/formula_rewrite.k:116
lola: rewrite Frontend/Parser/formula_rewrite.k:281
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:123
lola: rewrite Frontend/Parser/formula_rewrite.k:278
lola: rewrite Frontend/Parser/formula_rewrite.k:183
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: RELEASE
lola: RELEASE
lola: RELEASE
lola: rewrite Frontend/Parser/formula_rewrite.k:253
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:553
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:337
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:250
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:331
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:314
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:322
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:334
lola: rewrite Frontend/Parser/formula_rewrite.k:296
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:328
lola: rewrite Frontend/Parser/formula_rewrite.k:317
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:325
lola: rewrite Frontend/Parser/formula_rewrite.k:340
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: rewrite Frontend/Parser/formula_rewrite.k:299
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Rule S: 0 transitions removed,0 places removed
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: LAUNCH task # 4 (type EXCL) for 3 ParamProductionCell-PT-3-CTLFireability-01
lola: time limit : 119 sec
lola: memory limit: 32 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: LAUNCH task # 66 (type FNDP) for 27 ParamProductionCell-PT-3-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 67 (type EQUN) for 27 ParamProductionCell-PT-3-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: LAUNCH task # 69 (type SRCH) for 27 ParamProductionCell-PT-3-CTLFireability-09
lola: time limit : 32000000 sec
lola: memory limit: 5 pages
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: rewrite Frontend/Parser/formula_rewrite.k:711
lola: FINISHED task # 69 (type SRCH) for ParamProductionCell-PT-3-CTLFireability-09
lola: result : unknown
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 64 (type FNDP) for 36 ParamProductionCell-PT-3-CTLFireability-12
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lola: Created skeleton in 0.000000 secs.
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lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:807
sara: try reading problem file /home/mcc/execution/CTLFireability-67.sara.
sara: place or transition ordering is non-deterministic
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:815
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:810
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:809
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:808
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:806
lola: rewrite Frontend/Parser/formula_rewrite.k:807
lola: rewrite Frontend/Parser/formula_rewrite.k:813
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:814
lola: rewrite Frontend/Parser/formula_rewrite.k:811
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: Created skeleton in 0.000000 secs.
lola: rewrite Frontend/Parser/formula_rewrite.k:812
lola: FINISHED task # 64 (type FNDP) for ParamProductionCell-PT-3-CTLFireability-12
lola: result : true
lola: fired transitions : 836681
lola: tried executions : 1
lola: time used : 3.000000
lola: memory pages used : 0
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-01: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
ParamProductionCell-PT-3-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-15: CONJ 0 5 0 0 5 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
4 CTL EXCL 5/189 4/32 ParamProductionCell-PT-3-CTLFireability-01 734011 m, 146802 m/sec, 3894500 t fired, .
66 EF FNDP 5/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 1471810 t fired, 2 attempts, .
67 EF STEQ 5/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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lola: FINISHED task # 4 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-01
lola: result : false
lola: markings : 1154442
lola: fired transitions : 6452722
lola: time used : 8.000000
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lola: LAUNCH task # 60 (type EXCL) for 45 ParamProductionCell-PT-3-CTLFireability-15
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lola: memory limit: 32 pages
lola: FINISHED task # 60 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-15
lola: result : true
lola: time used : 0.000000
lola: memory pages used : 1
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lola: memory limit: 32 pages
lola: FINISHED task # 58 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-15
lola: result : true
lola: markings : 3
lola: fired transitions : 2
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lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
ParamProductionCell-PT-3-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-15: CONJ 0 0 1 0 7 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 2/256 2/32 ParamProductionCell-PT-3-CTLFireability-15 312577 m, 62515 m/sec, 1390742 t fired, .
66 EF FNDP 10/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 3289624 t fired, 4 attempts, .
67 EF STEQ 10/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
ParamProductionCell-PT-3-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-13: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-14: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-15: CONJ 0 0 1 0 7 0 0 2
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
48 CTL EXCL 7/256 5/32 ParamProductionCell-PT-3-CTLFireability-15 963636 m, 130211 m/sec, 4941633 t fired, .
66 EF FNDP 15/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 5111253 t fired, 6 attempts, .
67 EF STEQ 15/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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lola: FINISHED task # 48 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-15
lola: result : true
lola: markings : 1465206
lola: fired transitions : 8247032
lola: time used : 11.000000
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lola: time limit : 275 sec
lola: memory limit: 32 pages
lola: FINISHED task # 43 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-14
lola: result : true
lola: markings : 37058
lola: fired transitions : 88170
lola: time used : 1.000000
lola: memory pages used : 1
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lola: time limit : 298 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-06: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-07: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
ParamProductionCell-PT-3-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 0/298 1/32 ParamProductionCell-PT-3-CTLFireability-13 28674 m, 5734 m/sec, 94369 t fired, .
66 EF FNDP 20/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 6919230 t fired, 7 attempts, .
67 EF STEQ 20/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
ParamProductionCell-PT-3-CTLFireability-10: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-11: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-13: CTL 0 0 1 0 1 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
40 CTL EXCL 5/298 4/32 ParamProductionCell-PT-3-CTLFireability-13 856373 m, 165539 m/sec, 3855445 t fired, .
66 EF FNDP 25/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 8727608 t fired, 9 attempts, .
67 EF STEQ 25/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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lola: result : false
lola: markings : 1465206
lola: fired transitions : 7387857
lola: time used : 9.000000
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lola: FINISHED task # 34 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-11
lola: result : false
lola: markings : 112
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lola: time used : 0.000000
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lola: FINISHED task # 31 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-10
lola: result : true
lola: markings : 663
lola: fired transitions : 924
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 22 (type EXCL) for 21 ParamProductionCell-PT-3-CTLFireability-07
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lola: FINISHED task # 22 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-07
lola: result : true
lola: markings : 236
lola: fired transitions : 651
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 19 (type EXCL) for 18 ParamProductionCell-PT-3-CTLFireability-06
lola: time limit : 446 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-3-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 1/446 1/32 ParamProductionCell-PT-3-CTLFireability-06 59296 m, 11859 m/sec, 206002 t fired, .
66 EF FNDP 30/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 10534604 t fired, 11 attempts, .
67 EF STEQ 30/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 6/446 3/32 ParamProductionCell-PT-3-CTLFireability-06 491432 m, 86427 m/sec, 3799279 t fired, .
66 EF FNDP 35/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 12429904 t fired, 13 attempts, .
67 EF STEQ 35/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 11/446 4/32 ParamProductionCell-PT-3-CTLFireability-06 818272 m, 65368 m/sec, 7303054 t fired, .
66 EF FNDP 40/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 14324904 t fired, 15 attempts, .
67 EF STEQ 40/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ParamProductionCell-PT-3-CTLFireability-02: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 16/446 6/32 ParamProductionCell-PT-3-CTLFireability-06 1141691 m, 64683 m/sec, 10917399 t fired, .
66 EF FNDP 45/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 16224425 t fired, 17 attempts, .
67 EF STEQ 45/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
ParamProductionCell-PT-3-CTLFireability-00: CTL 0 1 0 0 1 0 0 0
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ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-06: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
19 CTL EXCL 21/446 7/32 ParamProductionCell-PT-3-CTLFireability-06 1455068 m, 62675 m/sec, 14479926 t fired, .
66 EF FNDP 50/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 18127212 t fired, 19 attempts, .
67 EF STEQ 50/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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lola: FINISHED task # 19 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-06
lola: result : false
lola: markings : 1465206
lola: fired transitions : 14956047
lola: time used : 22.000000
lola: memory pages used : 7
lola: LAUNCH task # 16 (type EXCL) for 15 ParamProductionCell-PT-3-CTLFireability-05
lola: time limit : 506 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-06: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
PENDING FORMULAS: CATEGORY IDL ACT RUN SUS FIN C/T C/M OBS
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ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 4/506 2/32 ParamProductionCell-PT-3-CTLFireability-05 417222 m, 83444 m/sec, 2421823 t fired, .
66 EF FNDP 55/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 20019529 t fired, 21 attempts, .
67 EF STEQ 55/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
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ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 9/506 4/32 ParamProductionCell-PT-3-CTLFireability-05 854792 m, 87514 m/sec, 5443912 t fired, .
66 EF FNDP 60/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 21934235 t fired, 22 attempts, .
67 EF STEQ 60/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
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ParamProductionCell-PT-3-CTLFireability-03: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-05: CTL 0 0 1 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
16 CTL EXCL 14/506 7/32 ParamProductionCell-PT-3-CTLFireability-05 1281402 m, 85322 m/sec, 8557272 t fired, .
66 EF FNDP 65/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 23852436 t fired, 24 attempts, .
67 EF STEQ 65/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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lola: FINISHED task # 16 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-05
lola: result : false
lola: markings : 1465206
lola: fired transitions : 10265740
lola: time used : 17.000000
lola: memory pages used : 7
lola: LAUNCH task # 10 (type EXCL) for 9 ParamProductionCell-PT-3-CTLFireability-03
lola: time limit : 588 sec
lola: memory limit: 32 pages
lola: FINISHED task # 10 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-03
lola: result : true
lola: markings : 467
lola: fired transitions : 2330
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 7 (type EXCL) for 6 ParamProductionCell-PT-3-CTLFireability-02
lola: time limit : 706 sec
lola: memory limit: 32 pages
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-03: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-05: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-06: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
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ParamProductionCell-PT-3-CTLFireability-04: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-08: CTL 0 1 0 0 1 0 0 0
ParamProductionCell-PT-3-CTLFireability-09: EF 0 1 2 0 2 0 0 0
TASK CATEGORY TYPE TIME/TLIMIT MEM PG/PGLIMIT FORMULA STATUS
7 CTL EXCL 2/706 3/32 ParamProductionCell-PT-3-CTLFireability-02 451516 m, 90303 m/sec, 1569769 t fired, .
66 EF FNDP 70/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 25769877 t fired, 26 attempts, .
67 EF STEQ 70/3599 0/5 ParamProductionCell-PT-3-CTLFireability-09 sara is running.
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lola: FINISHED task # 7 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-02
lola: result : false
lola: markings : 919870
lola: fired transitions : 3813966
lola: time used : 4.000000
lola: memory pages used : 5
lola: LAUNCH task # 68 (type EXCL) for 27 ParamProductionCell-PT-3-CTLFireability-09
lola: time limit : 881 sec
lola: memory limit: 32 pages
lola: FINISHED task # 68 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-09
lola: result : true
lola: markings : 1998
lola: fired transitions : 2150
lola: time used : 1.000000
lola: memory pages used : 1
lola: CANCELED task # 66 (type FNDP) for ParamProductionCell-PT-3-CTLFireability-09 (obsolete)
lola: CANCELED task # 67 (type EQUN) for ParamProductionCell-PT-3-CTLFireability-09 (obsolete)
lola: LAUNCH task # 25 (type EXCL) for 24 ParamProductionCell-PT-3-CTLFireability-08
lola: time limit : 1175 sec
lola: memory limit: 32 pages
lola: FINISHED task # 66 (type FNDP) for ParamProductionCell-PT-3-CTLFireability-09
lola: result : unknown
lola: fired transitions : 26850441
lola: tried executions : 28
lola: time used : 73.000000
lola: memory pages used : 0
lola: FINISHED task # 67 (type EQUN) for ParamProductionCell-PT-3-CTLFireability-09
lola: result : unknown
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
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ParamProductionCell-PT-3-CTLFireability-05: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-06: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-09: EF true state space
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
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25 CTL EXCL 2/1175 2/32 ParamProductionCell-PT-3-CTLFireability-08 362560 m, 72512 m/sec, 1712679 t fired, .
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lola: FINISHED task # 25 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-08
lola: result : true
lola: markings : 430214
lola: fired transitions : 2123242
lola: time used : 2.000000
lola: memory pages used : 2
lola: LAUNCH task # 1 (type EXCL) for 0 ParamProductionCell-PT-3-CTLFireability-00
lola: time limit : 1762 sec
lola: memory limit: 32 pages
lola: FINISHED task # 1 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-00
lola: result : false
lola: markings : 415
lola: fired transitions : 1662
lola: time used : 0.000000
lola: memory pages used : 1
lola: LAUNCH task # 13 (type EXCL) for 12 ParamProductionCell-PT-3-CTLFireability-04
lola: time limit : 3524 sec
lola: memory limit: 32 pages
lola: FINISHED task # 13 (type EXCL) for ParamProductionCell-PT-3-CTLFireability-04
lola: result : false
lola: markings : 408892
lola: fired transitions : 1653653
lola: time used : 2.000000
lola: memory pages used : 2
lola: Portfolio finished: no open formulas
FINAL RESULTS
FINISHED FORMULA: CATEGORY VALUE PRODUCED BY
ParamProductionCell-PT-3-CTLFireability-00: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-01: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-02: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-03: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-04: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-05: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-06: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-07: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-08: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-09: EF true state space
ParamProductionCell-PT-3-CTLFireability-10: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-11: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-12: EF true findpath
ParamProductionCell-PT-3-CTLFireability-13: CTL false CTL model checker
ParamProductionCell-PT-3-CTLFireability-14: CTL true CTL model checker
ParamProductionCell-PT-3-CTLFireability-15: CONJ true CONJ
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Sequence of Actions to be Executed by the VM
This is useful if one wants to reexecute the tool in the VM from the submitted image disk.
set -x
# this is for BenchKit: configuration of major elements for the test
export BK_INPUT="ParamProductionCell-PT-3"
export BK_EXAMINATION="CTLFireability"
export BK_TOOL="lola"
export BK_RESULT_DIR="/tmp/BK_RESULTS/OUTPUTS"
export BK_TIME_CONFINEMENT="3600"
export BK_MEMORY_CONFINEMENT="16384"
export BK_BIN_PATH="/home/mcc/BenchKit/bin/"
# this is specific to your benchmark or test
export BIN_DIR="$HOME/BenchKit/bin"
# remove the execution directoty if it exists (to avoid increse of .vmdk images)
if [ -d execution ] ; then
rm -rf execution
fi
# this is for BenchKit: explicit launching of the test
echo "====================================================================="
echo " Generated by BenchKit 2-5348"
echo " Executing tool lola"
echo " Input is ParamProductionCell-PT-3, examination is CTLFireability"
echo " Time confinement is $BK_TIME_CONFINEMENT seconds"
echo " Memory confinement is 16384 MBytes"
echo " Number of cores is 4"
echo " Run identifier is r262-smll-167863537200386"
echo "====================================================================="
echo
echo "--------------------"
echo "preparation of the directory to be used:"
tar xzf /home/mcc/BenchKit/INPUTS/ParamProductionCell-PT-3.tgz
mv ParamProductionCell-PT-3 execution
cd execution
if [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "UpperBounds" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] || [ "CTLFireability" = "StateSpace" ]; then
rm -f GenericPropertiesVerdict.xml
fi
pwd
ls -lh
echo
echo "--------------------"
echo "content from stdout:"
echo
echo "=== Data for post analysis generated by BenchKit (invocation template)"
echo
if [ "CTLFireability" = "UpperBounds" ] ; then
echo "The expected result is a vector of positive values"
echo NUM_VECTOR
elif [ "CTLFireability" != "StateSpace" ] ; then
echo "The expected result is a vector of booleans"
echo BOOL_VECTOR
else
echo "no data necessary for post analysis"
fi
echo
if [ -f "CTLFireability.txt" ] ; then
echo "here is the order used to build the result vector(from text file)"
for x in $(grep Property CTLFireability.txt | cut -d ' ' -f 2 | sort -u) ; do
echo "FORMULA_NAME $x"
done
elif [ -f "CTLFireability.xml" ] ; then # for cunf (txt files deleted;-)
echo echo "here is the order used to build the result vector(from xml file)"
for x in $(grep '
echo "FORMULA_NAME $x"
done
elif [ "CTLFireability" = "ReachabilityDeadlock" ] || [ "CTLFireability" = "QuasiLiveness" ] || [ "CTLFireability" = "StableMarking" ] || [ "CTLFireability" = "Liveness" ] || [ "CTLFireability" = "OneSafe" ] ; then
echo "FORMULA_NAME CTLFireability"
fi
echo
echo "=== Now, execution of the tool begins"
echo
echo -n "BK_START "
date -u +%s%3N
echo
timeout -s 9 $BK_TIME_CONFINEMENT bash -c "/home/mcc/BenchKit/BenchKit_head.sh 2> STDERR ; echo ; echo -n \"BK_STOP \" ; date -u +%s%3N"
if [ $? -eq 137 ] ; then
echo
echo "BK_TIME_CONFINEMENT_REACHED"
fi
echo
echo "--------------------"
echo "content from stderr:"
echo
cat STDERR ;